Process Integration And Defect Reduction Engineer Jobs

Ready to do the most impactful work of your career? At Coinbase , we are uncompromising on our mission to increase economic freedom. The bar is high, the environment is intense, and we like it that way. This isn't a place for complacency, it’s a place to be pushed past your perceived limits. If you're ready to build the future of finance alongside people who refuse to settle for "good enough," you belong here. Coinbase is a remote-first, but not remote-only company. Expect to get together quarterly for intense in-person working sessions called “surges.” learn more about working at Coinbase . The Data Platform team builds and operates the systems that centralize all of Coinbase's internal and third-party data, making it easy for teams across the company to access, process, and transform that data for analytics, machine learning, and powering end-user experiences. As an engineer on the team you'll contribute across the full spectrum of our systems, from foundational processing and storage to scalable pipelines to the frameworks, tools, and internal applications that make data easily and efficiently available. We have a number of open roles within the Data Platform team, each with a different focus area; read on to see if you'll be a good fit as a Data Engineering Platform Engineer. This role sits between our platform and the analysts, data scientists, and data engineers who use it every day. You'll build the SDKs, self-service apps, and abstractions that let thousands of pipelines and analyses run without those users needing to understand the plumbing underneath. What you'll do: Build clean software abstractions and modular, reusable components that let us support thousands of pipelines and beyond as we scale. Build and maintain data integration and processing SDKs used by data teams and internal services across Coinbase. Design and build self-service applications that let analysts and data scientists create, manage, and troubleshoot their own pipelines wi

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we build the memory and storage that powers everything from massive data centers to the devices people rely on every day. Our design teams carry silicon all the way to systems—developing advanced memory architectures, shaping the products around them, and validating the solutions used across the globe. We take real ownership of the technology we create, and we're always pushing what memory can do! As a Staff Analog Design Engineer, you'll design and analyze the analog and digital circuits at the core of our memory products, directly shaping their performance, cost, and reliability. You'll work alongside Micron's design and verification teams around the world and support Product Engineering, Test, Probe, Process Integration, Assembly, and Marketing to build products that optimize manufacturing and keep customers coming back. It's a role where your circuit decisions show up in silicon that ships at scale. Responsibilities: Design, optimize, and verify block-level analog and mixed-signal circuits for DRAM Evaluate new circuit topologies to improve block PPAC Expand verification coverage to strengthen robustness and mass-production yield Partner with global design groups, guide layout through post-layout simulation, and support silicon-to-simulation correlation Apply agentic AI and automation tools to improve design quality and efficiency Minimum Qualifications: Bachelor's degree in Electrical Engineering with 6+ years of semicond

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description Summary The Probe Product Engineer in STPG Product Engineering owns probe strategy and silicon learning at wafer test, spanning pre‑silicon design‑to‑probe staging, first‑silicon bring‑up, qualification, and high‑volume manufacturing (HVM). This role is accountable for defining probe coverage intent, establishing limits and guard‑bands grounded in silicon behavior, and driving yield, quality, and test‑cost outcomes. The focus is on interpreting design intent, device operation, and process interactions, and translating product risk into robust, manufacturable probe strategies aligned with downstream test and customer requirements. The engineer works closely with Design, DFT, Design Validation (DV), Process Integration, Backend Test, and Reliability teams to ensure probe solutions are technically sound, scalable, and product‑centric across the lifecycle. Key Responsibilities Probe Coverage Strategy & Ownership Define and own probe coverage intent by mapping design features, device behavior, and process risks into probe observability, screening mechanisms, trims, and guard‑bands. Define, release, and sustain probe test flows from first silicon through qualification and HVM, ensuring coverage objectives

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description Summary The Probe Product Engineer in STPG Product Engineering owns probe strategy and silicon learning at wafer test, spanning pre‑silicon design‑to‑probe staging, first‑silicon bring‑up, qualification, and high‑volume manufacturing (HVM). This role is accountable for defining probe coverage intent, establishing limits and guard‑bands grounded in silicon behavior, and driving yield, quality, and test‑cost outcomes. The focus is on interpreting design intent, device operation, and process interactions, and translating product risk into robust, manufacturable probe strategies aligned with downstream test and customer requirements. The engineer works closely with Design, DFT, Design Validation (DV), Process Integration, Backend Test, and Reliability teams to ensure probe solutions are technically sound, scalable, and product‑centric across the lifecycle. Key Responsibilities Probe Coverage Strategy & Ownership Define and own probe coverage intent by mapping design features, device behavior, and process risks into probe observability, screening mechanisms, trims, and guard‑bands. Define, release, and sustain probe test flows from first silicon through qualification and HVM, ensuring coverage objectives

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description Summary The Probe Product Engineer in STPG Product Engineering owns probe strategy and silicon learning at wafer test, spanning pre‑silicon design‑to‑probe staging, first‑silicon bring‑up, qualification, and high‑volume manufacturing (HVM). This role is accountable for defining probe coverage intent, establishing limits and guard‑bands grounded in silicon behavior, and driving yield, quality, and test‑cost outcomes. The focus is on interpreting design intent, device operation, and process interactions, and translating product risk into robust, manufacturable probe strategies aligned with downstream test and customer requirements. The engineer works closely with Design, DFT, Design Validation (DV), Process Integration, Backend Test, and Reliability teams to ensure probe solutions are technically sound, scalable, and product‑centric across the lifecycle. Key Responsibilities Probe Coverage Strategy & Ownership Define and own probe coverage intent by mapping design features, device behavior, and process risks into probe observability, screening mechanisms, trims, and guard‑bands. Define, release, and sustain probe test flows from first silicon through qualification and HVM, ensuring coverage objectives

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description Summary The Probe Product Engineer in STPG Product Engineering owns probe strategy and silicon learning at wafer test, spanning pre‑silicon design‑to‑probe staging, first‑silicon bring‑up, qualification, and high‑volume manufacturing (HVM). This role is accountable for defining probe coverage intent, establishing limits and guard‑bands grounded in silicon behavior, and driving yield, quality, and test‑cost outcomes. The focus is on interpreting design intent, device operation, and process interactions, and translating product risk into robust, manufacturable probe strategies aligned with downstream test and customer requirements. The engineer works closely with Design, DFT, Design Validation (DV), Process Integration, Backend Test, and Reliability teams to ensure probe solutions are technically sound, scalable, and product‑centric across the lifecycle. Career Growth & Impact Direct ownership of probe strategy and quality outcomes across the product lifecycle. Exposure to advanced technology nodes, customer‑driven requirements, and large‑scale manufacturing systems. Clear growth paths across senior technical contributor, product leadership, or people management tracks within STPG Product Engineering. <

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Roles and Responsibilities Verification of Analog and mixed signal circuits. Generation of a Full chip mixed signal simulation environment where analog, digital and FW co-exist. Schematic/behavioral model generation of certain blocks to make FC simulation feasible/efficient Device level electrical rule checks – SOA, snapback, sfb etc Static and dynamic simulations to identify the leakage paths SPF extraction and fanout, coupling checks Power cycling simulations – PL and Brown out events Chip level user mode simulations correlating analog subsystems, logic and FW algorithms Design data sheet review and generation of verification plan You will also work and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products to optimize all manufacturing functions and assure the best cost, quality, root-cause analysis, reliability, time-to-market, and customer satisfaction. Requirements Understanding of MOS device physics mainly second order effects Basic knowledge of few analog circuits – CM, BGR, op-amp, regulators, ADC, DAC and charge pumps Familiarity with shell, Perl/python scripts Familiarity with virtuoso, hspice, xa and cosim Familiarity with HDLs – Verilog/SV and Verilog A/AMS Debug enthusiast with system level outlook Ability to grab complex workflows and constant drive to innovate

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Senior/Staff Engineer, NAND Product Development in Non-Volatile Engineering (NVE) group at Micron Technology, Inc., you will be responsible for test flow development and testing strategies with emphasis on Test Chips for Micron’s pioneering 3D NAND memory. You will be collaborating with multiple teams like Test Solutions Engineering on test code development, Design Engineering on testmode implementation, and validating and debugging testmodes and test results via simulation and post silicon validation of the tests. Provide critical test solutions that will be used to screen the quality and reliability failures on Micron’s NAND products. Responsibilities: NAND Testchip test flow development and validation Run pre si Verilog (Digital) and Analog design simulations to verify testmodes. Define and improve post si testing methods to address new experimental designs, process or debug issues on devices manufactured at Micron’s R&D and Fab10 Manufacturing facilities Perform device characterization and electrical failure analysis (EFA) Collaborate with Test Solutions Engineering on test code development. Collaborate with Design Engineering on testmode implementation, pre si verification and post si validation of testmodes. Collaborate with Process Integration, yield engineering to improve overall die yield and meet the critical turning points planned for the Testchip. Leverage AI tools to automate the tools and workflow</

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Sr. or Staff Design Engineer in the NVE Design Engineering Analog group at Micron Technology, Inc., you will contribute to the development of memory products that are best-in-class, using your specialized knowledge and Micron proprietary methods of designing and analyzing analog and mixed circuits used in the development of memory products. Designing, simulating, optimizing, and floor planning NAND circuits. Evaluating design feasibility and analyze circuit functionalities. Implementing analog and mixed signal circuit design to meet specifications. Validating design performance and functionalities by running block and chip level simulations using standard industry simulators. Working closely with other functional teams to evaluate, analyze, and improve NAND power consumptions. Collaborate productively with other team members in your team. Review existing and generate new technical documentation. Build and maintain Python-based AI utilities that interfaces with EDA environments to accelerate design tasks such as environment setup, corner execution, regression runs, automated documentation and intelligent/predictive design/layout techniques. Working with and supporting the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products to optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction.

About DevRev At DevRev, we're building the future of work with Computer – your AI teammate. Unlike traditional tools, Computer unifies all your data sources, tools, and workflows into a single AI-ready platform, giving employees real-time insights, proactive suggestions, and powerful agentic actions. It extends your existing software with AI-native apps and agents that work alongside your teams and customers – updating workflows, coordinating across teams, and eliminating repetitive work. We call this Team Intelligence: human-AI collaboration that breaks down silos, brings people back together, and frees you to solve bigger problems. Backed by Khosla Ventures and Mayfield with $150M+ raised, DevRev is trusted by global companies across industries. About the team The Applied AI Engineering team ensures our customers get the optimal experience from DevRev. As customers go through their DevRev journey, they may identify needs for integration with existing enterprise systems and services, workflow and process automation, or customization of the DevRev platform to achieve their business objectives. Our team works with customers to understand requirements and design, develop, and implement solutions to meet customer goals. Your mission is to systematically help customers find value with DevRev by developing a thorough understanding of their needs, owning coordination between internal and external stakeholders, and engineering the solution to get the job done. You are a product expert and will use your application development and AI/ML skills to ensure our customers get the most out of the DevRev platform. About the role As a Forward Deployed Architect, you will serve as a hands-on senior technical architect on the Applied AI Engineering team, owning the end-to-end design and delivery of AI-driven business transformation projects. You will work closely with pre-sales teams to scope technical integration and implementation strategies, translating business requirement

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Sr Design Engineer, you will work on design, simulation, and validation of next ‑ generation High ‑ Bandwidth Memory (HBM) architectures and circuit blocks. HBM requires advanced DRAM design knowledge combined with deep understanding of 3D stacked architecture, TSV signaling, wide I/O interfaces, PHY timing, power integrity, and system co ‑ optimization with GPUs/accelerators. This role sits at the intersection of DRAM design and high ‑ performance computing, enabling future AI/ML, HPC, and advanced graphics products. In this position, you will collaborate with Micron’s various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction.

About us GoCardless, a Mollie company, is a global leader in bank payments. Over 100,000 businesses, from start-ups to household names, use GoCardless to collect, manage and send bank payments through Direct Debit, real-time payments and open banking. With US$130bn+ processed annually across 30+ countries, we handle recurring and one-off payments without the chasing, stress, or expensive fees. Our end-to-end payment platform also features AI-powered solutions to improve payment success and reduce fraud, alongside connections to over 350 platforms businesses use everyday. We are headquartered in the UK, with teams and operations spanning North America, Europe and Asia-Pacific. For more information, please visit www.gocardless.com and follow us on LinkedIn @GoCardless. Mollie is the leading payments and financial services partner for business, rooted in Europe, with global reach. The role GoCardless is the leading open banking payments network. We process payments for tens of thousands of businesses globally, from start-ups to household names, and we are growing fast. In ANZ, we work with some of Australia and New Zealand's most ambitious companies, and our Sales-led merchant segment is at the heart of that growth. We are looking for a Technical Account Manager (TAM) to join our ANZ Customer Success team. This is a new role, created to meet growing demand from Sales-led merchants who need expert technical support alongside their commercial relationship. You will work closely with our Customer Success Account Managers (CSAMs), serving as their technical counterpart throughout the merchant lifecycle, from integration and go-live to ongoing optimisation and expansion. The CSAMs own the commercial relationship; you own the technical one. Together, you make sure our merchants get the most out of GoCardless. What you will do: Technical relationship management Serve as the primary technical point of contact for a portfolio of sales-led merchants, building

About Mach Industries Founded in 2023, Mach Industries is a rapidly growing defense technology company focused on developing next-generation autonomous defense platforms. At the core of our mission is the commitment to delivering scalable, decentralized defense systems that enhance the strategic capabilities of the United States and its allies. With a workforce of approximately 350 employees, we operate with startup agility and ambition. Our vision is to redefine the future of warfare through cutting-edge manufacturing, innovation at speed, and unwavering focus on national security. We are dedicated to solving the next generation of warfare with lethal systems that deter kinetic conflict and protect global security. The Role Mach Industries is seeking an Integration Reliability Engineer to develop the methods that enable complex products to be assembled, integrated, tested, and fielded reliably throughout the product lifecycle. You will support integration strategy, build readiness, interface risk management, failure investigation, and reliability growth across product development and production. This role spans Design Engineering, Manufacturing Engineering, Test Engineering, Operations, Program Management, and field support. The work is hands-on and connected to integration builds, production environments, test activities, and hardware failure investigations in Victorville, Ca.. Key Responsibilities Define integration strategies that establish readiness for component, assembly, and production. Conduct risk assessments, and inspection plan reviews for complex products and assemblies. Develop and improve control plans, initial controls, and methods for integrating complete systems. Support component integration, built-to-print assembly, validation activities, and the transition from development into repeatable production. Monitor yield, build health, and process robustness to identify risks affecting throughput and product realization. Lead systemic root-cause and co

Abbott is a global healthcare leader that helps people live more fully at all stages of life. Our portfolio of life-changing technologies spans the spectrum of healthcare, with leading businesses and products in diagnostics, medical devices, nutritionals and branded generic medicines. Our 122,000 colleagues serve people in more than 160 countries. JOB DESCRIPTION: The Process Development and Automation Engineer II provides technical engineering support for laboratory automation, equipment, and data systems within a complex clinical laboratory environment. This role supports the implementation, integration, troubleshooting, and continuous improvement of automation solutions, including PLC-based systems, SCADA/AVEVA platforms, and related data and reporting tools. The Engineer II collaborates cross-functionally to support system design, validation, commissioning, and ongoing operational performance. Essential Duties Include but are not limited to the following: Serve as the technical lead for AVEVA implementation, expansion, and sustainment across automation systems. Develop, maintain, and troubleshoot PLC-based data collection and integration solutions. Configure, validate, and support AVEVA, Historian, Insight, and associated reporting systems. Partner cross-functionally with teams to ensure accurate automation performance data. Design and implement automation data structures, tags, state models, downtime tracking, fault monitoring, and KPI reporting. Support commissioning, SAT, go-live, and lifecycle management of new automation systems. Drive continuous improvement initiatives using equipment performance and reliability data. <li style=

About the Team The Corporate Development team sits at the intersection of OpenAI’s strategy and the global AI ecosystem. Partnering closely with research, engineering, product, GTM and business leaders, we analyze markets, technologies, and companies to identify opportunities that accelerate OpenAI’s mission and long-term strategy. Bringing together expertise in strategy, M&A, and integration, the team leads the end-to-end process of sourcing, evaluating, negotiating, and integrating acquisitions and other strategic transactions. About the Role This is a high-visibility, strategically critical, cross-functional role at the intersection of M&A execution, enterprise go-to-market, and operational excellence. You will lead the critical phase from diligence through integration planning and post-close follow-through, define repeatable integration playbooks, and partner directly with senior stakeholders to ensure each transaction delivers intended value. The ideal candidate brings structured, hands-on integration experience, with particular expertise in enterprise / B2B transactions and a passion for AI, including building an AI-native corp dev platform. This role is based in our San Francisco HQ. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Lead integration planning and strategic execution for acquisitions from diligence through post-close follow-through, with clear owners, milestones, risks, and decision points. Translate deal rationale into practical integration goals and plans across product, engineering, sales, partnerships, customer success, people, finance, legal, security, systems, and communications. Partner with deal leads during evaluation and diligence to assess integration considerations, including tech stack, talent assessment, GTM alignment, transaction structure, operational readiness, and execution risk. Advise sponsors on how best to bring onboard acquisitions