Python Backend Engineer Jobs

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work , to amplify human creativity and intelligence. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world! As a Formal Verification Engineer at NVIDIA, you will be responsible for formally verifying complex designs. NVIDIA has developed a strong functional formal verification methodology that not only enables hardware design and verification engineers to use lightweight FV tools and techniques successfully but also allows FV engineers to use advanced property proving techniques on complex and/or critical RTL logic. The job involves very close interaction with the design team, architecture team, with other validation teams, and with NVIDIA's internal FV R&D group that develops functional verification tools using formal verification technology. What you'll be doing: You will help decide on the best applications of formal verification techniques to various parts of the design. Review functional and micro-architectural specifications, define the scope for formal verification, and create high-quality formal verification testplans to sign-off on the corresponding design implementation. Build formal verification testbenches, code assertions and constraints, and apply abstra

Our Purpose Mastercard powers economies and empowers people in 200+ countries and territories worldwide. Together with our customers, we’re helping build a sustainable economy where everyone can prosper. We support a wide range of digital payments choices, making transactions secure, simple, smart and accessible. Our technology and innovation, partnerships and networks combine to deliver a unique set of products and services that help people, businesses and governments realize their greatest potential. Title and Summary Lead Network Engineer (Tier 3 Network support) Role Overview The Global Network Engineering team is responsible for: supporting and assisting in the design, architecture, implementation, security, and ongoing support of large-scale, multi-site, multi-vendor MPLS network environments. As a Lead Network Engineer on the Tier 3 Network support team, you will be responsible for preparing high‑level (HLD) and low‑level (LLD) network designs to support both the expansion of existing Mastercard network environments and the build‑out of new greenfield sites. This includes coordinating with internal stakeholders, engineering teams, and external vendors/service providers to ensure the network is designed, implemented, validated, and fully ready for go‑live. The role involves end‑to‑end ownership across solution design, implementation guidance, testing, and operational readiness. Work Arrangements: • Hybrid work arrangements with minimally 3 days onsite. • Regular hours with occasional need for standby support will be required especially during critical project implementation phases. • Occasional travel might be required depending on business needs. All about You The ideal candidate should possess the following skills/competencies: 1. Core Networking (Routing & Swi

Our Purpose Mastercard powers economies and empowers people in 200+ countries and territories worldwide. Together with our customers, we’re helping build a sustainable economy where everyone can prosper. We support a wide range of digital payments choices, making transactions secure, simple, smart and accessible. Our technology and innovation, partnerships and networks combine to deliver a unique set of products and services that help people, businesses and governments realize their greatest potential. Title and Summary Senior AI Platform Engineer (DevOps) Who is Mastercard? Mastercard powers economies and empowers people in 200+ countries and territories worldwide. Together with our customers, we're helping build a sustainable economy where everyone can prosper. We support a wide range of digital payment choices, making transactions secure, simple, smart, and accessible. Our technology and innovation, partnerships, and networks combined to deliver a unique set of products and services that help people, businesses, and governments realize their greatest potential. Our decency quotient (DQ) drives our culture and everything we do inside and outside our company. We cultivate an environment where individuals can thrive, collaborate, and contribute to innovations that power the global economy. Overview: The AI Platform Engineering team is responsible for building, operating, and evolving Mastercard's enterprise AI platforms and capabilities. Our mission is to provide scalable, secure, and reliable AI infrastructure that enables teams across Mastercard to accelerate the development and deployment of AI-powered solutions. As a Senior AI Engineer, you will help design, implement, and operate the foundational platforms that support AI and machine learning workloads across the enterprise. You will work at the intersect

Data Engineer Description - Key Roles Designs and establishes secure and performant data architectures, enhancements, updates, and programming changes for portions and subsystems of data pipelines, repositories or models for structured/unstructured data. Analyzes design and determines coding, programming, and integration activities required based on general objectives and knowledge of overall architecture of product or solution. Writes and executes complete testing plans, protocols, and documentation for assigned portion of data system or component; identifies and debugs, and creates solutions for issues with code and integration into data system architecture. Collaborates within a project team of other data engineers to develop reliable, cost effective and high-quality solutions for assigned data system, model, or component. Analyzes data inaccuracies, identifies opportunities and supports the development of automated solutions to enhance overall quality of the enterprise data. Identifies problematic areas and conducts research to determine the best course of action to correct the data; identifies, analyzes and interprets trends and patterns in complex datasets. Works cross-functionally with different departments to assess, define, and develop report deliverables. Represents the software data engineering team for all phases of larger and more-complex development projects. Provides guidance and mentoring to less experienced staff members. Education & Experience Recommended Four-year or Graduate Degree in Computer Science, Information Technology, Software Engineering, Statistics/ Mathematics, or any other related di

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s Chemistry Lab plays a critical role in advancing semiconductor technology by developing analytical methods that support materials understanding, process development, defect characterization, and next-generation memory innovation. The team applies advanced chemical, optical, and surface characterization techniques to solve complex materials challenges across semiconductor manufacturing and research. We are seeking a highly motivated summer intern to contribute to advanced spectroscopy and nanoscale characterization projects focused on semiconductor thin films, surfaces, interfaces, and process-induced material changes. Working alongside scientists and engineers in Corporate Labs, the intern will develop and apply spectroscopy-based characterization methods, analyze complex materials datasets, and gain experience in experimental design, data analytics, and semiconductor materials research within an industrial laboratory environment. Responsibilities Conduct experiments using advanced spectroscopy and microscopy techniques to characterize semiconductor thin films, surfaces, interfaces, and related materials. Collect, process, analyze, and interpret spectroscopy data, including photoluminescence, fluorescence lifetime, Raman, and AFM-IR datasets, and develop visualization workflows to communicate results. Correlate spectroscopic signatures with material properties, process conditions, surface states, and defect behavior while colla

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Thin Films Equipment Engineering team at Micron develops and enhances advanced semiconductor manufacturing equipment in a fast-paced research and development environment. The team works closely with Process Engineering, Facilities Engineering, and equipment suppliers to enable next-generation memory technologies and achieve world-class equipment performance. Through innovation, collaboration, and data-driven decision-making, the team plays a critical role in advancing semiconductor technology development. As a Thin Films Equipment Engineering Intern, you will gain hands-on experience working with groundbreaking semiconductor equipment and processes. You will support engineering projects focused on equipment optimization, data analysis, and technology development while collaborating with multi-functional teams. This role provides exposure to semiconductor manufacturing, experimental design, and the application of advanced analytics to solve complex engineering challenges. Responsibilities Collect, analyze, and interpret equipment and process data to find opportunities for performance optimization and continuous improvement. Support structured engineering experiments, document findings, and communicate results through technical reports and presentations. Collaborate with Equipment Engineering, Process Engineering, Facilities Engineering, and equipment suppliers to address technology-development challenges and improve equipment performance. Develop an understanding of equipment hardware,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about driving innovation for next-generation memory solutions powering AI/ML and high-performance computing systems. As a Director of HBM RTL Design and Integration, you will lead a team responsible for the design, integration, and delivery of next-generation HBM SoC logic die, with a strong focus on RTL development and IP integration. You will drive technical strategy and execution across multiple product generations, working closely with architecture, verification, physical design, firmware, and product engineering teams. Key Responsibilities Lead SoC RTL design and integration for HBM logic die, including subsystem partitioning, IP integration, and SoC-level design convergence. Drive translation of architectural and micro-architectural specifications into robust, high-quality RTL implementations across multiple teams. Oversee SoC integration aspects, including clocking, reset, power intent, configuration infrastructure, and system-level design correctness. Establish design methodologies and best practices to improve quality, reuse, and development efficiency across HBM programs. Partner with SoC Architecture, Verification, Physical Design, Firmware, and System teams to ensure successful end-to-end product execution. Work closely with Product Engineering, Test, Probe, Process Integration, Assembly, and Manufacturing to ensure robust, manufacturable HBM

Job Details: Job Description: We are seeking an experienced Analog Design and Infrastructure DA Manager to lead the development, deployment, and governance of analog/mixed-signal design environments and CAD infrastructure. This role owns EDA tool ecosystems, PDK integration, compute infrastructure, design data governance, and tapeout manifest management to ensure high productivity, reproducibility, and audit readiness across silicon programs..The ideal candidate combines deep analog/mixed-signal design flow and e-test structure development expertise with strong infrastructure leadership and disciplined configuration/data management practices. Key Responsibilities-1. Analog Design Environment and Flow Management-Own and maintain analog and mixed-signal design flows using platforms such as Virtuoso ,Develop and maintain schematic, layout, verification, and extraction flows (LVS, DRC).Support simulation environments including HSPICE, Corner analysis.Drive automation and methodology improvements to reduce turnaround time and increase design robustness. 2. Infrastructure and Compute Management Oversee Linux-based DA infrastructure including compute farms, storage systems, and license servers (FlexLM). Manage LSF/grid environments and job scheduling systems. Ensure scalability, system monitoring, high availability, and performance optimization. Partner with IT on hardware lifecycle planning, cloud integration, and disaster recovery. Maintain secure, access-controlled design environments aligned with IP protection policies. 3. Design Data, Manifest and Configuration Management Design Data Governance Manage large-scale analog design libraries, hierarchical database structures, and technology libraries. Define backup, archival, and retention policies for tapeout-critical data. Implement data integrity validation and corruption prevention controls. Oversee distributed stor

We’re building a world of health around every individual — shaping a more connected, convenient and compassionate health experience. At CVS Health®, you’ll be surrounded by passionate colleagues who care deeply, innovate with purpose, hold ourselves accountable and prioritize safety and quality in everything we do. Join us and be part of something bigger – helping to simplify health care one person, one family and one community at a time. Position Summary Health100 is America's trusted front door to health and care. The Health100 platform integrates any participating health plan, PBM, pharmacy (retail and specialty), provider, digital health point solution provider, and employer, and addresses the top health care challenges for the consumer. We are looking for a hands-on, passionate engineering leader to join a high-energy, mission-driven team on the forefront of digital health innovation — reinventing how consumers engage with their health. As the Lead Director of Software Engineering, you will lead the strategic vision, development, and execution of our platform engineering roadmap. You will drive innovation, manage cross-functional teams, and ensure the delivery of high-quality products that exceed consumer expectations. As a key strategic leader, you will own integration strategy and execution across multiple domains, managing partner requirements, technical constraints, and external commitments while advancing platform modernization initiatives. You will partner closely with external stakeholders, understand their technical constraints and success criteria, and communicate risks and feasibility clearly in both technical and business terms. Responsibilities: </

At NVIDIA, we are at the forefront of technological innovation, pushing the boundaries of AI and accelerated computing. Our team in Santa Clara, CA is looking for a Senior Software Engineer in Test to join us in this exciting journey. This is a ground breaking opportunity to work with powerful technology, collaborate with a world-class team, and make a significant impact in the industry. If you are passionate about AI and quality assurance, and thrive in a dynamic environment, this role is perfect for you! What you'll be doing: Accomplishing test cases to validate NVIDIA enterprise offerings, such as NIM, NeMo, and BioNeMo. Crafting, implementing, and maintaining automated test cases and supporting automation infrastructure. Collaborating with development teams to triage issues, perform root cause analysis, verify fixes, define additional tests, and improve test plans. Investigating and bringing to bear AI capabilities to accelerate the Quality Assurance (QA) process. What we need to see: MS or PhD degree in computer science or relevant field, or equivalent experience. At least 5&#43; years of professional experience in software testing. Proficiency in oral and written English. Comfort working with Linux OS. Strong skills in shell and Python programming. Strong knowledge of QA principles and background in software testing. Experience using AI development tools for crafting test plans, developing test cases, and automating test cases. Excellent problem-solving abilities. Strong interpersonal skills, quick learning ability, proactive approach, innovation, and dedication. Self-motivation and a passion for learning new hardcore technology. Knowledge in LLM and AI models is a plus. <

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice to join us today. Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips. What you'll be doing: As a senior member in our team, you will work with pre-silicon and post-silicon data analytics - visualization, insights and modeling. Design and uphold sturdy data pipelines and ETL processes for the ingestion and processing of DFX Engineering data from various origins Lead engineering efforts by collaborating with cross-functional teams (execution, analytics, data science, product) to define data requirements and ensure data quality and consistency You will work on hard-to-solve problems in the Design For Test space which will involve application of algorithm design, using statistical tools to analyze and interpret complex datasets and explorations using Applied AI methods. In addition, you will help develop and deploy DFT methodologies for our next generation products using Gen AI solutions. You will also help mentor junior engineers on test designs and trade-offs including cost and quality. What we need to see: BSEE (or equivalent experience) with 5&#43;, MSEE with 3&#43;, or PhD wi

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Additional Responsibilities Align TDT CMOS Device development and transfer objectives with Technology Development sites. Drive and ensure close collaboration with Design, TCAD, Modeling, and Product Engineering groups across Micron sites. Collaborate with process integration module owners and process owners to drive electrical characterization of CMOS devices and CMOS circuits and identify device improvement opportunities. Utilize technology development and transfer knowledge to develop new technology nodes to mature manufacturing capability while achieving key program metrics. Ensure CMOS devices meet electrical, performance, power, variability, and reliability targets required for product success. Drive close collaboration with device and process integration development groups at other Technology Development sites. Collaborate closely with manufacturing fabs to facilitate successful technology transfer and production ramp. Contribute to the fundamental understanding of CMOS technology and its impact on overall product figures of merit. Lead cross-functional exploration and development of future CMOS device architectures, including non-planar transistor technologies, by partnering with Device, TCAD, Process Integration, Design, and Manufacturing teams to enable future DRAM technology roadmaps. Drive adoption of AI, machine learning, advanced analytics, and engineering automation solutions to accelerate technology development, r

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Project Title Diffusion Capacity Optimization Through Constraint Workstation Improvement Project Description This internship provides an opportunity to work on projects focused on improving capacity and operational efficiency within the Diffusion manufacturing area. The intern will analyze manufacturing data, evaluate workstation performance, investigate recurring production constraints, and develop recommendations to improve equipment utilization, manufacturing throughput, and cycle time performance. The project will provide exposure to manufacturing engineering methodologies, capacity management, statistical analysis, and cross-functional collaboration within a semiconductor manufacturing environment. Objective of the Project Analyze Diffusion manufacturing performance and capacity utilization. Identify workstation constraints that impact throughput and cycle time performance. Investigate key sources of capacity loss and evaluate improvement opportunities. Develop data-driven recommendations to improve operational efficiency and manufacturing performance. Opportunities for Full Time Employment Successful interns who demonstrate strong analytic

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. About the Team At Micron Technology, we transform how the world uses information to enrich life for all. The Heterogeneous Integration Group (HIG) HBM Architecture team develops future High-Bandwidth Memory (HBM) architectures, PHY design methodologies, and automation solutions that enable next-generation AI, high-performance computing, networking, and data center applications. The team works closely with Architecture, Design Engineering, Verification, Product Engineering, and external partners to advance memory technologies while improving design quality, productivity, and development efficiency. Position Overview As a Senior or Graduate Engineering Intern, you will collaborate with experienced HBM architects and engineers to support the development of digital design methodologies, automation frameworks, timing analysis flows, and architecture validation solutions for next-generation HBM PHY and IO subsystems. This role offers hands-on experience in digital design, verification, automation, and timing analysis, while providing opportunities to leverage AI Assisted engineering workflows, Large Language Models (LLMs), and Generative AI tools to enhance engineering productivity and design efficiency. Responsibilities Support digital design, integration, and timing analysis activities for HBM PHY and IO subsystems, including timing constraint development and timing closure efforts. Develop an

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a member of the IP Protection team, you will build and operate data protection solutions that safeguard Micron's intellectual property throughout its lifecycle. You will partner with team members across all of Micron's business areas to identify and reduce data exposure risks, improve data governance, and enable secure collaboration both inside and outside the company. Responsibilities: Serve as the enterprise DLP authority, developing and managing data loss prevention policies spanning devices, electronic messaging, internet activities, cloud applications, and storage platforms. Develop and optimize advanced detection capabilities for source code, hardware designs, algorithms, product roadmaps, and other intellectual property using regex, fingerprints, EDM/IDM, and ML-based classifiers. Continuously tune DLP policies to reduce false positives and negatives while implementing automated remediation and tiered response workflows. Monitor and protect against data ex-filtration across key egress channels, including USB devices, email, SaaS applications, personal webmail, messaging platforms, generative AI tools, and cloud sync services. Develop detections for anomalous access and ex-filtration activities, such as bulk downloads, repository mirroring, and unusual after-hours behavior. Author and maintain information protection standards, DLP governance, runbooks, exception processes, and data points to measure program health an