Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron-Boise, ID, we are undergoing a historic $15 billion investment in semiconductor manufacturing; construction began in early 2023, with DRAM production slated for the second half of the decade. As a leader in the semiconductor industry, we build solutions that inspire and transform technology. With plans to invest more than $150 billion globally over the next decade in leading-edge manufacturing, we are looking for passionate people to join our Boise expansion team and contribute to the growth and innovation of the semiconductor industry. As a Senior CVD/PVD (Chemical Vapor Deposition/ Physical Vapor Deposition) Process Engineer you will be primarily responsible for starting up, developing, and optimizing processes to improve product quality, driving process yield improvements, cost reduction, productivity improvement and risk management as well as resolving manufacturing line problems. Your expertise will give to the production of high-quality semiconductor components that are pivotal to our customers' success. You will work closely with multi-functional teams to tackle process issues and implement solutions that improve efficiency and yield. Your passion for engineering and willingness to learn will help us overcome the challenges of this fast-paced industry. We are looking for someone who enjoys hands-on work, values collaboration, and is eager to dive deep into the technical aspects of semiconductor manufacturing. Responsibilities Process area knowledge DRAM development and
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Job Details: Job Description: The Role and Impact As a Development Tools Software Engineer, you will play a vital role in creating and optimizing cutting-edge software tools that support diverse engineering domains such as design, manufacturing, validation, silicon production, systems integration, and ecosystem enabling. On a day-to-day basis, you'll design, develop, debug, and validate algorithms, tools, and systems that empower internal and external engineering teams to deliver impactful products. Your contributions will directly enable the seamless integration of Intel silicon and software into innovative solutions, driving progress across industries. Business group You will join Intel Corporation, a leading global technology company dedicated to advancing semiconductor innovation and creating solutions that enrich the lives of people worldwide. The team focuses on developing robust software tools and methodologies that support Intel's engineering ecosystem, fostering excellence and driving high-quality results. This group plays a critical role in enabling Intel's broader mission of building world-class technologies and products that power the future of the digital world. Key Responsibilities - Design and implement software tools using modern software development methodologies and programming languages. - Debug, validate, and optimize algorithms and software systems for engineering applications, ensuring high performance and reliability. - Collaborate with cross-functional teams to create solutions that enable seamless integration of Intel silicon and software into impactful products. - Utilize secure coding practices to ensure the robustness and security of software tools across various engineering domains. - Continuously explore innovative solutions to enhance design, manufacturing, validation, and testing processes. <p st
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The HBM Design Technology Package Co-Optimization (DTPCO) organization is seeking a Staff Engineer! Lead the design and development of test vehicles that enable technology learning and risk reduction for future HBM products! This role serves as a key technical contributor within DTPCO, partnering closely with Architecture, Design, Layout, Product Engineering, Reliability, and Advanced Packaging teams to translate emerging product requirements and technology challenges into actionable test vehicle solutions. You will apply expertise in semiconductor design, physical implementation, silicon characterization, and advanced packaging technologies to define test structures, develop validation strategies, and generate data that drives product decisions across future HBM generations. Unlike a traditional product role centered on ownership of product blocks, this position emphasizes enabling learning in development and engineering. It does so by developing representative test vehicles and characterization structures. Key Responsibilities Serve as a technical lead for HBM test vehicle design and structure development within DTPCO. Partner with HBM product, technology and reliability team. Define and implement test structures targeting key learning areas such as package interaction and reliability Drive test vehicle content definition, structure specifications, measurement requirements, and validation objectives. Analyze silicon characterization and qualification results to identify optimization opportunit
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology’s DRAM and Emerging Memory Group (DEG) is a distributed team of engineers and innovators focused on advancing next-generation memory technologies. For more than 43 years, Micron has been a leader in semiconductor innovation, delivering solutions that power applications ranging from artificial intelligence and high-performance computing to immersive digital experiences. The team is committed to innovation, integrity, sustainability, and meaningful community impact while driving the future of memory technology. As an HBM Memory Design Engineer, you will design, analyze, and optimize digital, analog, and memory circuits used in High Bandwidth Memory (HBM) products. You will collaborate with global design, verification, and product teams to develop high-performance DRAM solutions that meet manufacturability, reliability, and performance objectives. This role provides the opportunity to contribute to innovative memory technologies supporting AI, HPC, and data-centric applications. As part of Micron’s AI-Enabled workforce transformation, you will leverage AI-Assisted tools and data-driven methodologies to improve engineering productivity, accelerate design analysis, enhance decision-making, and drive innovation throughout the product development lifecycle. Responsibilities Design, analyze, and optimize memory, logic, and analog circuits for HBM products, including support for layout, validation, and tape-out activities. Perform circuit verification, parasitic modeling, and design simulations
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron is seeking a highly motivated and experienced Technical Staff Member to join our Quality Engineering team in Boise, ID. Your role will be crucial in ensuring the reliability and quality of wafers shipped from our Boise manufacturing site! Summary The Product Quality and Reliability team ensures Micron delivers high-quality, reliable semiconductor solutions that meet customer expectations and business objectives. The team partners across product engineering, design, technology development, manufacturing, and reliability organizations to identify risks, solve complex technical challenges, and drive continuous improvements in product performance, yield, and customer satisfaction! Position Overview As a Senior Product Quality and Reliability Engineer, you will be a technical leader. You will drive product excellence in quality, dependability, and yield across advanced semiconductor technologies. You will lead complex technical investigations, influence product and technology decisions, and develop innovative approaches that strengthen quality systems and business outcomes. This role provides an opportunity to have broad interpersonal impact through technical leadership, multi-functional teamwork, and strategic problem-solving. Responsibilities Lead complex investigations involving yield excursions, product deviations, and quality issues, driving root cause identification, containment actions, and sustainable corrective solutions Define product quality and reliability moni
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking an experienced and motivated System IP RTL Design Lead to drive the definition and implementation of complex datacenter class IP for our next-generation semiconductor products. The ideal candidate possesses a deep understanding of System IP and SoC architecture, IP integration challenges, and is adept at leading a design team to deliver high-quality, scalable IP solutions. This role requires strong hands-on technical leadership, excellent communication skills, and a proven track record in the successful delivery of silicon IP. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A seasoned IP / SoC design leader with 20+ yrs of strong expertise in complex SoC architectures, high-speed protocols, and large-scale IP integration. Skilled in RTL design and debug (Verilog/SystemVerilog) with hands-on experience using industry-standard tools for simulation, synthesis, lint, CDC, and power analysis on high-frequency designs. Experienced in driving microarchitecture decisions, authoring design specifications, and performing complex PPA trade-off optimizations. A proactive problem so
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a highly skilled and experienced Engineer to lead post-silicon power characterization and correlation activities for cutting-edge semiconductor products. In this role, you will be responsible for developing and executing detailed power measurement strategies on silicon, correlating results with pre-silicon models, and driving improvements across power architecture, design, and modeling methodologies. You will serve as a key technical leader, interfacing across design, architecture, validation, and systems teams to ensure silicon meets power and performance specifications under all operating conditions. This role is hybrid, based out of Toronto, ON or Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are A Principal-level engineer with 8+ years in silicon power analysis and characterization, and a Master’s or PhD in EE, CE, or related field. Deep understanding of digital and mixed-signal power domains, including DVFS, leakage vs. dynamic power, and power gating. Highly proficient in lab-based power measurement using oscilloscopes, current probes, power analyzers, and SMUs, plus Python/Perl/MATLAB
Overview: The Insights product is an offering for Guidepoint's institutional investment and corporate clients, now in its 9 th year, that offers teleconferences, surveys, in-person events, and AI-facilitated data and content. The teleconferences live in an online library portal, which covers a wide of industries/topics that enables our clients to make informed decisions. All content features experts from Guidepoint’s proprietary global network and is conceptualized and hosted by former investment professionals (i.e. hedge fund analysts), sell-side equity research analysts, and industry professionals. This is a hybrid position based in our New York City office. What you'll do: Monitor a coverage universe of public companies within the global hardware and semiconductor sector by tracking earnings releases, investor presentations, SEC filings, sell-side research and industry news. Create and moderate teleconferences on timely topics featuring an expert from Guidepoint’s network with the goal of producing actionable insights for clients. Attend industry conferences to host client panels What you have: Bachelor’s degree or Master’s degree Minimum 10 years of sell-side or buy-side analyst experience Must follow bottoms-up, fundamental approach to investment research focusing on individual companies Has covered the Hardware and Semiconductor sector; candidates must be current on company/industry knowledge Ability to work in a fast-paced entrepreneurial environment Outgoing personality with the ability to speak with people at all professional levels Intellectual curiosity and desire to learn Effective time management and organizational skills Demonstrated ability to work both individually and as part of a team What We Offer: The annual salary range for this position is $210,000-$230,000. Additionally, this position is eligible for an annual discretionary bonus based on performance. You will also be eligible for the following benefits: 15
EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Senior Emulation Engineer Location: India - Remote Job Description: At EnCharge AI, we are building the next generation of AI compute silicon — purpose-built for high-performance, low-power, and scalable AI inference. As an Emulation Engineer, you will play a critical role in validating complex AI accelerator architectures on emulation platforms before tape-out. This position is ideal for someone passionate about bridging the gap between hardware and software in fast-paced, deep tech environments. Responsibilities: • Set up and maintain Siemens Veloce emulation and prototyping platforms • Adapt SoC designs for Emulation and Prototyping • Develop and debug emulation testbenches and system-level environments • Support pre-silicon validation, power/performance analysis, and early software bring-up. Participate in silicon bring-up and validation. • Collaborate with design and verification teams to isolate design issues and accelerate debug. • Optimize performance of the emulation workloads and reduce turnaround time. • Work with firmware/software teams to enable use of emulators for OS and driver testing. Required Background: • BS/MS/Ph.D. in EE, CS, or related field with 7+ years of SoC design experience. • Experience with emulation platforms (Veloce, Palladium, or ZeBu) and FPGA-based prototyping systems (proFPGA, HAPS, or Protium) • Experience with emula
EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. About the Role EnCharge AI is seeking a highly skilled and experienced AI Compiler Engineer to spearhead the efforts in developing and optimizing graph compilers tailored to cutting-edge AI and ML workloads. You will collaborate with hardware architects, and AI researchers to enhance performance, optimize computation graphs, and enable efficient model deployment on EnCharge’s Inference Accelerators. Responsibilities Architect, design, and implement optimizations for AI model execution on graph compilers to improve performance, reduce latency, and maximize hardware utilization. Work closely with ML researchers, hardware engineers, and software developers to design and deploy AI models, understanding and addressing hardware-specific challenges. Work on performance optimizations for neural network models, such as layer fusion, operator fusion, and graph-level transformations. Develop compiler optimizations and passes that convert high-level AI models (e.g., from TensorFlow, PyTorch) into intermediate representations (IR). Implement parsing, semantic analysis, and IR generation for deep learning frameworks. Research and integrate the latest advancements in compiler design, ML model optimizations, and hardware acceleration into graph compilers. Provide leadership, mentorship, and technical guidance to a team of engineers focused on graph compiler optimizations. Qual
About the Team OpenAI’s mission is to ensure that artificial general intelligence benefits all of humanity. Our Go-to-Market team helps organizations understand, adopt, and deploy OpenAI’s technology to solve meaningful business challenges and create lasting value. The Technology team works with leading software, internet, cloud, infrastructure, cybersecurity, semiconductor, and digital-native companies as they build new AI-powered products, transform internal operations, and rethink how they serve their customers. We partner with executives, product leaders, engineers, and go-to-market teams to help organizations integrate OpenAI’s capabilities into their products and businesses responsibly and at scale. The team collaborates closely with Solutions Engineering, Customer Success, Product, Research, Partnerships, Marketing, and Operations to turn customer priorities into successful, durable deployments. About the Role We are looking for an experienced Account Director, Tech to help build and grow OpenAI’s business across the technology industry. You will own relationships with a portfolio of strategic technology companies, helping executive, product, and technical leaders understand how OpenAI’s products can accelerate innovation, improve productivity, and create differentiated customer experiences. You will be responsible for developing account strategies, creating qualified pipeline, navigating complex enterprise sales cycles, and expanding adoption across products, teams, and use cases. This role requires a combination of enterprise sales leadership, technical fluency, commercial judgment, and the ability to operate credibly with both business and engineering stakeholders. You should be comfortable engaging with customers that have sophisticated technical environments, rapidly evolving AI strategies, and high expectations for product performance, security, reliability, and scale. Success in this role will be measured by revenue growth, depth of customer adoption,
NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice to join us today. Design-for-X Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions in AI for Chip Design and AI for Predictions in various use cases in manufacturing testing on some of the industry's most complex semiconductor chips. What you'll be doing: As a senior member in our team, you will work on innovating in the DFT Power, Thermal & Voltage Noise Methodology areas. This will include working on groundbreaking low power & thermal solutions for our manufacturing tests to be enabled at conditions that push the boundaries for our datacenter GPUs. You will work with multi-functional teams including Product Development & Power Architecture, implementing brand-new methodologies on hard-to-solve problems for improving our outgoing quality of chips. You will work on post-silicon data analysis for power to architect the next-gen solutions. In addition, you will help develop and deploy DFT methodologies for our next generation products using Applied ML & Gen AI solutions. You will also help mentor junior engineers on test designs and trade-offs including cost and quality. What we need to see: BSEE (or equ
NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice to join us today. Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips. What you'll be doing: As a senior member in our team, you will work with pre-silicon and post-silicon data analytics - visualization, insights and modeling. Design and uphold sturdy data pipelines and ETL processes for the ingestion and processing of DFX Engineering data from various origins Lead engineering efforts by collaborating with cross-functional teams (execution, analytics, data science, product) to define data requirements and ensure data quality and consistency You will work on hard-to-solve problems in the Design For Test space which will involve application of algorithm design, using statistical tools to analyze and interpret complex datasets and explorations using Applied AI methods. In addition, you will help develop and deploy DFT methodologies for our next generation products using Gen AI solutions. You will also help mentor junior engineers on test designs and trade-offs including cost and quality. What we need to see: BSEE (or equivalent experience) with 5+, MSEE with 3+, or PhD wi
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Summary Department Introduction The Front End Process and Cost Transformation (PROCT) team drives manufacturing performance by improving cost, productivity, operational efficiency, and process capability across Micron’s semiconductor fabrication network. The team partners closely with engineering, manufacturing, and business leaders to deliver pivotal initiatives that accelerate performance, optimize resources, and support Micron’s business objectives! Position Overview As a Fab PROCT FE Engineer, you will lead initiatives that improve manufacturing cost, maximize factory performance, and drive business process improvements across Front End operations. You will partner with multi-functional teams to find opportunities, solve complex operational challenges, and implement data-driven solutions that improve productivity, quality, and operational efficiency. This role combines program leadership, technical expertise, and strategic execution to deliver measurable business impact. Responsibilities Lead initiatives that support Front End cost reduction, productivity improvement, and factory output optimization goals Develop and execute multi-functional programs aligned with manufacturing and corporate business objectives Define project scope, objectives, timelines, deliverables, and resource requirements in collaboration with key stakeholders Establish program structures, manage dependencies, and track achievements to ensure successful execution Drive achievement of Integra
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Introduction The Systems Integration Group (SIG) develops advanced test solutions that support semiconductor manufacturing and product quality. The team partners across engineering, operations, procurement, and external suppliers to design, build, and deploy innovative hardware platforms that enable reliable testing and validation of semiconductor devices. Join the team building semiconductor memory test platforms for tomorrow’s AI infrastructure. Position Overview As an Electrical Design Engineer, you will design and develop electronic hardware used in advanced semiconductor test systems. You will apply electrical engineering principles to create analog, digital, and mixed-signal solutions that support manufacturing and product development. This role spans the full hardware development lifecycle, from concept and design through validation, deployment, and sustaining support. You will collaborate with cross-functional teams around the world to deliver reliable, high-quality test solutions. Responsibilities Design analog, digital, and mixed-signal electronic circuits from concept through implementation and validation Evaluate and select electronic components to meet system performance, reliability, and cost objectives Develop schematics and collaborate with PCB designers to create optimized board layouts Perform circuit simulation, analysis, and design verification using industry-standard tools Debug, test, and val
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