Senior Advanced Analyst Jobs

About Us Pearl is AI for professional services at global scale, combining advanced AI with verified human expertise to deliver help that is accurate, accountable, and fast. Since 2003, our network has connected millions of customers with licensed professionals across 196 countries, making real expertise available anytime, anywhere. Our Values Data driven: Start with truth, measure what matters. Courageous: Bias to action; run toward hard problems. Innovative: Seek novel, elegant solutions. Lean: Do more with less. Build, ship, learn fast. Humble: Strong opinions, lightly held. About the Role As a Senior Product Manager at Pearl , you will own discovery, strategy, and execution for high-impact products supporting Pearl Enterprise , with direct responsibility for driving revenue outcomes (including Enterprise contracts totaling $2.5M+). This is a hands-on, high-ownership PM role in a fast-moving, ambiguous environment. You will partner closely with Engineering, AI / Innovation (IL), Sales, and cross-functional stakeholders to define priorities, set OKRs, and deliver results at Pearl-speed. Pearl's product itself is increasingly AI-driven , and while this role does not require you to be an AI engineer, it does require comfort working with AI-powered products, AI prototypes, and AI-enabled teams. What You’ll Do Product Ownership & Execution Own the end-to-end product management role: problem definition, prioritization, roadmap creation, execution, and delivery. Partner with IL / AI leaders to define OKRs, priorities, and quarterly roadmaps aligned to Enterprise goals. Lead agile teams to execute against the roadmap with speed, focus, and accountability. Own releases and delivery using lean and agile practices, balancing experimentation with execution. Discovery, Data & Decision-Making Drive discovery through customer research, data analysis, experimentation, and rapid validation. Define product requirements for MVPs, AI-enabled features, and enhancements.

Description: Graviton is a privately funded quantitative trading firm striving for excellence in financial markets' research. We are seeking a Senior Quantitative Trader for our team in Gurgaon. We trade across a multitude of asset classes and trading venues with significant market share and constantly seeking to replicate our successes to newer exchanges and products. As a Senior Quantitative Trader your responsibilities will include Develop and deploy completely automated systematic strategies with short holding periods and high turnover Typical strategies deployed include Alpha-seeking strategies and Market Making Rigorously back-test strategies on in-house research infrastructure Graviton can offer a successful Quantitative Trader Exceptional financial rewards Friendly and collegial working environment Access to advanced trading systems for low-latency execution of strateiges Excitement of being a part of a new expanding trading business Requirements : Deep experience in HF/UHF Trading Live HF Trading experience for at least 2 years. PnL Track record with excellent sharpe ratios. Programming experience in C++ or C Proficiency in using Python, R, or Matlab for statistical/data analysis of HFT tick data Possess a degree in a highly analytical field, such as Engineering, Mathematics, Computer Science Benefits: Our open and casual work culture gives you the space to innovate and deliver. Our cubicle free offices , disdain for bureaucracy and insistence to hire the very best creates a melting pot for great ideas and technology innovations. Everyone on the team is approachable, there is nothing better than working with friends! Our perks have you covered. Competitive compensation 4 Weeks of paid vacation Monthly after work parties Catered breakfast and lunch Fully stocked kitchen Gym membership International team outing

1671 About the Role We are seeking a Senior Signal Integrity Engineer to develop, validate, and optimize high-speed signaling solutions across blade- and rack-level architectures for advanced compute platforms. This role sits at the intersection of silicon, package, interconnect, board, and system design , with a strong emphasis on hands-on measurement, simulation correlation, and cross-functional technical communication. Key Responsibilities End-to-end signal integrity analysis for blade- and rack-level system architectures. Analyze and optimize high-speed and low-speed I/O interfaces, including PCIe Gen4/5/6, Ethernet, DDR, SerDes, SPI , I2C, etc . and related interconnects. Perform time-domain and frequency-domain simulations using tools such as Ansys HFSS, Keysight ADS, Cadence Sigrity, CST, SPICE , or similar. Support hands-on lab validation using VNA, TDR, BERT, and high-speed oscilloscopes . Correlate simulation results with lab measurements to identify margin gaps, debug issues, and improve design methodology. Collaborate with silicon, package, board, connector, cable, and system design teams to optimize I/O channel performance. Work with interconnect vendors and ODMs to guide board layout, stack-ups, routing rules, and system design decisions. Review schematics, layouts, simulation results, and validation data for blade, backplane, and rack-level hardware. Prepare and communicate clear validation reports, measurement summaries, debug findings, and technical recommendations to internal teams, vendors, and senior technical stakeholders. Required Qualifications Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field . Strong experience in signal integrity for high-speed digital systems. Hands-on measurement expertise using VNAs, TDRs, BERTs, and high-speed oscilloscopes . Experience measuring and analyzing S-parameters, impedance profiles, eye diagrams, jitter, timing margins, insertion loss, return loss, and cro

Job Summary Reporting to the Memory Validation leadership team, the Senior Silicon DDR/HBM Validation Engineer will be responsible for the bring-up, validation, characterization and debug of advanced memory subsystems used in next-generation AI compute platforms. The role will focus on DDR and HBM technologies, working closely with silicon design, firmware, characterization, platform and systems teams to ensure robust memory subsystem functionality, performance and reliability. The successful candidate will take ownership of significant validation activities, contribute to debug and root-cause analysis efforts, and help improve validation methodologies, automation and infrastructure. The Team The Memory Validation team sits within the Validation organisation and is responsible for the bring-up, validation, characterization and debug of memory subsystems across Graphcore silicon and platform products. The team supports DDR and HBM validation activities throughout the product lifecycle, from first silicon through production readiness. Engineers work closely with architecture, RTL, firmware, characterization, systems and platform teams to ensure memory technologies meet functionality, performance, reliability and performance objectives. Responsibilities and Duties Execute validation and bring-up activities for DDR and HBM memory subsystems Verify memory bring-up software, firmware and scripts against defined project requirements Debug firmware, hardware and system-level issues and contribute to root-cause analysis activities Analyse system logs, validation data and characterization results to identify failures and performance issues Perform PHY characterization and analog-level analysis during stress testing and validation activities Develop and execute functional, stress, performance and corner-case validation tests Perform signal integrity, voltage, frequency and timing measurements using laboratory instrumentation Char

Who we are About Stripe Stripe, LLC. is a financial infrastructure platform for businesses. Millions of companies - from the world’s largest enterprises to the most ambitious startups - use Stripe to accept payments, grow their revenue, and accelerate new business opportunities. Our mission is to increase the GDP of the internet, and we have a staggering amount of work ahead. That means you have an unprecedented opportunity to put the global economy within everyone's reach while doing the most important work of your career. What you’ll do Responsibilities Build statistical models, define and analyze product and operational metrics, explore experimental design, and construct exploratory analysis with internal data. Work closely with product and business teams to identify important questions and answer them with data. Collaborate with other data scientists, engineers and operations to formulate innovative solutions to experiment and implement advanced data mining techniques. Conduct exploratory analysis on internal data to understand user behavior to inform product development. Drive the collection of new data and the refinement of existing data sources. Apply statistical and machine learning models on large datasets to measure results and outcomes, and identify causal impact and attribution. Predict future performance of users or products. Define, measure, and monitor key outcome metrics for teams and support Stripe’s business. Communicate complex concepts and the results of metrics and analyses in a clear and effective manner through creative visualization. Communicate findings broadly and interact with other teams including product managers, software engineers, marketing, and business development. Who you are Minimum requirements Must have a Master's degree or foreign equivalent in Operations Research, Statistics, Industrial Engineering, Business Analytics, Mathematics or a related field, plus three (3) years of

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We are looking for a highly experienced RTL engineer to own critical on- and off-chip interconnect components for our custom AI accelerator platform. You will drive the microarchitecture and RTL implementation of scalable on-chip communication fabrics connecting high-bandwidth compute, memory, and I/O subsystems as well as purpose-built off-chip interfaces and protocols needed to enable custom computing at scale. This is a senior, hands-on engineering role with broad technical ownership. You will drive design from requirements through the full silicon lifecycle, from architecture definition and performance analysis through RTL implementation, verification closure, physical design convergence, bring-up, and production readiness. You will plan and oversee the work of junior engineers and help drive and develop productive engineering relationships with external partners and help manage partner execution. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Own the microarchitecture, RTL design, and delivery of major SoC interconnect components, including network-on-chip fabrics, switches, routers, bridges, protocol adapters, arbiters, and traffic-management logic as well as off-chip protocol bridges and interfaces. Drive third party engagements to develop novel networking and interface protocols and silicon IP while ensuring high quality and de

Shape the Future with Dun & Bradstreet At Dun & Bradstreet, we believe data has the power to create a better tomorrow. As a global leader in business decisioning data and analytics, we help companies worldwide grow, manage risk, and innovate. Since 1841, businesses have trusted us to turn uncertainty into opportunity. We’re a diverse, global team that values creativity, collaboration, and bold ideas. Are you ready to make an impact and help shape what’s next? Join us! Explore opportunities at dnb.com/careers. The Senior AI Security Engineer is responsible for defining, designing, and advancing enterprise-wide security strategies and architectures for AI, GenAI, and machine learning platforms. This role leads the development of secure AI systems at scale by embedding advanced security principles across the AI lifecycle and driving the adoption of standardized, security-by-design practices. The Senior AI Security Engineer partners with engineering, platform, and risk leadership to proactively address emerging AI threats, strengthen organizational security posture, and ensure resilient, compliant, and scalable AI deployments. This role operates with significant autonomy and influences security direction across multiple teams and domains.

What is PerfectServe? PerfectServe is a leading provider of clinical communication and physician scheduling solutions in the health IT space. The company was founded in 1997 and has grown steadily since then, with a notable jump after several major acquisitions were announced in 2019. PerfectServe now has 400+ employees, 30,000+ customers — spanning medical practices, hospitals, and health systems — and $100 million+ in annual revenue. PerfectServe’s mission is to accelerate speed to care by optimizing provider schedules and routing communications — including messages, pages, calls, and alerts — to the right place at the right time in any care setting. By facilitating real-time information sharing, building better schedules, and automating important clinical workflows, we believe we can help our customers advance patient care and improve the well-being of their clinicians. Leading analyst firms like Gartner® and KLAS Research have consistently validated our approach: In 2026, PerfectServe was named highest in execution and furthest in vision in the Gartner Magic Quadrant™ for Clinical Communication and Collaboration — the clear segment leader. PerfectServe also received two Best in KLAS awards in 2026 — one for physician scheduling and another for ambulatory clinical communications. That makes for 11 Best in KLAS awards over the past 9 years. At PerfectServe, you'll have a unique opportunity to join a collaborative team with decades of experience that finds new ways to delight our customers every day. This involves consistent efforts to stay on the cutting edge of product development, which includes everything from implementing AI in new and existing solutions to brainstorming with customers about novel workflows. But you don't have to be in product to make in impact — everybody at PerfectServe contributes to important work that moves the business forward. If you're looking for a well-established, tech-forward company full of smart people doing meaningful work

Job Details: Job Description: About the Role Join a team developing next-generation CPU cores that power client, server, IoT, and AI platforms. As a Senior Physical Design Engineer (CPU), you will play a key role in delivering high-performance, power-efficient silicon solutions. You will take ownership of blocks within the CPU core design, driving implementation from RTL to GDS and contributing to advanced physical design methodologies. What You’ll Do Key responsibilities will include but not limited to: Own physical design and implementation of CPU core blocks or subsystems Execute synthesis, floorplanning, place and route, and design closure Perform static timing analysis (STA), power analysis, and physical verification Drive convergence of timing, power, and area (PPA) metrics Debug and resolve complex design issues across multiple design stages Develop and optimize design flows and automation scripts Collaborate cross-functionally with RTL design, verification, clocking, and full-chip teams Contribute to improving design methodologies and best practices Provide guidance to junior engineers where applicable Behavioral traits that we are looking for: Strong problem-solving and analytical thinking Takes ownership and accountability for deliverables Collaborates effectively across multidisciplinary teams Communicates technical concepts clearly and concisely Prioritizes work effectively in a fast-paced environment Continuously learns and applies new tools and methodologies Why Join Us Work on cutting-edge CPU core designs that power client, server, IoT, and AI platforms used worldwide Be part of

This is Adyen Adyen provides payments, data, and financial products in a single solution for customers like Meta, Uber, H&M, and Microsoft - making us the financial technology platform of choice. At Adyen, everything we do is engineered for ambition. For our teams, we create an environment with opportunities for our people to succeed, backed by the culture and support to ensure they are enabled to truly own their careers. We are motivated individuals who tackle unique technical challenges at scale and solve them as a team. Together, we deliver innovative and ethical solutions that help businesses achieve their ambitions faster. The Opportunity Adyen is building a top-tier AI engineering organization in Amsterdam, San Francisco and Madrid to drive our next chapter of innovation using AI globally across the entire company. This is a highly technical, hands-on role focused on the exploration and application of cutting-edge AI research within the financial technology sector. As a Senior AI Research Engineer, you will operate with a high degree of autonomy and responsibility , delivering strategic, high-impact outcomes that bridge the gap between advanced AI research and production-grade applications at a global scale, potentially impacting trillions of dollars in transactions annually. What You'll Do: Innovate and Deploy: Drive the execution of Adyen's AI strategy , focusing on the practical application of Generative AI (GenAI) and other AI methodologies in finance . This includes contributing to Adyen's efforts in key research areas such as AI agents for data analysis and operational workflows , human-in-the-loop for integrity risk , and development of foundation models . For instance, you might contribute to initiatives like the Data Agent Benchmark for Multi-step Reasoning (DABStep) , which evaluates AI agents on real-world data analysis tasks, including those from the financial sector. Build Production-grade Applications: Bridge the gap between cutti

About Scale At Scale AI, our mission is to accelerate the development of AI applications. For 8 years, Scale has been the leading AI data foundry, helping fuel the most exciting advancements in AI, including: generative AI, defense applications, and autonomous vehicles. With our recent Series F round, we’re accelerating the abundance of frontier data to pave the road to Artificial General Intelligence (AGI), and building upon our prior model evaluation work with enterprise customers and governments, to deepen our capabilities and offerings for both public and private evaluations. About Data Engine Our Generative AI Data Engine powers the world’s most advanced LLMs and generative models through world-class RLHF (Reinforcement Learning with Human Feedback), human data generation, model evaluation, safety, and alignment. The data we are producing is some of the most important work for how humanity will interact with AI. Our Approach As part of the interview process, you’ll be considered for opportunities across several teams within the GenAI Engineering organization, based on your interests, expertise, and business needs. Potential team placements include Allocation, Growth, Frontier Data, Trust & Safety, Pay, Operator, or Tasking Experience. Together, these teams power Scale’s AI data operations - from building high-impact datasets that push the boundaries of LLM capabilities, to optimizing contributor onboarding and incentives, to safeguarding data integrity through advanced trust, safety, and security measures. They work at the intersection of ML, operations, and analytics to ensure we deliver the highest-quality data at scale. Responsibilities: Design, build, and maintain robust, scalable systems across the full stack, including front-end, back-end, and infrastructure layers Implement high-impact features using modern technologies such as TypeScript, React, Node.js, MongoDB, Elasticsearch, and Temporal Collaborate closely with internal operators (your use

Senior Low Observables (LO) Mission Systems Integration Engineer Company: The Boeing Company The Senior LO Mission Systems Integration Engineer will lead design, integration, analysis, test, and production activities for low observable materials, structures, apertures, sensors, and radomes for mission systems. The role requires strong technical leadership, independent execution of complex tasks, advanced use of computational electromagnetic (CEM) solvers, and the ability to produce and defend technical results with minimal oversight. Key Responsibilities Lead design, modeling, and analysis efforts for LO materials, coatings, structures, and integrated mission systems to meet signature reduction and performance requirements. Independently apply CEM solvers (e.g., FEKO, HFSS, CST, WIPL‑D, xFDTD, or equivalent) to model antennas, apertures, radomes, and LO treatments; perform design optimization and trade studies. Drive integration of LO treatments with mechanical, thermal, and sensor/antenna system constraints; identify and mitigate producibility, testability, and sustainment risks. Plan, execute, and oversee laboratory and field tests (anechoic chamber measurements, antenna/radome characterization, RCS measurements); lead data collection, reduction, and validation activities. Develop and validate predictive models, reconcile simulations with measurements, perform uncertainty quantification, and provide actionable recommendations to engineering and program leadership. Produce high-quality technical documentation: test plans, test reports, technical memoranda, design reviews, and customer briefings. Mentor and provide technical oversight to junior engineers and technicians; ensure adherence to engineering processes, qual

Replit is the agentic software creation platform that enables anyone to build applications using natural language. With millions of users worldwide, Replit is democratizing software development by removing traditional barriers to application creation. About the Role We're seeking a Senior Product Manager with exceptional product sense to drive the user experience vision for tools at Replit. You'll focus on understanding developer and non-developer needs, designing intuitive AI interactions, and creating delightful experiences that that make coding accessible to everyone. You Will: Define and execute the user experience vision for AI-driven software creation Conduct deep user research to understand developer pain points and workflow needs Design AI-powered features that feel intuitive and magical to users of all skill levels Own user journey optimization from onboarding through advanced AI-assisted development Drive product strategy based on user feedback, market research, and competitive analysis Partner with design teams to create compelling AI interaction patterns and interfaces Who You Are: Obsessed with creating exceptional user experiences and have a track record of building beloved products Deeply empathetic towards developer pain points and make it a point to put yourself in users' shoes Strong at qualitative and quantitative analysis, turning user insights into actionable product decisions Excellent at storytelling and can articulate compelling user narratives and product visions Biased towards execution and learning through rapid iteration and user feedback Required Skills & Experience: 5+ years of product management experience with a track record of building exceptional user experiences Strong product sense and intuition for what makes great developer tools and experiences Experience conducting user research and translating insights into product strategy Deep intuition about AI trends and products, particularly in automation and natural language interf

Job Title Senior Commercial Pricing & Policy Specialist - LATAM Job Description Senior Commercial Pricing and Policy Specialist: Play a key regional role within Philips’ Personal Health (PH) business, strengthening pricing and commercial decision-making across Latin America and turning pricing insights into recommendations that support profitable growth. Your role: Analyze price variances, margins, and pricing trends to identify opportunities and recommend strategies that improve revenue, profitability, and commercial performance. Partner closely with Sales, serving as an internal pricing expert who evaluates and validates pricing for commercial opportunities while ensuring alignment with company commercial policies and guidelines. Support pricing decisions across Argentina and Chile, with additional exposure to Uruguay, Peru, Bolivia, and Paraguay, where operations are managed through distributors. Implement and support advanced pricing tools, track critical pricing indicators, and connect pricing strategies with business metrics such as Net Promoter Score (NPS) and market share to inform strategic decisions. Help strengthen pricing and commercial policy processes by bringing structure, analytical thinking, and business perspective, while coordinating pricing and portfolio strategy information with relevant regional stakeholders. You're the right fit if: You have a Bachelor’s degree in Finance, Strategy, Auditing, Accounting, or a related field, with no prior experience required; OR Vocational Education or equivalent with a minimum of 4 years of relevant experience in Pricing, Commercial, Finance, Strategic Management, Auditing, or equivalent. Your skills include pricing and financial analysis, margin and profitability assessment, and the ability to translate data and pri

At NVIDIA, we push the boundaries of computing innovation. Our ASIC Verification Engineers focus on developing the world’s top SoCs and GPUs. Joining us as a Senior ASIC Verification Engineer - GPU means working on modern technology powering consumer graphics and AI applications. This position is ideal for those passionate about technology and eager to impact computing’s future. What you'll be doing: As a key member of our ASIC Verification team, you will verify the design and implementation of the industry's leading GPUs. You will be responsible for verifying the ASIC build, architecture, golden models, and micro-architecture using advanced verification methodologies such as UVM or equivalent. Understand the design and implementation of your unit/cluster/chip, define the verification scope, develop the verification infrastructure, and verify the correctness of the design. Collaborate with architects, designers, and pre- and post-silicon verification teams to accomplish your task. What we need to see: Bachelor's Degree in EE, CS, or CE or equivalent experience. 5+ years of relevant experience. Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies. Experience with design and verification tools (VCS or equivalent simulation tools, debug tools like Verdi, Indago, GDB). Expertise in System Verilog or similar HVL. Strong debugging and analytical skills. Perl and C/C++ programming language experience desirable. Strong communication skills and the ability & desire to work as a great teammate are huge pluses. Experience in crafting test bench environments for unit and system level verification. #LI-Hybrid Your base salary will be det