Senior Hardware Design Engineer Jobs

NVIDIA is seeking a Senior Firmware Engineer to join our CSP Engagements team, focusing on system software for Datacenter products such as GB200. This role combines deep technical expertise in embedded firmware development with customer-facing responsibilities to enable cloud service providers with next-generation computing platforms. You will work at the intersection of hardware and software, driving technical solutions from concept through deployment. What you will be doing: Design and develop firmware solutions for manageability and observability of data center servers. Actively participate in hardware bring-up activities, OOB firmware development, protocol stacks (Redfish, PLDM, MCTP, NSM) and hardware-software co-design for Cloud Service Provider deployments. Debug and troubleshoot NVIDIA GPU firmware issues, power management, performance, and thermal control problems for data center deployments, providing active support to CSPs. Partner directly with CSPs to deliver technical solutions, co-develop & co-debug features and optimizations, and provide support during new product introductions. Perform advanced system debugging, root cause analysis, and performance optimization for large-scale data center environments. Collaborate with AE, FAE, and Solution Architect teams to deliver integrated customer solutions and technical documentation. What we need to see: Deep expertise in data center server architectures, HPC systems, and hardware-software co-design. Deep expertise in embedded firmware, server management controllers, and hardware bring-up with proven track record of shipping production BMC solutions Strong knowledge of DMTF protocols (Redfish, IPMI, PLDM, MCTP, SPDM), telemetry frameworks, and out-of-band management architectures Expert-level skills in C/C&

At Carbon, our mission goes beyond 3D printing. We are enabling creators everywhere to make what the world needs, right now. Our company is built on the idea that diverse fields of study must come together to solve intractable problems. We have grand ambitions to create technology that will influence industry around the world. You will be joining a diverse team with a vibrant culture, where team success is as important as celebrating individual contributions. Help us change the world and we will help you change yours. We are looking for a Firmware Engineer to lead our technical team and architect our firmware development. This role requires strong skills in firmware architecture, driver development, requirements specification, and embedded control systems, along with enough electronics knowledge to work fluently with hardware teams. This is an in office role with 4-5 days expected in office in Sunnyvale California. Flexible working from home is allowed and expected during different phases of our projects. Responsibilities Lead the firmware engineering team and represent firmware priorities in cross-functional design discussions Partner with Electrical, Mechanical, Software, and Systems Engineering to design, validate, and ship products, including: Writing drivers and state machines for custom PCBs (with EE) Building firmware within mechanical design constraints (with ME) Integrating firmware into the software update pipeline, help develop firmware build systems, and debugging firmware to software communication (with SWE) Debugging test hardware and resolving customer issues (with Systems) Write firmware to actuate smart hardware devices, including sensor integration, signal processing, motor control, and feedback control system design Develop and maintain real-time C/C++ firmware on TI/ARM platforms using TI-RTOS Build unit, board, and regression tests in C++ and Python using test-driven development Define and implement firmware development best p

About the Team DoorDash Labs is an independent innovation hub within DoorDash, focusing on developing automation and robotics solutions to enhance last-mile logistics. Our mission is to create technologies that support and augment human networks, aiming to improve efficiency for Dashers, merchants, and consumers alike. We are a highly senior team composed of former pioneers from a variety of different robotics industries. If you have a passion for applying AI and robotics solutions in a service used by millions of people, then we want to talk to you! Please Note: This role is based in San Francisco, CA, and requires being in-person 5 days a week. About the Role We are seeking a Senior RF Engineer to join our multidisciplinary team developing mission-critical RF/electrical systems for unmanned platforms.This role offers a rare opportunity to gain deep insight into RF design and validation, contributing across the full product lifecycle, from early concept and prototyping through production. In this role, you will apply deep expertise in electromagnetic theory and wireless system design to ensure autonomous platforms operate with exceptional reliability and precision. You will design, optimize and validate RF / mixed-signal PCBAs with a strong focus on interference mitigation, troubleshoot system-level desense, and leverage a thorough understanding of wireless technologies including LTE, 5G NR, Wi-Fi, GPS, and UWB. You’re excited about this opportunity because you will… Lead the development of innovative solutions that span across RF, Mixed signal and mechanical domain. Design RF hardware as well as wireless testbeds to support system validation, and lead the execution and documentation of system-level design and verification Provide expertise, mentorship to partner teams regarding EMI mitigation strategies, and cross-functional debug processes Characterize EMI caused by internal & external aggressors by tracing root causes using EMC probes

Manufacturing Engineer (Experienced or Senior) Company: The Boeing Company The Boeing Test and Evaluation (BT&E) Test Operations & Engineering (TO&E) Instrumentation Data System Installation Design team located in Berkeley, MO is seeking Manufacturing Engineers to provision Flight Test Instrumentation hardware on multiple aircraft platforms. On this team, a Manufacturing Engineer (Assembly & Installation) has the primary responsibility for the fabrication and installation of the mechanical and electrical hardware required to install a flight test data system. Design-Build Flight Test Manufacturing Engineers work the entire production cycle from review of engineering, manufacturing plan authorship, fabrication sourcing (inside and outside of Boeing) and detail planning, and continuing on through installation planning and shipside support. Manufacturing Engineers are owners of the build plan and ensure compliance to design configuration, build plan, and process requirements. Manufacturing Engineering performs Design for Manufacturing and Assembly (DFMA) analysis and develops an integrated build plan consisting of work instructions for assembly/fabrication, kitting, tooling, inspection requirements, and other outputs to ensure fabrication meets design, test, and program requirements. BT&E is currently hiring for a broad range of experience levels including Experienced and Senior level Manufacturing Engineers. Position Responsibilities: Synthesis of test hardware & instrumentation requirements in support of flight test Review of design models and drawings, creating/reviewing redlines and coordinating with design to incorporate updates Authorship of manufacturing plans to facilitate build

Staff Power Electronics Engineer About Us Graphcore is a globally recognized leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data center hardware that provide the specialized processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Job Overview: Graphcore is seeking a Senior Engineer, Power Engineering to aid in design, test, and development of the power delivery components from grid to chip. You will work closely with multiple cross-functional teams, including hardware engineers, firmware developers, and data center operations, to ensure the infrastructure we build meets customer requirements as well as attaining standards of performance, reliability, and scalability. This role will be hybrid-remote, based in Milpitas, CA and will involve a significant in-laboratory component along with some work-from-home. Responsibilities: Contribute to the design and specification of the components and systems in the grid-to-chip power chain. Build out the test environment and perform engineering test and validation of the grid-to-chip chain. Design test hardware including the overall test environment, test fixtures, loads, and other devices to simulate various loading conditions and to evaluate the performance of the power chain. Testing includes basic function testing, robustness and reliability testing, high-power cycle testing, high-bandwidth power testing, energy storage testing, and numerous other types of tests involved in AI power system validation. Design and prototype custom components as may be needed to support the Graphcore power architecture. This includes the low-level design of power conversion hardware and rapid prototyping. Su

Salary Range: PLN 350,700- 474,400 Subject to alignment to the responsibilities and duties of the role. Location: Gdańsk - Candidates must be local due to hybrid working policy About the job Make AI accelerator hardware feel native inside Kubernetes clusters. As a Staff Cloud Software Engineer, you will build Go services that connect accelerator hardware with Kubernetes. You will own software components that turn complex compute capability into a usable platform experience. Your work will shape how AI workloads discover, access and scale across cluster infrastructure. That means designing production services where reliability, performance and observability are part of the architecture. You will build CRDs, operators and Kubernetes components for ML and platform teams. You will partner with hardware, cloud and ML engineers on design choices and roadmap priorities. This is a senior IC role with room to set direction. You will mentor engineers, raise code quality and help define how Graphcore delivers cloud-native AI compute. The team and culture The Workload Management team sits between Kubernetes, cloud platforms and accelerator hardware. Work moves from architecture to implementation, review and production readiness without losing system context. You will be trusted to own technical areas, challenge assumptions and move important work forward. The pace is driven by clear priorities, fast feedback and strong engineering judgement. Decisions are made through evidence, prototypes and direct technical discussion. Engineers are expected to speak up early, share trade-offs and help the team learn quickly. What we’re looking for Strong Go engineering experience, with significant experience delivering complex production software Deep Kubernetes architecture knowledge, including CRDs, operators and cloud-native integration patterns Solid Linux understanding, with the ability to debug issues across distributed systems Experience leading technical initiatives and mentoring eng

About Leidos Leidos is a Fortune 500™ company aimed at embracing and solving some of the world’s most pressing challenges. Through science and technology, Leidos makes the world safer, healthier and more efficient. Get familiar with Leidos Life , our radical program for employees to balance work & life. Job Description We are seeking a Lead Transmission Line Engineer who will manage a collaborative and dynamic team working in a fast- paced environment, solving challenging problems involved with electric transmission. The successful candidate will serve as a Lead Engineer on electric transmission line design projects of overhead systems for some of the largest utilities in the country as well as regional utilities. The candidate will apply NESC, ASCE, ACI, NEC and other applicable standards in the engineering and design of all types of capital and maintenance projects from 34.5 kV to 500 kV. Additionally, the candidate will direct a team of engineers that regularly perform engineering analyses, PLS-CADD modeling, structure loading calculations, design structure framing and hardware assemblies, draft plans and specifications, and prepare bill of materials and procurement documents across project planning, engineering, environmental, permitting, and construction management phases. Successful candidate can expect a fast-paced, diverse work environment & flexible work hours/work arrangements as well as a manager and peers who will encourage career development and growth! This is a senior leadership role with primary responsibilities in client relations, staff management, proposal development, scope creation/change, project ex

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a senior High Speed Interconnect / Signal Integrity Engineer to design and validate high-bandwidth links for large-scale AI systems. You will define, model, and qualify interconnect solutions across copper and optical technologies for next-generation AI inference and training clusters. This role is on-site in Santa Clara, CA, Austin, TX, or Toronto, Canada. We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting Who You Are An experienced electrical engineer with a Bachelor’s or Master’s in Electrical Engineering. 5+ years working on high-speed communications (100G–1.6T), including signal integrity, channels, and links. Comfortable building and owning link and channel budgets and making clear tradeoffs between reach, loss, BER, and margin. Hands-on with SI tools and lab equipment such as Keysight ADS, VNAs, TDRs, BERTs, and protocol analyzers. Familiar with cable specification and testing, as well as accelerated life testing, mating life, and failure analysis. Able to collaborate across hardware, systems, and manufacturing teams; manufacturing/DFM/DTM experience is a plus. What We Need Define and specify high-speed interconnect architectures

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We are looking for a highly experienced RTL engineer to own critical on- and off-chip interconnect components for our custom AI accelerator platform. You will drive the microarchitecture and RTL implementation of scalable on-chip communication fabrics connecting high-bandwidth compute, memory, and I/O subsystems as well as purpose-built off-chip interfaces and protocols needed to enable custom computing at scale. This is a senior, hands-on engineering role with broad technical ownership. You will drive design from requirements through the full silicon lifecycle, from architecture definition and performance analysis through RTL implementation, verification closure, physical design convergence, bring-up, and production readiness. You will plan and oversee the work of junior engineers and help drive and develop productive engineering relationships with external partners and help manage partner execution. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Own the microarchitecture, RTL design, and delivery of major SoC interconnect components, including network-on-chip fabrics, switches, routers, bridges, protocol adapters, arbiters, and traffic-management logic as well as off-chip protocol bridges and interfaces. Drive third party engagements to develop novel networking and interface protocols and silicon IP while ensuring high quality and de

NVIDIA's GPUs and SOCs are the world leaders in power, performance and efficiency. We are continually innovating to deliver new and creative, unusual solutions to extraordinary problems in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Package Layout Engineer who is committed to making a difference in the world through their contributions! This position will collaborate with Technical Package Lead and different design teams in the design and development of sophisticated, detailed layout of IC substrates for NVIDIA products. In addition, work with design teams to plan schedules, resolve costs, manufacturing, and electrical design issues. What you'll be doing: As part of a Layout team, you will collaborate to implement high speed/density ASIC packages. Perform substrate breakout patterns for ASIC packages. Optimize package pinout incorporating system level trade-offs of pins assignment. Help perform package routing, placement, stack-up, reference plane and power distribution using Cadence APD or SiP tool suite. Propose layout design trade-offs to the Technical Package Lead for resolution and implementation. Conduct design feasibility studies to evaluate the Package design goals for size, cost, and system performance. Develop symbols and CAD library databases using Cadence APD design tools Develop methodologies to improve layout productivity What we need to see: Hold a B.S. Electrical Engineering or equivalent experience 5+ years experience in PCB Layout of graphics cards, motherboards, line cards or other related technology. Experience with HDI designs is a plus Proven experience in substrate layout of wire bond and flip chip packages, preferred Significant background with Cadence AP

Instawork is on a mission to create meaningful economic opportunities for skilled hourly professionals in communities around the globe. Our AI-powered labor marketplace helps local businesses scale, and enables global technology companies to push the frontiers of robotics and AI. Backed by world-class investors like Benchmark, Spark Capital, Craft Ventures, Greylock, Y Combinator, and others, we’re looking for exceptional talent to reimagine the way the world works. Senior Mechanical Engineer — Robotics Hardware Location - Bangalore Instawork Robotics Labs is building Instacore, our proprietary five-camera and IMU wearable capture rig. Hundreds of units operate across India every day, collecting real-world data used to train frontier Physical AI models. We are looking for a senior, mechanically focused engineer to own the complete hardware lifecycle for Instacore and future hardware products. This person will independently lead design, prototyping, manufacturing, testing, deployment, logistics, maintenance, and continuous improvement. What you’ll do - Own the mechanical design and development of Instacore and other robotics hardware from initial requirements through production and field deployment. - Create detailed CAD models, assemblies, engineering drawings, bills of materials, and manufacturing documentation. - Rapidly prototype and validate designs using 3D printing, machining, fabrication, and off-the-shelf components. - Design durable mounts, enclosures, fixtures, wearable components, packaging, and protective systems. - Own design for manufacturability, assembly, serviceability, reliability, and cost. - Improve cable routing, connector retention, strain relief, thermal management, ingress protection, and resistance to vibration and impact. - Design packaging and logistics processes that prevent damage during storage and transit. - Establish verification, stress-testing, quality-control, and acceptance-testing procedures. - Investigate field failures, d

This is Adyen Adyen provides payments, data, and financial products in a single solution for customers like Meta, Uber, H&M, and Microsoft - making us the financial technology platform of choice. At Adyen, everything we do is engineered for ambition. For our teams, we create an environment with opportunities for our people to succeed, backed by the culture and support to ensure they are enabled to truly own their careers. We are motivated individuals who tackle unique technical challenges at scale and solve them as a team. Together, we deliver innovative and ethical solutions that help businesses achieve their ambitions faster. Senior Partner Solutions Engineer - Hardware Adyen is looking for a Senior Partner Solutions Engineer with a track record of hands-on embedded Android or systems engineering work to own the technical relationship with one or more of our most complex hardware OEM partners. You'll be the primary technical authority on that relationship: root-causing the hardest device-level issues, holding senior OEM engineering counterparts accountable, and shaping how Adyen manages OEM technical relationships as the function grows. As Adyen evolves its hardware offerings and moves toward a hardware independence model, this role carries real weight. Your OEM relationship is one of the more demanding ones in the portfolio, and you're expected to bring judgment and strategy to it, not just execute an existing playbook. What you'll do: Serve as the primary, most senior technical advisor for your OEM's engineering team, leading escalations on the most complex device-level issues. Drive technical strategy for your OEM relationship: which issues to prioritize, which process gaps to close, and how automation and tooling should evolve. Lead cross-functional alignment across Product, Engineering, Hardware Integrity/Reliability, and Commercial on priorities for your OEM, especially when those priorities conflict. Design and drive adoption of tooling, automatio

About the Team DoorDash Labs is DoorDash's autonomous delivery group, building the robots and hardware that move goods without a driver. The Hardware team designs the electronics at the core of these systems — digital and mixed-signal control boards, power and motor-control electronics, embedded firmware, and the test and integration benches that prove the whole system works. We're building out an experienced and diverse set of electrical engineers to increase our velocity, bandwidth, and operations. About the Role You'll own mixed-signal and analog design — a key capability gap for the team — and raise the analog bar across our control hardware, from instrumentation and telemetry to sensor interfaces and precision analog. You will report into the Director, Electrical Engineering on our Hardware team in our DoorDash Labs organization. Our offices are open, and depending on the role this position is hybrid or fully onsite — expect to be fully onsite when needed. You're excited about this opportunity because you will… Design instrumentation and telemetry-measurement circuits, precision current sources, and high-quality amplifiers Design circuits around ADCs, DACs, and signal conditioning Design sensor interfaces — temperature, light, audio — and LED drivers Own power sequencing and EMC-aware analog design Bring analog rigor to design reviews and help set analog/EMC design practices We're excited about you because… Strong mixed-signal and precision-analog design background Instrumentation, telemetry, current-source, and power-amplifier design ADC/DAC and signal-conditioning design; sensor front-ends (temp/light/audio) and LED drivers EMC/EMI-aware design and mitigation experience You characterize analog performance in the lab (noise, bandwidth, accuracy) Compensation The successful candidate’s starting pay will fall within the pay range listed below and is determined based on job-related factors including, but not limited to, skills, experience, qualifications, work lo

Why RoboForce RoboForce is an AI robotics company developing Physical AI–powered Robo-Labor for dull, dirty, and dangerous work. The company's robots are engineered for demanding industrial environments, with a focus on real-world deployment and scalability. We are seeking a highly motivated Manufacturing Engineer to define and optimize manufacturing processes, develop production equipment, and provide manufacturing input during product definition for our advanced robotic systems. You will work closely with design, supply chain, and operations teams to establish reliable processes and equipment that meet quality, cost, and delivery requirements. Responsibilities Bridge the gap between initial concept and full production by providing design teams with critical insights on manufacturability, assembly, testing, and tooling. Apply design for manufacturing and assembly (DFM/DFA) principles and resolve manufacturability issues before production release. Define assembly sequences, work instructions, and tooling requirements; establish critical process and quality parameters; and validate processes before production release. Lead manufacturing readiness for new product launches, upgrades, and component changes by coordinating cost targets, resources, and schedules. Provide hands-on technical support and collaborate with external integrators and suppliers during tooling and equipment specification, validation, commissioning, and production ramp-up. Incorporate requirements for safety, product quality, resource utilization, and preventive maintenance into process and equipment design. Collaborate with cross-functional teams to synchronize priorities. Investigate manufacturing defects and process failures, implement corrective actions, and track improvements in yield, cycle time, and cost. Assess the manufacturing impact of engineering changes, update process documentation and tooling, and track risk mitigation actions through implementation. Requirements Bachelor’s degr

Why Sony Interactive Entertainment? Sony Interactive Entertainment isn’t just the Best Place to Play — it’s also the Best Place to Work. Sony Interactive Entertainment (SIE) is the company behind the PlayStation brand. As a subsidiary of Sony Group Corporation, we’re part of a proud legacy of innovation and excellence. SIE is a dynamic technology company, delivering cutting-edge hardware and network services to more than 100 million people and an entertainment leader, home to some of the most beloved and recognizable intellectual properties (IP) in the world. Our role at SIE is to create and nurture the experiences under the PlayStation brand, a name synonymous with entertainment excellence and creativity. Role overview We are seeking a Senior Localisation Quality Engineer, a highly skilled and innovative individual who brings together design-phase product thinking, software engineering expertise, localisation awareness, and technical problem solving. The role builds on the core responsibilities of a Senior Localisation QA Engineer, combining strong localization quality expertise with software engineering, automation, and earlier involvement in the product design and development lifecycle. This role is ideal for someone who has worked closely with design teams in Figma, has experience reviewing and validating designs before implementation, understands how localisation impacts product and UI design, and can build scalable technical solutions to improve quality across the product lifecycle. You will partner with design, engineering, product, and localisation teams to identify risks early, improve design quality and localisation readiness, and create tools, systems, and solutions that enable faster and smarter delivery. Rather than focusing only on post-implementation testing, this role emphasises early engagement in the design phase, including reviewing Figma files, prototypes, design systems, user flows, and content structures to ensure they are scalable, testable, a