Senior Silicon Validation Methodology Engineer Jobs

Job Details: Job Description: As a Senior Power and Performance (PnP) Engineer, you will be responsible for PnP product execution focused on measurements, analysis, and projections/estimates of Intel's unlaunched notebook and desktop products. Based on your technical knowledge of both Intel and the competition, you will help influence OEM customers, internal marketing teams, internal engineering teams, debug Intel silicon/platform on PnP issues, and be an integral part for Intel product launches. Core responsibilities to include following: Measure, analyze, and debug workloads to call out any power and/or performance gaps and close with internal engineering teams/architects Measure and analyze SoC/CPU and platform power on a rail by rail basis and debug any issues/gaps Align with other internal engineering teams and architects to ensure there is consensus on power and performance projections/estimates/measurements for both internal and external communication Guide, educate, and influence internal engineering teams, field account teams, and marketing teams on power and performance positioning of Intel products Create power and performance estimates on upcoming Intel products based on workloads to aid marketing decisions and help set internal KPI targets Own the publication of the Power Performance Guide (PPG) collateral to help guide OEM customers Bring up full test platform to enable both power and performance measurements including setup, calibration, and measurements. Qualifications: You mus

Director, Data Center Cooling Strategy & Partnerships Description - Shape the Future of AI Infrastructure As AI systems continue to scale, cooling has become one of the primary constraints to performance, power efficiency, and data center density. Building on more than 40 years of leadership in thermal management, fluidics, silicon technologies, and high-volume precision manufacturing, HP is exploring advanced microfluidics technologies to address the growing power and cooling challenges of future AI infrastructure. We are seeking a senior strategy and business leader to engage with industry partners, evaluate emerging opportunities, and help shape HP's direction at the intersection of semiconductors, liquid cooling, and data center technologies. This is a unique opportunity to work on emerging technologies at the intersection of semiconductors, liquid cooling, and hyperscale computing. The role combines strategy, ecosystem development, and business creation in one of the fastest-growing segments of the technology industry. Responsibilities Develop Strategy and Business Opportunities: Define market opportunities, customer segments, business models and growth strategy. Monitor competitive, technology, and ecosystem trends across AI infrastructure. Build Strategic Partnership: Develop and strengthen relationships with semiconductor companies, hyperscale cloud providers, server OEMs, contract manufacturers, and cooling solution providers. Identify opportunities to accelerate ecosystem adoption and create long-term strategic value. Drive Product and Market strategy: Translate customer requirements and market insights into product and portfolio recommendations. Align business, technology, and customer priorities to maximize market impact. Lead Cross-Functional Execut

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of the Heterogeneous Integration Group within Technology and Products, where we build High Bandwidth Memory solutions that power AI and ML platforms. Our team works at the edge of what’s possible, stacking and integrating advanced silicon technologies to deliver industry‑leading bandwidth, density, and power efficiency. We move fast, solve hard problems, and set technical direction others follow! This role sits at the center of next‑generation HBM development. As a senior SI/PI technical authority, you will shape system‑level decisions that directly impact performance, reliability, and scalability across multiple product generations. If you enjoy deep technical ownership, complex problem solving, and influencing architecture from concept to sign‑off, this role offers both challenge and impact. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities: Lead signal integrity channel analysis for 2.5D and 3D silicon interposers, including frequency‑ and time‑domain evaluation Define and drive power delivery architecture, impedance targets, and transient analysis Perform electromagnetic extraction and modeling across PCB, package, and interposer designs Establish SI/PI standards, methodologies, and sign‑off criteria for HBM system designs Provide clear technical direction in ambiguous or incomplete design environments Minimum Qualifications: 7 years of experience in

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a Senior Analog Design Engineer to join our High Bandwidth Memory (HBM) team. This role is responsible for the architecture, design, simulation, and silicon bring ‑ up of high ‑ performance analog and mixed ‑ signal circuits used in HBM PHYs and supporting infrastructure. The ideal candidate has deep expertise in high ‑ speed I/O, clocking, power management, and advanced ‑ node analog design, and has successfully delivered silicon to production. Responsibilities will include, but are not limited to: Design and own critical HBM analog circuits, including: High ‑ speed transmitters and receivers Clock generation and distribution (PLLs, DLLs, CDRs) SerDes ‑ related analog blocks Biasing, reference, and calibration circuits </

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to the Quality leadership within Manufacturing Operations, the Senior Reliability Scientist is responsible for leading reliability activities across complex, high-performance systems. Working closely with established reliability experts and cross-functional teams, this role uses experimental data and advanced modelling to inform design decisions, validate product reliability and optimise serviceability strategies, including spares provisioning. The Team The Quality team within Manufacturing Operations is responsible for ensuring product robustness, reliability and lifecycle performance across Graphcore’s hardware portfolio. The team includes experienced reliability specialists and works closely with technology research, chip, board, system design, platform and operations teams to translate reliability insights into actionable improvements across the product lifecycle. Responsibilities and Duties: · Define and refine reliability requirements across silicon, board and system levels, working in partnership with research and design teams · Apply ad

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) sits within the Technology and Products Group (TPG). We are developing High Bandwidth Memory (HBM) solutions for AI and ML applications! We stack multiple DRAM chips on a high-speed memory controller using TSV (Through Silicon Via) technology, dramatically increasing memory density and bandwidth. Our designs span custom digital and RTL2GDS flows, and we are targeting the lowest power per bit in the industry. Join us as a Senior Verification Engineer and contribute to modular, scalable verification solutions for next-generation HBM DRAM products! You will work independently within a multi-functional team of technical domain experts, spanning both IP-level and SoC-level verification. You will collaborate with Design Engineering, Product Engineering, and Business Units to complete the HBM verification roadmap. You will apply your solid understanding of testbench architecture, custom or SoC verification methodologies, and 2.5D & 3D package integration to evaluate issues, define solutions, and broaden your expertise. Responsibilities: Develop and implement verification plans and architecture collateral across IP-level and SoC-level verification for current and future HBM designs Support co-verification of the overall system and participate in customer interactions to gather feedback and provide recommendations for future HBM solutions Build and improve verification methodology components and GenAI applications aligned to HBM design cycles, broadening cross-disc

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are the team defining the future of memory systems. Our DRAM Architecture organization works at the intersection of silicon, packaging, systems, and customers to build technologies that power next-generation platforms. If you enjoy solving ambiguous problems that matter at industry scale, this is the place. This role is a senior technical leadership position with broad architectural ownership. You will develop complete DRAM system architectures, impact industry direction, and engage directly with customers and executives to convert complex ideas into scalable products. Responsibilities: Define next-generation memory system builds focusing on performance, capacity, RAS, and telemetry Lead cross-stack co-optimization spanning silicon, package, module, board, and system Architect sophisticated RAS and telemetry features and translate system needs into silicon Drive long-range memory technology strategy and influence industry standards Act as a senior technical liaison to customers, executives, and partners Minimum Qualifications: Bachelor’s degree or relevant equivalent experience in EE, CE, CS, or a related field Extensive hands-on experience in DRAM or memory systems architecture Deep understanding of DRAM timing, signaling, power, and reliability mechanisms Proven ability to translate system requirements into silicon architecture Preferred Qualifications: Master’s degree or PhD, or equivalent experience, in a related technical field Recognized techn

About Ema Ema builds AI Employees for HR, IT and Finance. Our AI Employees take on the busy work across the employee experience, from recruiting, onboarding and benefits to IT support, invoice processing and payroll, so people can spend their time on work that needs them. Founded by former executives from Google, Coinbase, Flipkart, and Okta, our team includes engineers from premier tech companies and graduates of Stanford, MIT, UC Berkeley, CMU, and IITs. We are backed by industry leading investors including Accel, Naspers/Prosus, Creaegis, Section32, and angels like Sheryl Sandberg and Dustin Moskovitz. Headquartered in Silicon Valley and with offices in London, Bangalore and Vancouver, Ema is at the frontier of what Agentic AI can do in production. We ship real systems that run real business processes at scale. Skills and Qualifications: Product Knowledge: Deep understanding of product offerings and their real-world applications, particularly in AI technologies, enabling effective communication of value to potential customers. Sales Expertise: Proven track record in building positive relationships, prospecting, and negotiating high-value deals with senior executives. Experience generating pipeline through cold calling and prospecting. Interpersonal Skills: Strong communication and interpersonal abilities, with the capacity to be personable yet persistent, adapting your approach to different customer needs. Technical Acumen: Effective combination of selling skills and technical understanding, focusing on strategic thinking, problem-solving, and value creation tailored to each unique client. Adaptability: Ability to thrive in a fast-paced, dynamic environment, with a high level of flexibility and the capacity to adapt to changing priorities and overcome challenges. Responsibilities: Lead Generation: Responsible for outbound prospecting, generating new leads, and developing comprehensive strategies to expand the company’s presence within targeted institutions or reg

Job Details: Job Description: The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful. Position Summar y This is a hybrid role requiring four days per week in the Washington, D.C. office Intel is seeking an experienced Executive Administrative Assistant and Office Manager for its Washington, D.C. office. This role reports to and provides high-level administrative support to the Vice President of U.S. Government Affairs while overseeing day-to-day office operations and helping maintain a productive, professional, and welcoming workplace. The position partners closely with the broader executive administrative team and serves as a central point of coordination for employees, visitors, customers, vendors, and external stakeholders. Success requires exceptional organization, discretion, sound judgment, executive presence, and a proactive, team-first approach in a fast-paced and dynamic environment. Responsibilities: •Provide advanced administrative support to the Vice President of U.S. Government Affairs and other senior leaders as needed, handling sensitive and confidential information with discretion and professionalism. •Manage complex calendars and provide real-time scheduling support, including resolving conflicts and reprioritizing commi

Job Details: Job Description: The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful. The Business Analyst- Data Center Systems supports the strategy and strategic programs function for Intel's Data Center Systems and Solutions team. Reporting to the Director of Strategic Programs, this role keeps the team's strategic work moving, compiling the data, running the logistics, and producing the first drafts that senior leaders build on. The work spans systems strategy, customer engagements, executive reviews, and cross-group programs across DCG, and it will not always arrive in a predictable order. We are looking for someone who is comfortable handling a mix of planned and unplanned requests, can switch between domains quickly, and takes ownership of getting each task to done. This is a growth role. You will start by running the logistics around the work and, as you build context, move toward contributing directly to analysis and strategy. Depending on your strengths and interests, you will have the opportunity to go deeper in areas such as systems strategy, market and competitive analysis, customer programs, or business planning. Responsibilities: Compile and analyze data from internal and external sou

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) within Micron's Technology and Products Group (TPG) leads the development of High Bandwidth Memory (HBM) solutions for AI and ML applications. Our modern designs use Through Silicon Via (TSV) technology. We stack multiple DRAM chips on a high-speed memory controller with a coordinated logic chip in one package. This new way improves memory density and bandwidth through parallelization. It aims to deliver the lowest power per bit solutions in the industry. As a Static Timing Analysis (STA) Engineer — you will be part of the Heterogeneous Integration Group (HIG), owning chip-level timing sign-off for next-generation die. You will work closely with RTL design, physical design, architecture, DFT, verification, and product teams to ensure timing integrity and drive timing closure across all modes and corners from initial design through tape-out. This is a hands-on senior technical role focused on chip-level STA ownership, constraint authoring, timing closure, methodology development, and pre-/post-silicon timing correlation. Key Responsibilities Responsibilities will include, but are not limited to: Own end-to-end chip-level static timing analysis and sign-off across all checks, modes, corners, and voltage and temperature conditions. Develop, maintain, and validate sign-off quality Synopsys Design Constraints (SDC) for clocks, resets, high-bandwidth memory (HBM) interfaces, design for test (DFT), and configuration logic. Drive timing closure at block, sub

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. In this position, you will be joining a brilliant team to collaborate with Micron’s various design and verification teams all over the world, support the efforts of design verification flow development, optimization, and implementation and work with cross-functional team to assure the best cost, quality, reliability, time-to-market, and customer satisfaction We are seeking a talented CAD senior engineer specialized in analog and digital simulations to join our high-achieving engineering team. As a CAD senior engineer, you will play a pivotal role in optimizing and simulating complex analog and digital circuits, contributing to the development of state-of-the-art products that shape our industry. You will get a chance to develop the industry's first and unique flows to enhance productivity and reduce pre-silicon failures. Responsibilities: Work closely with memory design teams and solve their daily challenges and provide complete solutions for the future. Proactively identify problem areas for improvement, propose, and develop innovative solutions. Develop highly scalable, and clean software systems. Continuously evaluate and implement new tools and technologies to improve the current software flows. Work with EDA vendors to evaluate and integrate E

About Ema Ema builds AI Employees for HR, IT and Finance. Our AI Employees take on the busy work across the employee experience, from recruiting, onboarding and benefits to IT support, invoice processing and payroll, so people can spend their time on work that needs them. Founded by former executives from Google, Coinbase, Flipkart, and Okta, our team includes engineers from premier tech companies and graduates of Stanford, MIT, UC Berkeley, CMU, and IITs. We are backed by industry leading investors including Accel, Naspers/Prosus, Creaegis, Section32, and angels like Sheryl Sandberg and Dustin Moskovitz. Headquartered in Silicon Valley and with offices in London, Bangalore and Vancouver, Ema is at the frontier of what Agentic AI can do in production. We ship real systems that run real business processes at scale. The residency The AI Residency is a 6-month builder role, not a research placement. Every engineer at Ema owns delivery end to end — from understanding the customer's problem to shipping, measuring and supporting it in production — and residents are held to the same bar. You won't be parked on one project: you'll contribute across several avenues, all toward one goal — creating real value and impact for our enterprise customers. Real production work. You work in the production codebase, on real customer problems and real production data. Recent residents have shipped agent harnesses, eval infrastructure, inference-cost reductions, PII redaction, automated QA pipelines and backend service hardening used by enterprise customers. End-to-end ownership. You take work from a problem statement to a shipped, measured result — design, build, test, launch, and the follow-through until it's reliable. Mentorship. A senior mentor, weekly 1:1s, regular reviews with your team, and exposure to the founders and engineering leadership. A path to full-time. Top-performing residents are offered full-time roles at Ema. Several of our engineers started as residents. Choose your

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology is seeking an experienced and highly motivated individual to join our team as a Senior Advanced CMOS Device & Process Integration Engineer. The successful candidate will combine strong engineering judgment with AI-assisted analytics ( Claud Assist, Code Assist, etc. ), coding, modeling, and knowledge-management tools to accelerate technology development and improve the quality and efficiency of technical decision-making. AI is expected to enhance, rather than replace, the engineer’s technical ownership, device expertise, and accountability. This position provides an opportunity to make significant technical contributions to current and future CMOS technologies for advanced memory products. As a Senior Advanced CMOS Device & Process Integration Engineer, you will own key device or process integration workstreams within advanced CMOS technology development. You will work closely with Process Engineering, Circuit Design, Layout, Product Engineering, Reliability, Manufacturing, Yield Enhancement, and Modeling/TCAD teams to define technical requirements, plan silicon experiments, resolve complex device issues, and transfer robust technologies into high-volume manufacturing. You will be expected to independently identify technical risks, develop data-driven solutions, and influence cross-functional engineering decisions. Responsibilities inc

Salary Range: PLN 350,000 - 474,000 PLN Subject to alignment to the responsibilities and duties of the role About the job Help system software engineers do their best work while keeping delivery clear, focused and moving. As System Software Engineering Manager, you will support engineers in Graphcore’s Gdańsk office. You will manage career development, coach individuals and help the team work with clarity. You will also act as Scrum Master for the Drivers and Utilities team. You will facilitate planning, remove blockers and help engineers turn priorities into achievable delivery plans. This is a management and facilitation role, not a hands-on development position. Your low-level software background will help you understand the work, ask better questions and support the team effectively. The role sits close to system software, silicon and hardware development. That gives you real scope to connect people, improve collaboration and shape how delivery happens. The team and culture The Drivers and Utilities team builds custom host control software in Linux kernel and user space. Their work includes low-level C and C++ libraries and tools that help customers get more from Graphcore products. Work spans teams, disciplines and locations. You will help engineers in Gdańsk stay connected, supported and heard within the wider System Software group. Decisions are shaped through shared context, clear priorities and practical planning. You will work with the Product Owner, technical leads and Senior Engineering Manager to keep progress visible. What we’re looking for · Experience managing and developing software engineers through coaching, feedback and career conversations. · Practical experience as a Scrum Master or in a similar team facilitation role. · Ability to help teams plan realistically, remove obstacles and improve without adding unnecessary process. · Experience working alongside Product Owners and technical leads, with clear role boundaries. · Strong communicati