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Simulation Engineer Jobs

853 active opportunities · Updated for October 2026

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Explore current simulation engineer jobs. Use filters to narrow by work mode, employment type, experience and date posted.

O
OKX
📍 San Jose• $250.4K – $375.7K/yr
7mo ago

Who We Are At OKX, we believe that the future will be reshaped by crypto, and ultimately contribute to every individual's freedom. OKX is a leading crypto exchange, and the developer of OKX Wallet, giving millions access to crypto trading and decentralized crypto applications (dApps). OKX is also a trusted brand by hundreds of large institutions seeking access to crypto markets. We are safe and reliable, backed by our Proof of Reserves. Across our multiple offices globally, we are united by our core principles: We Before Me , Do the Right Thing , and Get Things Done . These shared values drive our culture, shape our processes, and foster a friendly, rewarding, and diverse environment for every OK-er. About the Opportunity We are looking for a Principal AI Engineer to lead the architecture and deployment of large-scale, LLM-powered conversational Chatbot systems serving both enterprise and consumer use cases. This is a hands-on technical role focused on building intelligent, autonomous chatbot systems operating in real-time crypto environments. You will define the technical vision and own end-to-end delivery of production-grade conversational AI platforms. What You’ll Be Doing Lead the design, development, and lifecycle management for conversational Chatbots products for enterprise and consumer use cases. Drive experimentation, simulations, and continuous learning pipelines for Chatbot performance optimization. Design multi-level intent routing, classifier training, and fallback strategies. Building dialogue quality evaluation systems. Drive automated bad-case discovery, A/B testing, and continuous iteration loops. Ensure system scalability, security, and regulatory compliance of AI-powered solutions in the crypto exchange domain. What We Look For In You PhD or Master's in Computer Science, AI, Machine Learning, or related field with at least 10 years of industry experience . Deep understanding

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O
OKX
📍 San Jose• $250.4K – $375.7K/yr
7mo ago

Who We Are At OKX, we believe that the future will be reshaped by crypto, and ultimately contribute to every individual's freedom. OKX is a leading crypto exchange, and the developer of OKX Wallet, giving millions access to crypto trading and decentralized crypto applications (dApps). OKX is also a trusted brand by hundreds of large institutions seeking access to crypto markets. We are safe and reliable, backed by our Proof of Reserves. Across our multiple offices globally, we are united by our core principles: We Before Me , Do the Right Thing , and Get Things Done . These shared values drive our culture, shape our processes, and foster a friendly, rewarding, and diverse environment for every OK-er. About the Opportunity We are seeking a Principal Engineer with a deep expertise in autonomous AI agent architecture and deployment, to spearhead the design, development, and optimization of intelligent agent systems on our global crypto exchange platform. This is a senior role requiring a hands-on AI science background combined with strategic oversight, technical direction, and cross-functional collaboration. You will work at the cutting edge of AI and crypto, designing AI agents that can autonomously reason, act, and evolve in complex, real-time environments such as trading, security, compliance, and customer interaction. What You’ll Be Doing Lead the design, development, and lifecycle management of autonomous AI agents tailored to crypto exchange operations (e.g., customer assistant, trading bots, risk detection agents, fraud prevention agents, etc.). Architect multi-agent systems (MAS) and frameworks to support goal-directed, reasoning, planning, and reinforcement-learning-based agents. Collaborate with product, engineering, business, and operation teams to define agent roles and measurable KPIs. Drive experimentation, simulations, and continuous learning pipelines for agent performance optimization. Stay ahead of the curve

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About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons - all while shaping the future of connectivity. About the role: We’re looking for a Senior IPv6 Engineer to take ownership of IPv6 feature development and integration across our UniFi gateway routers. You’ll design, build, and optimize critical IPv6 networking components that enable secure, reliable, and high-performance connectivity for our global users. Responsibilities: Design, develop, and maintain IPv6 networking features in enterprise router firmware and software stacks; Ensure seamless IPv4-to-IPv6 coexistence (dual-stack, tunneling, NAT64, DS-Lite, MAP-E, etc.) for enterprise and ISP-grade deployments; Conduct performance tuning, benchmarking, and troubleshooting for IPv6 forwarding, security, and QoS features; Collaborate with product managers and system architects to define the IPv6 roadmap and feature priorities; Work closely with the QA team to suggest test plans, simulations, and automated test environments for IPv6 functionality. Requirements: 5+ years of experience in embedded networking software development; Strong hands-on experience with: IPv6 protocol stack implementation (L2–L7); IPv6 address management, DHCPv6, SLAAC; IPv6 Prefix Delegation; Experience with AI tools - Claude, Codex, etc; Fluent in English and Latvian. Nice to have: Experience with IPv6 interoperability testing with ISPs; Experience with IPv6 certification processes (e.g., IPv6 Ready Logo,

OKX will be prioritising applicants who have a current right to work in Singapore, and do not require OKX's sponsorship of a visa. Who We Are At OKX, we believe that the future will be reshaped by crypto, and ultimately contribute to every individual's freedom. OKX is a leading crypto exchange, and the developer of OKX Wallet, giving millions access to crypto trading and decentralized crypto applications (dApps). OKX is also a trusted brand by hundreds of large institutions seeking access to crypto markets. We are safe and reliable, backed by our Proof of Reserves. Across our multiple offices globally, we are united by our core principles: We Before Me , Do the Right Thing , and Get Things Done . These shared values drive our culture, shape our processes, and foster a friendly, rewarding, and diverse environment for every OK-er. OKX is part of OKG, a group that brings the value of Blockchain to users around the world, through our leading products OKX, OKX Wallet, OKLink and more. About the Opportunity We are looking for a Principal AI Engineer to lead the architecture and deployment of large-scale, LLM-powered conversational Chatbot systems serving both enterprise and consumer use cases. This is a hands-on technical role focused on building intelligent, autonomous chatbot systems operating in real-time crypto environments. You will define the technical vision and own end-to-end delivery of production-grade conversational AI platforms. What You’ll Be Doing Lead the design, development, and lifecycle management for conversational Chatbots products for enterprise and consumer use cases. Drive experimentation, simulations, and continuous learning pipelines for Chatbot performance optimization. Design multi-level intent routing, classifier training, and fallback strategies. Building dialogue quality evaluation systems. Drive automated bad-case discovery, A/B testing, and continuous iteration loops. Ensure system scalability, security, and regulatory comp

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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We’re building the next generation of DRAM technology and pushing what’s possible at the intersection of device physics and circuit design. Our team thrives on solving deep technical challenges and turning innovative ideas into high-performance, manufacturable memory solutions. If you’re excited about influencing future technology nodes and working on designs that ship at scale, you’ll feel right at home with us! As a Staff/Principal DRAM Design Engineer, you’ll play a critical role in shaping memory architectures and circuit innovations that directly impact product performance, power, and reliability. This is a hands-on design role where your expertise will drive key decisions from concept through silicon validation, while collaborating with cross-functional teams to deliver meaningful results. Responsibilities: Lead design and optimization of DRAM circuits including memory array, control logic, datapath, and test logic Perform and analyze circuit simulations using tools such as SPICE and Verilog Evaluate architectural trade-offs impacting power, performance, and die size Integrate layout parasitics into simulations and drive design for manufacturability Define validation strategies including test chip development and silicon bring-up Minimum Qualifications: Bachelor’s degree in Electrical Engineering or related field 5+ years of circuit design experience or product engineering experience Strong understanding of analog and digital

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M
Micron
📍 Boise• Full-time
5 days ago

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We’re building the next generation of DRAM technology and pushing what’s possible at the intersection of device physics and circuit design. Our team thrives on solving deep technical challenges and turning innovative ideas into high-performance, manufacturable memory solutions. If you’re excited about influencing future technology nodes and working on designs that ship at scale, you’ll feel right at home with us! As a Staff DRAM Design Engineer, you’ll play a critical role in shaping memory architectures and circuit innovations that directly impact product performance, power, and reliability. This is a hands-on design role where your expertise will drive key decisions from concept through silicon validation, while collaborating with cross-functional teams to deliver meaningful results. Responsibilities: Lead design and optimization of DRAM circuits including memory array, control logic, datapath, and test logic Perform and analyze circuit simulations using tools such as SPICE and Verilog Evaluate architectural trade-offs impacting power, performance, and die size Integrate layout parasitics into simulations and drive design for manufacturability Define validation strategies including test chip development and silicon bring-up Minimum Qualifications: Bachelor’s degree in Electrical Engineering or related field 5+ years of circuit design experience or product engineering experience Strong understanding of analog and digital circuit fu

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B
Boeing
📍 Berkeley• $85K – $115K/yr
6 days ago

Associate Loads and Dynamics Engineer Company: The Boeing Company The Boeing Defense, Space & Security (BDS) organization is seeking an Associate Loads and Dynamics Engineer to support fixed-wing aircraft programs located in Berkeley, Missouri . As an Associate Loads & Dynamics Engineer, you will support loads and dynamics assessments for various aircraft programs within the Air Dominance division. This position requires strong analytical problem solving skills and familiarity with one or more of the following: external loads, structural dynamics, aeroelastic stability, aerodynamics, aircraft stability and control, and finite element modeling. The ability to effectively coordinate with teammates, internal suppliers, and customers is also required. Position Responsibilities Assist in developing air vehicle requirements Create vehicle-level models for loads and dynamics analysis Perform loads and dynamics analysis to support air vehicle design (e.g. flight and ground simulations for loads, flutter/divergence analysis, noise & vibration assessments) Assist in developing flight and ground test requirements and plans Support ground and flight testing by performing pre-test analysis, real-time monitoring of test conditions, post-processing of test data, and documentation of test results Support airworthiness activities with regulatory agencies and internal/external customers via correspondence, presentations, and documentation Assist in developing vehicle flight envelope and operational limits Basic Qualifications (Required Skills and Experience): Bachelor of Science degree in

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B
6 days ago

Senior Low Observables (LO) Mission Systems Integration Engineer Company: The Boeing Company The Senior LO Mission Systems Integration Engineer will lead design, integration, analysis, test, and production activities for low observable materials, structures, apertures, sensors, and radomes for mission systems. The role requires strong technical leadership, independent execution of complex tasks, advanced use of computational electromagnetic (CEM) solvers, and the ability to produce and defend technical results with minimal oversight. Key Responsibilities Lead design, modeling, and analysis efforts for LO materials, coatings, structures, and integrated mission systems to meet signature reduction and performance requirements. Independently apply CEM solvers (e.g., FEKO, HFSS, CST, WIPL‑D, xFDTD, or equivalent) to model antennas, apertures, radomes, and LO treatments; perform design optimization and trade studies. Drive integration of LO treatments with mechanical, thermal, and sensor/antenna system constraints; identify and mitigate producibility, testability, and sustainment risks. Plan, execute, and oversee laboratory and field tests (anechoic chamber measurements, antenna/radome characterization, RCS measurements); lead data collection, reduction, and validation activities. Develop and validate predictive models, reconcile simulations with measurements, perform uncertainty quantification, and provide actionable recommendations to engineering and program leadership. Produce high-quality technical documentation: test plans, test reports, technical memoranda, design reviews, and customer briefings. Mentor and provide technical oversight to junior engineers and technicians; ensure adherence to engineering processes, qual

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About the Job Set the performance direction behind large-scale AI systems built for real deployment. As a Principal AI Performance Engineer, you will define how Graphcore analyzes and optimizes AI training and inference workloads. Your work will shape decisions across hardware, software, networking and system architecture. You will lead the hardest performance investigations, from model behavior to multi-node scaling. You will turn profiling, benchmarking and modeling evidence into technical roadmaps and engineering priorities. You will set measurement standards, guide distributed communication strategy and review critical C++ and Python tools. Your judgment will help teams make better decisions when data is incomplete. This role gives you rare influence across AI infrastructure at data center scale. It is based in Austin, Texas. The team and culture The System Engineering Performance team architects, evaluates and optimizes high-performance infrastructure for large-scale data center deployments. The team works across the computing stack to understand real system behavior. Work happens through evidence, technical ownership and direct cross-team influence. You will guide strategy, resolve complex tradeoffs and raise performance-engineering standards across the organization. Decisions are shaped by benchmarks, simulations, models and clear technical debate. The team values engineers who think big, act fast, take responsibility, speak up and lead beyond their own area. What we’re looking for · Deep experience profiling and optimizing AI, machine learning or high-performance computing workloads at scale. · Proven technical leadership across complex performance-engineering or system-architecture initiatives. · Expert C++ and Python skills, including reliable tools or performance-sensitive software. · Expert understanding of compute, memory, communication and scaling behavior in distributed systems. · Ability to define benchmarks, measurement practices or optimization sta

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M
13 days ago

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Design Engineer at Micron Technology, Inc., you will be responsible for designing and analyzing digital and analog circuits used in the development of memory products. We are engaged in developing groundbreaking silicon-to-systems solutions – right from technology development and advanced memory designs to product development, systems design and validation resulting in world class memory solutions! In this position, you will collaborate with Micron’s various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction! Job Description As a Staff DRAM Design Engineer, you’ll play a critical role in shaping memory architectures and circuit innovations that directly impact product performance, power, and reliability. This is a hands-on design role where your expertise will drive key decisions from concept through silicon validation, while collaborating with cross-functional teams to deliver meaningful results. Responsibilities: Lead design and optimization of DRAM circuits including memory array, control logic, datapath, and test logic Perform and analyze circuit simulations using tools such as SPICE and Verilog Evaluate architectural trade-offs impacting power, performance, and die size Integrate layout parasi

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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Product Engineer in the High Bandwidth Memory (HBM) Media Health (MH) team, you will work with Fab, Yield Improvement, Design, and other engineering groups passionately focused on HBM. You will develop, deploy, optimize, and innovate test strategies for Micron's DRAM in HBM products. The team acts as a key partner of these engineering groups and specialties, focusing on innovating new and improved test strategies and features. You will guide development for Probe (wafer level test), Burn-in, and ATE test code and testing techniques used to validate and ensure device performance. You will assist in debugging code and aiding other specialists in the characterization of applicable HBM devices. In this role, your additional responsibilities include an in-depth understanding of general device functionality specific to HBM products as well as schematics and signal integrity. Responsibilities: Work with Design Engineering to run simulations pre-silicon to validate DFT circuits and test modes as well as communicate design issues found. Work on pre-silicon tasks with MH and test teams to define required tester resources. Work with Test Engineering and HBM Product Engineering to ensure specific product requirements or limitations are comprehended, leading to silicon performance matching expectations. This work includes test program debug, examination of data, and test development. Support the ID1 fabrication site Process Integration and Yield Enhancement through test development, DOE data analysi

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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Product Engineer in the High Bandwidth Memory (HBM) Media Health (MH) team, you will work with Fab, Yield Improvement, Design, and other engineering groups passionately focused on HBM. You will develop, deploy, optimize, and innovate test strategies for Micron's DRAM in HBM products. The team acts as a key partner of these engineering groups and specialties, focusing on innovating new and improved test strategies and features. You will guide development for Probe (wafer level test), Burn-in, and ATE test code and testing techniques used to validate and ensure device performance. You will assist in debugging code and aiding other specialists in the characterization of applicable HBM devices. In this role, your additional responsibilities include an in-depth understanding of general device functionality specific to HBM products as well as schematics and signal integrity. Responsibilities: Work with Design Engineering to run simulations pre-silicon to validate DFT circuits and test modes as well as communicate design issues found. Work on pre-silicon tasks with MH and test teams to define required tester resources. Work with Test Engineering and HBM Product Engineering to ensure specific product requirements or limitations are comprehended, leading to silicon performance matching expectations. This work includes test program debug, examination of data, and test development. Support the ID1 fabrication site Process Integration and Yield Enhancement through test development, DOE data analysi

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I
Intel
📍 Texas• $122.4K – $232.2K/yr
27 days ago

Job Details: Job Description: Do Something Wonderful At Intel, we put silicon at the center of the world’s most meaningful innovations. From personal computing and AI to cloud-scale data centers and edge platforms, our processors power technologies that touch billions of lives. If you’re passionate about building world-class silicon at massive scale, we want to build the future with you. The Team You’ll join Intel’s All Cores Engineering (ACE) organization, the team responsible for designing and delivering Intel’s industry‑leading CPU cores. Within ACE, the Atom group focuses on high‑efficiency, performance‑per‑watt optimized cores that enable everything from client platforms to emerging edge and scalable solutions. This is a hands‑on senior engineering role with direct impact on next‑generation CPU silicon. What You’ll Do As a Senior CPU Design Verification Engineer you will play a critical role in ensuring architectural correctness, functional robustness, and power‑efficient performance of Intel’s Atom CPU designs before first silicon. Key responsibilities include but not limited to the following: Lead pre‑silicon functional verification of complex CPU and SoC logic to ensure full compliance with architectural and microarchitectural specifications. Develop and execute verification plans, testbenches, and SystemVerilog/UVM environments, ensuring comprehensive functional and coverage closure. Define, run, and analyze system‑level simulations to uncover functional, performance, power, and corner‑case issues. Debug and root‑cause complex RTL, microarchitecture, and integration issues; drive issues to resolution with design teams. Collaborate cross‑functionally with CPU architects, RTL de

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M
28 days ago

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Staff Design Engineer is responsible for designing, simulating, and optimizing DRAM circuits while supporting the development of digital and analog circuitry used in advanced memory products. This role collaborates globally across design, verification, product engineering, test, probe, process integration, assembly, and marketing to ensure manufacturable, high‑quality, cost‑optimized solutions. The position drives innovation in future memory generations and contributes to silicon‑to‑system development in a dynamic engineering environment. Responsibilities Design digital, analog, and memory core circuits using CMOS logic and transistors, implementing device specifications from concept to solution. Utilize AI-Enabled tools to assist with schematic editing, data collection and layout floorplan. Create optimized floorplans for circuit placement, routing, power delivery, sense margins, array timing, and die size, including layout leadership. Conduct circuit simulations using FINESIM, HSPICE, and VERILOG; analyze power, performance, reliability, and parasitic impacts. Validate builds through reticle experiments, tape‑out revisions, and simulation‑to‑silicon correlation, identifying required schematic edits. Prepare and maintain design documentation while contributing to best‑known practices and departmental training. Collaborate with global build, verification, product engineering, test, probe, process integration, assembly, and marketing teams to ensure manufacturability and quality. <l

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R
1mo ago

Join us in building the future of finance. Our mission is to democratize finance for all. An estimated $124 trillion of assets will be inherited by younger generations in the next two decades. The largest transfer of wealth in human history. If you’re ready to be at the epicenter of this historic cultural and financial shift, keep reading. About the team + role We are building an elite team, applying frontier technologies to the world's biggest financial problems. We're looking for bold thinkers. Sharp problem-solvers. Builders who are wired to make an impact. Robinhood isn't a place for complacency, it's where ambitious people do the best work of their careers. We're a high-performing, fast-moving team with ethics at the center of everything we do. Expectations are high, and so are the rewards. The Developer Infrastructure org is the engine behind Robinhood's entire engineering organization — a collection of tightly integrated teams whose collective mission is to make every engineer at Robinhood faster, more reliable, and exponentially more productive. The org spans four major teams: DevX (Developer Experience), TestX (Test Infrastructure), Backend Platform, and Mobile Platform. DevX owns Robinhood's monorepo and Bazel-based build infrastructure — the critical layer between a developer writing code and that code being ready to ship — along with the company's full CI/CD pipeline and remote build execution cluster. TestX owns the infrastructure behind Robinhood's entire test experience: the integration test environments, and personal development environments that serve as miniature simulations of the full Robinhood system, giving engineers a safe, isolated space to test their code end-to-end before it ever touches production. Backend Platform and Mobile Platform own the core language runtimes, libraries, IDEs, and developer toolchains across Python, Go, TypeScript, Swift, and Android. Together, these teams share a single north star: leveraging AI and agentic systems

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