Smts Diffusion And Thin Films Jobs

HVM PEE Dry Etch MTS/SMTS — Taichung - Fab 16, Taiwan. Apply via Workday.

Senior Member of Technical Staff (SMTS), Process Development – Cell Film — Fab 10N/X, Singapore. Apply via Workday.

HBM Design Engineering Lead - MTS/SMTS/DMTS — Richardson, TX. Apply via Workday.

Senior Member of Technical Staff (SMTS) – Process Development, Wet, NAND — Fab 10N/X, Singapore. Apply via Workday.

Memory Systems Performance & Workload Architect - SMTS — 2 Locations. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Lead the architecture, design, integration, and silicon validation of complex analog and mixed-signal circuits for advanced DRAM products, including amplifiers, comparators, references, LDOs, charge pumps, oscillators, DLLs, I/O circuits, and on-chip monitors. Drive development of custom analog and digital IP from concept through tape-out, silicon bring-up, and production. Define architectures and design methodologies to optimize power, performance, area (PPA), reliability, yield, and manufacturability. Lead verification, modeling, parasitic analysis, silicon correlation, and design signoff across PVT and reliability corners. Guide physical implementation, including floorplanning, matching, placement, routing, and reliability-aware layout practices. Collaborate with Product, Process, Test, Probe, Assembly, and Manufacturing teams to ensure successful product qualification and high-volume production. Drive design quality, standardization, and continuous improvement through advanced CAD, modeling, automation, and verification methodologies. Mentor and develop engineering talent while providing technical leadership across projects and product generations. Drive innovation through reusable IP development, patents, technology roadmaps, and differentiated circuit architectures. Leverage engineering tools powered by AI and agentic AI workflows to improve build efficiency, accelerate verification, optimize PPA, and reduce p

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Lead verification strategy, architecture, and execution across RTL, AMS (Analog Mixed-Signal), and Transistor-Level Verification (TAV) domains, driving key technical decisions throughout the product lifecycle. Define and implement verification methodologies, test plans, coverage strategies, and debug flows to ensure first-pass silicon success and high product quality. Collaborate with global cross-functional teams including design, product engineering, validation, and CAD/EDA groups to establish and deploy best-known verification practices. Develop, maintain, and enhance verification environments using SystemVerilog, UVM, SPICE/HSPICE, FineSim, Verilog, and related industry-standard tools. Perform root-cause analysis and debugging across digital, mixed-signal, and transistor-level designs, correlating simulation results with silicon behavior. Drive verification closure through functional, code, assertion, and mixed-signal coverage analysis. Evaluate, develop, and deploy innovative tools, automation frameworks, and AI-assisted solutions to improve verification efficiency, productivity, and quality. Apply strong knowledge of CMOS design fundamentals, semiconductor device behavior, circuit analysis, and mixed-signal architectures to solve complex verification challenges. Mentor and provide technical leadership to engineers while leading strategic verification initiatives across multiple teams and projects. Strong progr

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Design, develop, and deliver high-quality RTL for complex DRAM, memory, and mixed-signal digital blocks, driving projects from architecture and specification through implementation handoff while meeting performance, power, area, and quality targets. Own front-end ASIC design activities, including RTL development, linting, CDC/RDC verification, functional validation, logic synthesis, static timing analysis (STA), timing constraint definition, and timing closure across multi-mode, multi-corner operating conditions. Develop, maintain, and optimize design constraints (SDC), including clock definitions, timing exceptions, I/O constraints, UPF-based power intent, and low-power implementation methodologies to achieve optimal PPA. Collaborate closely with architecture, verification, circuit design, and physical implementation teams to resolve integration challenges, improve design robustness, and ensure successful product execution. Analyze synthesis and timing reports, identify critical bottlenecks, and drive design improvements to meet performance, power, area, and schedule objectives. Chip in to the development and enhancement of design methodologies, automation frameworks, and RTL-to-GDS implementation flows, improving engineering productivity, design quality, and time-to-market. Apply strong expertise in CMOS digital and mixed-signal concepts, Verilog/System Verilog, and industry-standard EDA tools to develop scalable and reliable silicon sol

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Design and CAD Enablement Own the development, deployment, and support of scalable CAD tools, automation frameworks, design flows, and methodologies for NAND, DRAM, HBM, SoC, mixed-signal, and other advanced semiconductor products. Develop, improve, and maintain infrastructure for circuit build capture, layout, simulation, characterization, implementation, physical verification, and signoff workflows. Create robust software and scripts using Python, Tcl, SKILL, Shell, Perl, C/C++, Java, Lisp, or related languages to automate engineering workflows, analytics, and quality checks. Evaluate and integrate advanced EDA technologies, AI-assisted engineering solutions, and emerging methodologies to improve productivity, scalability, and silicon quality. Validated ability to demonstrate AI‑assisted (vibe) coding techniques to improve efficiency or automate design and analysis methodologies Leverage AI tools to automate the tools and workflow Applying Artificial Intelligence in workflows to improve build efficiency undefined undefined Lead implementation and signoff activities across physical design, static timing analysis, and design for test for complex digital, memory, SoC, or mixed-signal products. Drive floor planning, power planning, placement, clock tree synthesis, routing, optimization, timing closure, and physical verification to meet power, performance, area, reliability, and sche

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are shaping the memory technologies that power today's most advanced computing platforms, from AI accelerators to mobile and client devices. Our DRAM Engineering team brings together skilled engineers across the globe to solve complex technical challenges, drive innovation, and deliver high-performance memory solutions. If you enjoy tackling difficult problems and turning ideas into products, you'll find exciting opportunities to make an impact here. As a Semiconductor Design Engineer (Principal / Member of Technical Staff / Senior Member of Technical Staff), you will play a key role in designing and optimizing next-generation DRAM products. You will work closely with global design, verification, and multi-functional teams to develop innovative circuit solutions that balance performance, power, quality, reliability, and cost. This role also offers the opportunity to influence technical direction, mentor engineers, and help advance future memory technologies. Responsibilities: Design and optimize digital and analog circuits for next-generation DRAM products, including memory arrays, control logic, datapaths, address decoding, and I/O circuitry. Lead circuit development, simulation, verification, and silicon validation to achieve performance, power, area, and quality targets. Drive floor-planning, layout optimization, parasitic analysis, and tape-out activities. Advance AI-assisted design, automation, and design-space exploration through collaboration with internal and external partne

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking an experience high-speed high-speed IO/Clocking Design Engineering at a Principal/Sr Member of Technical Staff (SMTS) level to join our DRAM IP Design team and contribute to the development of critical high-speed IP circuits used across Micron’s DRAM memory products. In this role, you will be responsible for the architecture, design, development, optimization, verification, and technical support of these high-speed IPs. You will focus on equalization and bandwidth extension to push the limits of circuit and process performance, analyze IO impairments as well as clock jitter and duty cycle distortion, and assess their impact on DRAM system timing. You will also develop core strategy and implement effective engineering solutions to address these challenges. Relocation to Micron headquarter in Boise, Idaho is required for this position. Responsibilities: Define, innovate, design, optimize and verify high-speed IO and clocking circuits used in new DRAM products. Apply robust high-speed circuit design techniques and enhance critical performance evaluation, including timing and jitter sensitivity, of the IO data path and clock path at circuit and full-chip level. Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full-chip and system level. Work with Product Engineering and SI team to compare silicon performance with simulation resu

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a System Architect in Advanced System Architecture Group at Micron Semiconductor Products, Inc., you will work with the memory industry's leading architecture team on new concepts that will craft the future of electronic systems around AI, servers, and mobile systems. You should be able leverage Artificial Intelligence for driving the processes and build next gen solutions with AI Supported frameworks. Your Responsibilities Will Include, But Are Not Limited To Delivering architectures and innovative solutions to optimize power and performance of next-generation memory and storage subsystems. Working with design and system architecture teams to identify key system requirements, seek the current bottlenecks and propose novel solutions for a wide range of applications. These activities will entail: Performing system-level simulations of innovative architectures to compare with existing design paradigms, using both open and closed-loop system performance analysis. Developing models of new controllers, components, memory devices, interconnects, and processors. Capturing, benchmarking, analyzing applications and their corresponding memory and storage access patterns. The scope of this analysis will span from the low-level software stack (operating system, drivers, etc…) down to the hardware and firmware controllers. You should have very strong knowledge of computer architecture and deep understanding sophisticated blocks such as caches, interconnects,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a SoC Architecture and Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the architecture, design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, design, verification, physical design, firmware, and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area, and schedule targets. This is a hands-on technical role for candidates passionate about architecture, RTL build, IP integration, debugging, and pre/post-silicon support. Key Responsibilities Architect, design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die. Architect and design memory sub-systems including memory IP selection and integration, bus and protocol selection, and power/performance/area optimization. Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic). Trans

SoC Physical Design Engineer, Senior Member of Technical Staff (SMTS) — 2 Locations. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking experienced engineers for Principal, MTS, and SMTS roles. The level at which candidates are hired will be determined by their years of experience, demonstrated technical depth, and overall qualifications Principal Photonics Integration Engineer The Advanced Packaging Technology Development (APTD) team is shaping the future of memory, storage, and photonics technologies that power AI, high-performance computing, and next-generation data infrastructure. We collaborate across research, device, process, packaging, and manufacturing organizations to develop innovative solutions that move quickly from concept to production. Join a team where technical challenges are complex, innovation is constant, and your work will directly influence Micron's technology roadmap. As a Principal Photonics Integration Engineer, you will lead the development and integration of silicon photonics and heterogeneous integration technologies that enable high-performance optical connectivity solutions. This role combines process integration, advanced packaging, device development, and program leadership to bring new technologies from concept through manufacturing readiness. You will work across multidisciplinary teams to solve complex technical challenges while employing AI-enabled engineering tools to accelerate development and improve decision-making. Responsibilities: Develop and optimize end-to-end process integration flows for silicon photonics technologies from concept throug