SMTS/DMTS in Process Engineering — Taichung - Fab 16, Taiwan. Apply via Workday.
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Smts Diffusion And Thin Films Jobs
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SMTS/DMTS in Process Equipment Engineering — 4 Locations. Apply via Workday.
SMTS/MTS/Principal Engineer - Product Quality Assurance (ID1) — Boise, ID - Main Site. Apply via Workday.
SMTS, Design Rule Enablement Team TPG — Hiroshima - Fab 15, Japan. Apply via Workday.
SMTS WLT Technical — Taichung - Fab 16, Taiwan. Apply via Workday.
ADTT Dry Etch MTS/SMTS — Taichung - Fab 16, Taiwan. Apply via Workday.
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an Hardware Emulation Architect on the HBM architecture team you will be responsible for architecting, enabling, and deploying hardware emulation capabilities for next generation HBM products. You will work with design, verification, firmware, and system teams to determine emulation needs and opportunities. You will drive the development of hardware emulation ecosystem including procurement of hardware emulation platforms, creation of emulation testbenches and transactors, and development of emulation friendly verification IP. You will be responsible for proactively developing emulation capabilities to meet the needs of current and future products. You will also lead the effort to enable and integrate AI-driven tools and AI-enabled workflows into the team's methodologies. Responsibilities will include, but are not limited to: Develop and maintain hardware emulation environments for complex SoCs and subsystems. Compile, configure, and debug large-scale RTL designs on emulation platforms (e.g., Palladium, Veloce, Zebu). Support pre-silicon validation, firmware bring-up, and early software development using emulation. Debug functional, performance, and connectivity issues across RTL, firmware, and system layers. Work closely with design, verification, firmware, and architecture teams to enable rapid debug and issue resolution. Create emulation testbenches, transactors, and models for system-level use cases. Enable hybrid validation flows (simulation + emulation
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a E5/MTS/SMTS NAND Design Rule / Process Integration engineer, your role is to support the development and high-volume manufacturing of advanced 3D NAND technologies. This role drives design-rule and PDK deliverables, partners closely across process integration and design organizations, and ensures quality, documentation, and timely execution across R&D and production programs. Lead the release of design rules and PDK deliverables; manage DRC waivers, mask definitions, and mask reviews for both R&D and production designs. Own program execution and milestones from kickoff through end-of-life. Partner with stakeholders across Array & CMOS Process Integration, Devices, Layout & Design, Modeling, Scribe & Frame, unit process areas (e.g., PHOTO/OPC/CMP), and Quality & Reliability to guide new 3D NAND generations. Ensure high quality and documentation for Design Rule Checks (DRCs) and drive timely disposition of deviations and exceptions. Collaborate with Yield Enhancement, Product Engineering, Defect Analysis, and Quality Assurance to identify layout- or database-related process issues and prioritize corrective actions. Design and evaluate test structures to generate data for next-generation devices and to assess process margin on
Wet Process DMTS/SMTS, Process Development SG, Advanced NAND — Fab 10N/X, Singapore. Apply via Workday.
Product Quality Engineering SMTS — Taichung - Fab 16, Taiwan. Apply via Workday.
Hardware Engineer – DMTS/SMTS/MTS/Principal Engineer — 2 Locations. Apply via Workday.
Dry Etch Module Technical Staff- MTS/SMTS — Boise, ID - ID1. Apply via Workday.
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Role Summary The SMTS acts as a technical authority in 3D NAND cell film development, setting strategic direction and leading multi-functional initiatives to drive department-wide impact by architecting solutions, accelerating innovation adoption, influencing technical standards, and mentoring engineers to elevate technical excellence. Defines technical strategy and drives cross-org adoption; leads complex problem solving across process/hardware/device interactions with no yield trade-off; builds the SME pipeline through structured mentorship. Main Responsibilities Define technical strategy; architect solutions; influence technical standards and drive process improvements; lead advanced process development, fixing, and integration. Integrate unit processes into full cell packages and validate device/process linkages via wafer-level electricals. <
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job / Role Summary As a Technical Leadership Program (TLP) member, the SMTS defines and leads pathfinding photolithography technologies beyond current roadmaps, shaping Micron’s future technical capability. This role leads & influences development & integration strategy, mentors senior engineers, and drives innovation across development teams. Main Responsibilities Lead pathfinding initiatives for future nodes and architectures Establish long-term technology vision, defining long ‑ term photolithography process and equipment technology roadmaps. De ‑ risk novel lithography con
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job / Role Summary The SMTS is a senior technical leader who defines, develops, and transfers advanced dry etch processes for NAND technologies, owning key process levels/modules and translating scaling challenges into executable roadmaps across N / N+1 / N+2. The role includes FOAK development leadership, robustness/control strategy, multi-functional execution, and technical mentorship across the dry etch organization. Main Responsibilities Own key dry etch process levels/modules and translate technology challenges into executable roadmaps across multiple nodes. Lead FOAK dry etch development including recipe architecture, EPD strategy, control plans, and integration alignment. Establish tool robustness mechanisms (e.g., redundancy/controls/monitors as described in the posting) to improve manufacturability and maturity criteria. Drive multi-functional
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