Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking a Verification Lead for our next-generation AI hardware. You’ll guide a top-tier team of Verification Engineers, shaping test strategies to validate functionality and performance of our AI core. This role requires expertise in AI-specific data types, common AI data-movement compute patterns, and on-chip network validation, combined with strong leadership and collaboration skills. This role is hybrid, based out Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A Seasoned Verification Leader: An experienced ASIC/SoC lead with proven track record of leading teams through complex tape-outs. An AI Hardware Specialist: An expert in the nuances of high-performance compute, specifically focused on AI/ML architectures and the intricacies of tensor-based operations. A Systems Architect at Heart: A strategist who views verification through a system-level lens, ensuring that hardware, software, and on-chip networks (NoC) harmonize perfectly. A Technical Mentor: A hands-on guide proficient in UVM, SystemVerilog, and cocotb, dedicated to elevating team capabilities and driving rigorous coverage-driven methodologies. What We
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Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking talented Physical Design Engineers to implement high-performance blocks for our industry-leading CPU and AI/ML architectures. You'll own the complete implementation flow from synthesis to tapeout, working alongside world-class engineers to push the boundaries of performance, power, and area. If you're passionate about crafting silicon that powers the future of AI computing and thrive on solving complex design challenges, we want you on our team. This role is hybrid , based out of Austin, TX, Santa Clara, CA or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A hands-on engineer with deep expertise in SOC/ASIC physical design and a track record of successful tapeouts. Passionate about optimizing PPA through innovative implementation techniques and close RTL collaboration. Strong problem solver who excels at debugging complex issues across design hierarchies. Collaborative team player who thrives in fast-paced, technically challenging environments. What We Need BS/MS/PhD in EE/ECE/CE/CS with proven experience in synthesis, PnR, and timing closure on taped-out designs. Expertise with industry-
At Secureframe , we’re building the next generation of cybersecurity and compliance software. Thousands of organizations use our platform to strengthen security, automate compliance, and earn trust. We’re backed by leading investors including Kleiner Perkins, Accomplice, Gradient Ventures, BoxGroup, and Village Global. Our Defense AI business is experiencing record growth as organizations across the Defense Industrial Base look for a faster, more practical way to meet CMMC requirements. Secureframe Defense AI combines secure infrastructure, AI-guided CMMC workflows, automated documentation, continuous control monitoring, real-time readiness insights, and expert support in one platform. It gives sellers a differentiated story: help customers secure CUI, accelerate CMMC readiness, and reduce the cost and complexity of operating a compliant environment. Alongside Defense AI, our GRC products help companies achieve and maintain frameworks such as SOC 2, ISO 27001, HIPAA, PCI DSS, and more. About the role As an SMB Account Executive for Defense AI & GRC, you’ll own a fast-moving, full-cycle sales motion across small-business customers. You’ll lead with one of Secureframe’s most strategic product stories—using AI, automation, and secure infrastructure to help defense contractors protect CUI and get CMMC ready—while also selling our broader GRC platform. You’ll connect customer needs to the right solution and move from discovery to a clear decision with urgency and care. This is a velocity role. You’ll build the operating rhythm to close approximately 30–50 deals per quarter across repeatable Defense AI and GRC motions, while also recognizing and developing larger opportunities that can grow into six-figure contracts. Success requires disciplined prospecting, excellent discovery, concise product storytelling, and clean execution across a large number of active opportunities. You do not need to arrive as a CMMC or Microsoft cloud expert. Experience selling to defense co
The Security Operations (SecOps) Engineer is responsible for monitoring, detecting, investigating, and responding to cybersecurity threats across the organisation’s infrastructure, cloud services, endpoints, identities, and business applications. The role supports continuous improvement across security monitoring, vulnerability management, incident response, governance, and operational security controls. Working closely with IT, engineering, and business stakeholders, the SecOps Engineer helps protect organisational assets, data, and services while supporting compliance with internal policies, security standards, and regulatory requirements. Building innovative solutions; enabling safer workplaces for everyone. We’ll create a safer working world, building software to support a global network of responsible buyers, suppliers and partners. We take the pain out of compliance for over 50,000 organisations globally, helping them protect their people, their operations, and the planet. Keeping our network of hiring clients, suppliers, and contractors compliant with the standards that matter most, from health and safety and sustainability to ethical behaviour by building best in class solutions. The tech we build today, will create a better tomorrow. • Monitor and investigate security alerts and incidents. • Conduct threat hunting activities using SIEM, EDR, and cloud security platforms. • Manage vulnerability scanning, assessment, prioritisation, and remediation tracking. • Develop and maintain security monitoring rules and detection logic. • Support incident response investigations and forensic activities. • Administer security platforms such as Microsoft Defender XDR, Sentinel, Entra ID, and vulnerability management tools. • Review and improve security configurations across cloud and on-premises systems. • Support third-party risk assessments and supplier security reviews. • Assist with ISO 27001, SOC, Cyber Essentials, GDPR, and other compliance activities. • Develop se
The Security Operations (SecOps) Engineer is responsible for monitoring, detecting, investigating, and responding to cybersecurity threats across the organisation’s infrastructure, cloud services, endpoints, identities, and business applications. The role supports continuous improvement across security monitoring, vulnerability management, incident response, governance, and operational security controls. Working closely with IT, engineering, and business stakeholders, the SecOps Engineer helps protect organisational assets, data, and services while supporting compliance with internal policies, security standards, and regulatory requirements. Building innovative solutions; enabling safer workplaces for everyone. We’ll create a safer working world, building software to support a global network of responsible buyers, suppliers and partners. We take the pain out of compliance for over 50,000 organisations globally, helping them protect their people, their operations, and the planet. Keeping our network of hiring clients, suppliers, and contractors compliant with the standards that matter most, from health and safety and sustainability to ethical behaviour by building best in class solutions. The tech we build today, will create a better tomorrow. • Monitor and investigate security alerts and incidents. • Conduct threat hunting activities using SIEM, EDR, and cloud security platforms. • Manage vulnerability scanning, assessment, prioritisation, and remediation tracking. • Develop and maintain security monitoring rules and detection logic. • Support incident response investigations and forensic activities. • Administer security platforms such as Microsoft Defender XDR, Sentinel, Entra ID, and vulnerability management tools. • Review and improve security configurations across cloud and on-premises systems. • Support third-party risk assessments and supplier security reviews. • Assist with ISO 27001, SOC, Cyber Essentials, GDPR, and other compliance activities. • Develop se
GitLab is the intelligent orchestration platform for DevSecOps. GitLab enables organizations to increase developer productivity, improve operational efficiency, reduce security and compliance risk, and accelerate digital transformation. More than 50 million registered users and more than 50% of the Fortune 100* trust GitLab to ship better, more secure software faster. The same principles built into our products are reflected in how our team works: we embrace AI as a core productivity multiplier, with all team members expected to incorporate AI into their daily workflows to drive efficiency, innovation, and impact. GitLab is where careers accelerate, innovation flourishes, and every voice is valued. Our high-performance culture is driven by our values and continuous knowledge exchange, enabling our team members to reach their full potential while collaborating with industry leaders to solve complex problems. Co-create the future with us as we build technology that transforms how the world develops software. * Fortune 500® is a registered trademark of Fortune Media IP Limited, used under license. Claim based on GitLab data. Fortune 100 refers to the top 20% ranked companies in the 2025 Fortune 500 list, published in June 2025. Fortune and Fortune Media IP Limited are not affiliated with, and do not endorse products or services of GitLab. An overview of this role As a Senior Professional Services Technical Architect, Security at GitLab, you'll lead the design and implementation of secure enterprise solutions for Professional Services clients across AMER. You'll assess complex security architectures, guide security tool and CI/CD migrations, including legacy tools such as Jenkins, and implement GitLab security capabilities to help customers meet compliance frameworks such as NIST 800-53, ISO 27001, and SOC 2. This role requires depth in secure reference architecture design across cloud security, identity management, vulnerability management, and deployment choices
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. This Notice is provided as a result of the filing of applications for permanent alien labor certification for the positions noted below. Any person may provide documentary evidence bearing on an application to the Certifying Officer, U.S. Department of Labor, Employment and Training Administration, Office of Foreign Labor Certification, 200 Constitution Avenue NW, Room N–5311, Washington, DC 20210. Employer: Micron Technology, Inc. Job Title: Firmware Engineer Job Requisition: JR42883 Job Location: Longmont, Colorado Job Type: Full Time Rate of Pay: $100,000 to $254,000 Duties: Develop high-performance controller firmware for innovative volatile and non-volatile memory systems. Assist in evaluating, designing, building, bench testing, debugging, and failure analyzing firmware for new high-performance memory controllers and Solid State Drives that will increase performance, while reducing power, latency and SoC (System on Chip) complexity for the target markets. Work closely with system test engineers, system failure analysis engineers, firmware engineers, firmware test engineers, system hardware design engineers, product engineers, memory design engineers, firmware tools developers, and production engineers to solve cross-functional product development issues. Validate customer requirements and perform failure analysis on FW related issues. Develop structure
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The DRAM Architecture team is responsible for defining the system‑level and silicon‑level architectures that enable Micron’s memory products. The team works across technology generations and product lines, collaborating with design, product, systems, and ecosystem partners to deliver scalable, reliable, and high‑performance memory solutions aligned with customer and market needs. This role provides senior‑level architectural leadership to help shape Micron’s next‑generation DRAM products. As a Distinguished Member of Technical Staff, you will influence memory architecture decisions across semiconductor chips, assembly methods, component units, and system interfaces, contributing to both near‑term product execution and long‑term technology direction. This role requires AI proficiency or AI‑enabled ways of working. Responsibilities: • Define and evolve DRAM system architectures that address performance, capacity scaling, reliability (RAS), and observability requirements. • Collaborate across functions to evaluate architectural trade‑offs spanning DRAM silicon, packaging, modules, boards, and system platforms. • Influence host memory controller and platform architecture through technical engagement with CPU, GPU, and SoC partners. • Contribute to RAS and telemetry feature definition, translating system‑level needs into implementable architectural concepts. • Support exploration of emerging memory technologies and assess their impact on future product roadmaps. • Engage with cus
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Directs and Manage team activities related to the analysis, design, programming, debugging, troubleshooting, and modification of software for firmware (IC embedded code) applications. Oversees programming activities involving analog and digital hardware and software operating systems. May have responsibility for the programming of assembly language, machine language and high level languages, including but not limited to C and C++. Selects, develops, and evaluates personnel to ensure the efficient operation of the function. 12+ Years in Embedded Firmware - Storage/SSD would be a strong plus. Strong firmware design and debug experience using assembly and C programming. Knowledge of SSD flash translation layer, wear leveling, garbage collection, etc. Knowledge of mass storage interfaces such as SAS, SATA, NVMe (optional but strong plus). Knowledge of configuring and debugging issues from the usage of register settings of ASICs in an SoC and embedded firmware dev environment High level of skill in problem recreation and trapping, and in identifying performance critical algorithms for optimization - AI Supported Strong skill in ARM development tools and IDE Ability to scope and estimate development effort. Ability to work and communicate effectively in a team, able to multitask effectively in fast-paced environment. Experience in test equipment such as oscilloscopes and logic/bus analyzers (good to have). Experience
Job Details: Job Description: This position is in the Silicon and Platform Engineering, Platform and Experience Architecture, PXA team. This team is responsible for defining experience driven client platforms that delight customers and drive business success. This role is for the Platform Architecture Manager and leader of the Platform Workflow and Competitive Analysis team which exists to translate outside-in insights into platform requirements that define winning client PC experiences. Under a single-umbrella of leadership, PWCAs responsibilities are focused on integrating UX research, ecosystem engagement, competitive analysis, UX workflow development, and data collection into a single operating model that improves PXA's ability to make fast, evidence-based architecture and roadmap decisions. PWCA integrates diverse functions and expertise to uncover insights and translate a data-backed vision into actionable recommendations for complex technology and product roadmap decisions. Its leader must build a cohesive team, foster a strong culture, and establish a decision-making framework that aligns diverse projects and expertise in an open-ended environment requiring long-term, multidisciplinary research and analysis. The qualifications below reflect the experience and capabilities needed to succeed in this role. Experience Experienced managing 10-20 person teams with varied deep areas of expertise Intuitively grasps the unique timelines of IP, SOC, and Platform development and the key moments of intercepting different inputs into the development cycles Proven ability to apply user experience research methods and lead the collection, synthesis, and management of insights from users, customers, and ecosystem partners to inform platform and roadmap decisions Proven experience leading competitive analysis acro
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