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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. IT EA Procurement – Business Analyst Micron Technology’s vision is to transform how the world uses information to enrich life and our commitment to people, innovation, tenacity, collaboration, and customer focus allows us to fulfill our mission to be a global leader in memory and storage solutions. This means conducting business with integrity, accountability, and professionalism while supporting our global community. Job Description We are in search of Business Analyst to design, develop and support Micron and third-party applications. You will be responsible for partnering with our Procurement business team for all aspects of Information Technology delivery, including strategic roadmap planning, project/portfolio planning and execution, and IT operational excellence. This role will partner with our business teams to implement IT solutions that improve and streamline our business processes bringing value to the organization. The key areas of the business supported include our Procurement functions. In this role, you will have the opportunity to work with business and leadership teams to identify opportunities for improvement, build plans and business cases to achieve those improvements, and ultimately oversee the realization of those improvements by working with our various IT/delivery partners. This is an outstanding IT leadership role with a real breadth of opportunity for a proven leader who has an interest in enabling a growing business with technology solutions.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities: Take responsibility for designing digital IP blocks from initial microarchitecture to RTL creation, integration, and supporting physical hardware development. Define and review module interfaces and system-level architecture. Actively leverage AI‑based tools, agentic workflows, and automation frameworks to: Accelerate RTL design optimization and design‑space exploration Assist in testbench generation and corner coverage Improve debug efficiency across simulation and silicon learning loops Define semicustom methodology for memory design Drive full-chip integration including CDC, Lint, synthesis, STA and power analysis. Collaborate with CAD, EDA, and software teams to integrate AI‑driven flows into simulation, verification, and design sign‑off environments. Collaborate closely with architecture, design, verification, and physical design / layout teams. Oversee and manage the layout process including floor-planning, placement, and routing. Perform block-level and full-chip verification including functional, timing, power and reliability analysis using industry standard and Micron-specific simulators and tools. Contribute to cross-group communication to work towards standardization and group success Provide technical mentorship and participate in design and methodology reviews. Drive innovation into the future memory generations and design methodology within a dynamic w

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, the DRAM Design organization develops industry-leading memory solutions that span technology development, advanced circuit design, product engineering, system validation, and manufacturing enablement. Teams collaborate globally to deliver innovative memory products that meet demanding requirements for performance, quality, reliability, and time-to-market. As an Intern DRAM Design Engineer, you will contribute to the design, analysis, verification, and optimization of digital, analog, and mixed-signal circuits used in next-generation memory products. You will work closely with design, verification, product engineering, test, process integration, assembly, and marketing teams to support new product development and manufacturability initiatives. This role also provides opportunities to apply Artificial Intelligence and AI Assisted methodologies to improve design workflows, automation, and design quality. Responsibilities Play a key role in the development of new memory products through circuit build, layout, optimization, and validation of Memory, Logic, and Analog circuits. Support physical design activities including parasitic modeling, floor-planning, placement, routing, reticle experiments, tape-out revisions, and design verification using industry-standard simulation tools. Collaborate with global design, verification, product engineering, test, process integration, assembly, and marketing teams to improve manufacturability, quality, and product performance. Proactiv

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has transformed innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are redefining how the world uses information to enrich life. We are looking for Layout Build engineer at our Micron Technology’s DRAM Team in Guadalajara, Mexico. As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high performance computing solution, High Bandwidth Memory. As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment. Responsibilities: Build and development of analog, mixed-signal, custom digital block and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, quality check and documentation. Responsible for timely delivery of block-level layouts with acceptable quality. Will bee leading planning, area/time estimation, scheduling, delegation and execution to meet project schedule/achievements in multiple project environment. Optimally copresentingith Global engineering teams to assure the success of layout project. Minimum Qualification: Around 5 years of experience in analog/custom layout design in sophisticated CMOS process, in various technology nodes (Planar, FinFET). <

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s advanced memory design organization, where digital innovation directly shapes the next generation of DRAM products. We work across global teams, combining deep technical expertise with diverse perspectives to solve complex problems and push memory technology forward. We are also deeply engaged with AI tools to develop/optimize the design verification flow for better quality and efficiency This role plays a critical part in defining and delivering competitive digital IP for advanced DRAM. You will influence architecture, design, and verification while collaborating closely with layout, modeling, and CAD partners. It’s a hands-on opportunity to grow your technical depth while making a visible impact on future memory products. Responsibilities: Develop competitive digital IPs for advanced DRAM products Define design and verification requirements from specifications and reference designs Build high-level behavioral and algorithmic models for architecture verification Design IP using RTL or custom methodologies and guide layout and verification teams Collaborate with standards, CAD, modeling, and verification teams to improve design quality Leveraging AI (EX Claude Code or other AI tools) to develop, improve design quality and efficiency Minimum Qualifications: Bachelor’s degree in Electrical Engineering or related field, or equivalent experience 6&#43; years of experience in digit

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our Team Join Micron's SMAI Engineering Tool Development group — a cross-disciplinary team dedicated to developing cutting edge software solutions that power the next generation of semiconductor manufacturing. Our mission is to build intelligent, scalable tools that enable precision automation, image based process control, and analytics for advanced manufacturing technologies. This team partners closely with process engineers, data scientists, and manufacturing technology experts to solve some of the most challenging problems at the intersection of semiconductors, imaging, and software engineering. Key Responsibilities Lead, mentor, and grow a team of fullstack software engineers, fostering a culture of technical excellence, collaboration, and continuous improvement. Own hiring, onboarding, performance management, and career development for team members. Drive technical strategy and architecture decisions for applications that enable image processing, inspection automation, and data driven decision making for advanced manufacturing. Partner with process engineering, equipment teams, and SMAI stakeholders to align development priorities with business objectives and translate requirements into robust software solutions. Manage project planning, capacity allocation, and delivery timelines across concurrent workstreams. Establish and champion engineering best practices including code quality, testing standards, CI/CD processes, and d

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description & Requirements As the Facilities Building Services Engineer, you will be responsible for the building maintenance of all the buildings and external compound areas. Your areas of responsibilities include Facilities Maintenance System Administrator, Cafeteria Services, Janitorial Services, Civil/Structure installation works, general building maintenance refurbishment/renewal program/project, landscape, pest control, sanitary, office equipment maintenance, renovation work and office furniture layout planning. Responsibilities and Tasks Develop scope of work for the provision of provide outsourced services Develop standard operating procedure and risk assessment for routine and non-routine works Lead daily meeting to meet day-day operation Manage and assign FMS work tasks Provide project management to meet the budget and schedule on multiple projects Provide guidance and training to building services technician and technologist as required Provide direction and work towards meeting goals (long/short term) and progress of goals to concerned party Lead and manage all the works to achieve a high

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. About our Team: As an IT Disaster Recovery Program Manager within Micron's Governance, Risk, Compliance, and Cyber Resilience organization, you will serve as the subject matter expert responsible for the design, governance, execution, and continuous improvement of Micron's global Information Technology Disaster Recovery (ITDR) program. Our team partners closely with Infrastructure, Applications, Cybersecurity, Business Continuity Management (BCM), Engineering, Manufacturing, Cloud Operations, Site Leadership, and Executive Stakeholders to build and maintain enterprise resilience. Together, we help ensure critical business services can be restored within established Recovery Time Objectives (RTOs) and Recovery Point Objectives (RPOs) while supporting regulatory and cyber resilience requirements. Position Overview: This role leads enterprise recovery planning, resilience assessments, disaster recovery exercises, recovery capability validation, and executive reporting to strengthen organizational readiness and operational continuity. The IT Disaster Recovery Program Manager drives preparedness against cyber attacks, ransomware events, infrastructure failures, operational disruptions, and natural disasters while aligning recovery strategies with business requirements and compliance obligations. In addition, you will contribute to AI-enabled resilience initiatives by leveraging automation, analytics, and intelligent workflows to improve recovery planning, dependency mapping, exercise ex

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description & Requirements As the Facilities Building Services Engineer, you will be responsible for the building maintenance of all the buildings and external compound areas. Your areas of responsibilities include Facilities Maintenance System Administrator, Cafeteria Services, Janitorial Services, Civil/Structure installation works, general building maintenance refurbishment/renewal program/project, landscape, pest control, sanitary, office equipment maintenance, renovation work and office furniture layout planning. Responsibilities and Tasks Develop scope of work for the provision of provide outsourced services Develop standard operating procedure and risk assessment for routine and non-routine works Lead daily meeting to meet day-day operation Manage and assign FMS work tasks Provide project management to meet the budget and schedule on multiple projects Provide guidance and training to building services technician and technologist as required Provide direction and work towards meeting goals (long/short term) and progress of goals to concerned party Lead and manage all the works to achieve a high level of safety standards to meet compan

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Summary As part of the Site Strategic Program Manager Office (SPMO) team for construction you will be responsible for managing construction programs. You will be supporting the construction site director and construction leadership team to coordinate multiple construction projects and workstreams across Singapore to ensure safe, timely, cost-effective, and high-quality delivery. This role provides overall program governance, integrates cross-functional stakeholders (Facilities, EHS, Fab Operations, Procurement, Finance, and Contractors), and ensures compliance with corporate construction standards, safety requirements, and regulatory obligations. Key Responsibilities Program & Project Leadership: • Develop and track program schedules, milestones, and risks. • Ensure delivery in accordance with Construction and Project Execution Plans. Stakeholder & Contractor Management: • Act as interface between site, global teams, and contractors. • Coordinate cross-functional stakeholders and manage contractor performance. Safety, Quality & Compliance: • Champion a safe and compliant work environment. • Ensure adherence to EHS, permit-to-work, and regulatory requirements. Risk, Cost &amp

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Your responsibilities will include, but are not limited to, the following: Primarily focus on wafer matching including lot pairing and execution. Configure the bonding UI and continuously track development lots, including interpreting wafer matching outputs, executing wafer shuffling within the bonding UI, and monitoring subsequent wafer build and pairing. Apply AI-enabled ways of working to improve efficiency in wafer matching operations, lot tracking, data summarization, exception monitoring, and routine reporting where applicable. Assist Process Integration (PI) Engineers to coordinate and trouble shoot daily line issues such as disposition of line deviations and engineering job submissions for analysis. Assist in inline inspection and coordinate non-routine metro/RDA inspection on R&D experiments. Support process flow setup activities for production and the short loop flow. Extract, analyze, and summarize data from SWR and Conversion experiments in a report format and make recommendations to engineering based on the data. Manage wafer shipment logistics between fabs (swap lots and fab-to-fab offloads) for technology transfer and yield learning. Monitor key inline/probe/final parametric indices for any deviation an

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. HBM Design Architecture — Principal Engineer Role Overview We are seeking a highly motivated HBM Design Architecture Engineer (Principal Engineer) to drive exploration and definition of next‑generation AI memory and system environments. In this role, you will analyze emerging infrastructure trends, build performance models, and develop/extend tooling that informs HBM architecture decisions and system‑level trade‑offs. You will work closely with architects and senior engineers across DTPCO, Design, and Product/System teams to translate AI workload requirements into actionable memory subsystem and architectural intercept strategies. Key Responsibilities You will own and contribute to projects such as: Research and synthesize emerging trends in compute, networking, and storage infrastructure to anticipate how future AI systems will evolve. Lead HBM architecture analysis by defining bandwidth/latency targets, identifying constraints, and translating workload and system data into actionable memory requirements. Develop and maintain simulation frameworks to model AI cluster performance and memory subsystem behavior; validate models against internal and external benchmarks. Build and apply first‑order performance models spanning HBM bandwidth/latency, GPU/CPU interactions, and memory hierarchy trade‑offs to guide architectural decisions. Create and curate trend dashboards using CSP benchmar

At Ripple, we’re building a world where value moves like information does today. It’s big, it’s bold, and we’re already doing it. Through our crypto solutions for financial institutions, businesses, governments and developers, we are improving the global financial system and creating greater economic fairness and opportunity for more people, in more places around the world. And we get to do the best work of our career and grow our skills surrounded by colleagues who have our backs. If you’re ready to see your impact and unlock incredible career growth opportunities, join us, and build real world value. THE WORK: As a Senior Staff Security Engineer, you will be one of Ripple's most senior technical security practitioners, operating at the intersection of application security, cloud infrastructure security, and secure software delivery. This role exists to raise the technical bar and extend Ripple's security posture as the engineering organization scales across new products, new architectures, and an increasingly sophisticated threat landscape. You will serve as the dedicated security engineering partner for Ripple Treasury. You will lead the technical direction for product and infrastructure security, partnering with Ripple Treasury Product and Engineering teams to drive secure design, threat modeling, vulnerability management, and cloud security architecture. WHAT YOU’LL DO: Serve as the dedicated Security Engineering partner for Ripple Treasury BU, owning the security posture of the Treasury solution and infrastructure environment from assessment through remediation and ongoing maturity improvement. Lead threat modeling and security architecture reviews across Treasury offerings. Own the secure software development lifecycle for your product surface area, defining security guardrails, CI/CD integrations, and developer guidance that make secure by default a practical reality. Drive the cloud security architecture for Treasury across Azure and AWS, inclu

About Us At Cloudflare, we are on a mission to help build a better Internet. Today the company runs one of the world’s largest networks that powers millions of websites and other Internet properties for customers ranging from individual bloggers to SMBs to Fortune 500 companies. Cloudflare protects and accelerates any Internet application online without adding hardware, installing software, or changing a line of code. Internet properties powered by Cloudflare all have web traffic routed through its intelligent global network, which gets smarter with every request. As a result, they see significant improvement in performance and a decrease in spam and other attacks. Cloudflare was named to Entrepreneur Magazine’s Top Company Cultures list and ranked among the World’s Most Innovative Companies by Fast Company. At Cloudflare, we’re not looking for people who wait for a polished roadmap; we’re looking for the builders who see the cracks in the Internet that everyone else has simply learned to live with. We value candidates who have the instinct to spot a "normalized" problem and the AI-native curiosity to create a solution using the latest tools. Our culture is built on iteration, leveraging AI to ship faster today to make it better tomorrow, while ensuring that every improvement, no matter how small, is shared across the team to lift everyone up. If you’re the type of person who values curiosity over bureaucracy, and that AI is a partner in solving tough problems to keep the Internet moving forward, you’ll fit right in. Available Locations Shenzhen, China - Remote / Singapore About the Role About the Role At Cloudflare, we are on a mission to help build a better Internet. As the architectural complexity of enterprise solutions scales, we are evolving how we partner with our customers. The Customer Engineer (CE) represents the core driver of our technical go-to-market strategy: a trusted advisor who owns the technical relationship from the initial discovery phase

itD is seeking a Verification Engineer to support the development and verification of next-generation System-on-Chip (SoC) solutions. The ideal candidate will have 5–12 years of design verification experience with expertise in UVM, SystemVerilog, and ASIC/SoC verification, along with a proven ability to deliver high-quality silicon solutions. Location: 100% onsite in Allentown, PA or Carlsbad, CA . Pay Rate: PA: $34.00–$34.20/hr | CA: $41.00–$41.40/hr, depending on experience. We provide comprehensive medical benefits, a 401(k) plan, paid holidays, and more. Please note that we are only considering direct W2 candidates at this time, as we are unable to offer sponsorship. Responsibilities: Develop and maintain UVM-based verification environments for ASIC/SoC designs. Create and execute block- and system-level verification plans. Design verification components, including assertions, agents, traffic generators, and scoreboards. Partner with cross-functional engineering teams to define verification strategies and improve design testability. Debug and resolve complex design and verification issues throughout the development lifecycle. Perform timing and gate-level simulations to validate design functionality. Support post-silicon bring-up through C-based firmware development and verification activities. Internal Responsibilities: Attend regular internal practice community meetings. Collaborate with your itD practice team on industry thought leadership. Complete client case studies and learning material (blogs, media material). Build out material to contribute to the Digital Transformation practice. Attend internal itD networking events (in person and virtual). Work with leadership on career fast-track opportunities. Required Qualifications and Skills: Bachelor's degree in Electrical Engineering or a related field. 5–12 years of ASIC or SoC design verification experience. Strong experience developing UVM-based testbenches. Proficiency with SystemVerilog. Experience