System Hardware Engineer Jobs

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Responsibilities and Duties We are seeking a highly skilled System Tests & Diagnostics Engineer to develop, extend, and integrate specialized silicon validation and diagnostics tools for next-generation AI SoCs. Unlike traditional validation roles focused on executing test plans, this position is responsible for developing the diagnostic software and stress tools that expose hardware failures, characterize silicon behavior, and improve platform observability throughout bring-up and validation. You will work closely with Arm engineers to understand and extend existing diagnostics technologies while developing Graphcore-specific capabilities for future AI hardware. Role Summary You will work with existing Arm-developed diagnostics technologies and extend them to support Graphcore's next-generation AI silicon. You will be responsible for developing system-level diagnostics and stress tools that integrate with an existing framework to detect data integrity, computational correctness, performance, and reliability issues across CPUs, AI accelerators, memory, storage, PCIe, firmware, BMC, and other platform components. Examples include silent data corruption (SDC) tests, power transient stress tools, and platform diagnostics, with opportunities to develop new diagnostics as future hardware capabilities evolve. This role requires close collaboration with hardware architects, firmware enginee

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE As a Senior Pre-Sales Systems Engineer supporting U.S. Air Force and federal defense customers, you will help translate mission and technology requirements into innovative data-storage solutions. You will serve as a trusted technical advisor throughout the sales process, partnering with account managers, specialists, channel partners, and customers to demonstrate how the Everpure portfolio can deliver secure, scalable, and measurable business outcomes. WHAT YOU’LL DO Build a deep understanding of U.S. Air Force and federal customers’ missions, priorities, technical environments, and decision criteria. Connect Everpure solutions and ecosystem technologies to customer outcomes across enterprise storage, distributed architectures, file systems, cloud, and modernization initiatives. Partner with account managers, specialists, and channel partners to shape account strategy, create a seamless customer experience, and drive revenue growth and net-new business. Lead technical evaluations, benchmarks, proofs of concept, and system configurations, translating customer requirements into compelling solution designs. Develop and deliver clear, persuasive technical presentations and architecture discussions that establish the technical win with customers and prospective accounts. Provide technical leadership on storage products and competitive offerings across DAS, NAS, SAN, FC, iSCSI, and software-defined or distributed storag

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Responsibilities and Duties We are seeking a highly skilled System Tests & Diagnostics Engineer to develop, extend, and integrate specialized silicon validation and diagnostics tools for next-generation AI SoCs. Unlike traditional validation roles focused on executing test plans, this position is responsible for developing the diagnostic software and stress tools that expose hardware failures, characterize silicon behavior, and improve platform observability throughout bring-up and validation. You will work closely with Arm engineers to understand and extend existing diagnostics technologies while developing Graphcore-specific capabilities for future AI hardware. Role Summary You will work with existing Arm-developed diagnostics technologies and extend them to support Graphcore's next-generation AI silicon. You will be responsible for developing system-level diagnostics and stress tools that integrate with an existing framework to detect data integrity, computational correctness, performance, and reliability issues across CPUs, AI accelerators, memory, storage, PCIe, firmware, BMC, and other platform components. Examples include silent data corruption (SDC) tests, power transient stress tools, and platform diagnostics, with opportunities to develop new diagnostics as future hardware capabilities evolve. This role requires close collaboration with hardware architects, firmware enginee

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Responsibilities and Duties We are seeking a highly skilled System Tests & Diagnostics Engineer to develop, extend, and integrate specialized silicon validation and diagnostics tools for next-generation AI SoCs. Unlike traditional validation roles focused on executing test plans, this position is responsible for developing the diagnostic software and stress tools that expose hardware failures, characterize silicon behavior, and improve platform observability throughout bring-up and validation. You will work closely with Arm engineers to understand and extend existing diagnostics technologies while developing Graphcore-specific capabilities for future AI hardware. Role Summary You will work with existing Arm-developed diagnostics technologies and extend them to support Graphcore's next-generation AI silicon. You will be responsible for developing system-level diagnostics and stress tools that integrate with an existing framework to detect data integrity, computational correctness, performance, and reliability issues across CPUs, AI accelerators, memory, storage, PCIe, firmware, BMC, and other platform components. Examples include silent data corruption (SDC) tests, power transient stress tools, and platform diagnostics, with opportunities to develop new diagnostics as future hardware capabilities evolve. This role requires close collaboration with hardware architects, firmware enginee

The Collision Avoidance System (CAS) is responsible for detecting and reacting to imminent collision situations in support of our vehicle’s overall safety goals. CAS Perception is responsible for processing raw sensor data from our vehicle’s world-class sensor suite using a combination of geometric, interpretable algorithms and deep learning to detect near-collisions with obstacles along our intended driving path, in the most challenging dense urban environments and under tight compute resource constraints. Overall CAS is parallel and complementary to our Main Artificial Intelligence (AI) autonomy stack, and has a close relationship with our vehicle hardware and safety teams in order to architect redundancy into our overall driving system. The CAS Verification & Validation (CAS V&V) is a multidisciplinary team data, software and systems engineers defining and building metrics to measure the Collision Avoidance System performance and work with the Systems Design and Mission Assurance (SDMA) and QA teams to develop validation plans for the features. In this role, you will: Apply distributed computing algorithms to analyze petabytes of urban driving data. Develop metrics and tools to analyze errors and system improvements. Work closely with CAS engineers to evaluate system performance. Collaborate with Perception engineers to define metrics for autonomous driving. Partner with Planning engineers to measure performance in complex urban environments. Qualifications: BS, MS, or PhD degree in computer science or a related field Fluency in C++ and/or Python Extensive experience with programming and algorithm design Bonus Qualifications: Experience with analysis of latency for safety-critical software systems Experience with petabyte-scale distributed computing (Spark, Databricks, generic MapReduce pipelines) <li

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities Responsible for both product development and supporting high volume manufacturing of SSD. Support for SSD failure analysis from NPI to HVM stage. Perform manufacturing yield evaluation and data analysis. Perform detailed electrical and physical failure analysis and work with other departments to resolve SSD related issues. Troubleshooting failure from customer return and provide solutions to fix the problems. Requirements: Bachelor or Masters degree in Electrical/Electronic Engineering or Computer engineering. Relevant experience in SSD industry will be an advantage. Relevant experience with computer hardware, knowledge of storage interface such as SATA, SAS will be an advantage. Proficiency in programming languages such as C, C&#43;&#43;, Python, Perl and etc. Proficiency in using AI technology (Claude, Copilot) in improving productivity. efficiency and data analysis. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people

Who We Are HP IQ is HP’s new AI innovation lab. Combining startup agility with HP’s global scale, we’re building intelligent technologies that redefine how the world works, creates, and collaborates. We’re assembling a diverse, world-class team—engineers, designers, researchers, and product minds—focused on creating an intelligent ecosystem across HP’s portfolio. Together, we’re developing intuitive, adaptive solutions that spark creativity, boost productivity, and make collaboration seamless. We create breakthrough solutions that make complex tasks feel effortless, teamwork more natural, and ideas more impactful—always with a human-centric mindset. By embedding AI advancements into every HP product and service, we’re expanding what’s possible for individuals, organisations, and the future of work. Join us as we reinvent work, so people everywhere can do their best work. About The Role HP IQ’s System Software team enables on-device experiences to take full advantage of our hardware capabilities. We collaborate with internal and external partners in a high-leverage environment that enables us to spend a majority of our time developing solutions that are unique to our hardware, sensors, algorithms, and interaction models. If you enjoy solving complex, interdisciplinary problems with a world-class team, we'd love to hear from you! What You Might Do Learn what it's like to be a part of a world-class embedded software team building a first-of-its-kind product in a startup environment Responsible for system design and architecture Develop low-level driver and framework software in C and C++ Develop device-focused infrastructure software in Python Debug issues at the interface between hardware and software Optimize software for better performance and lower power consumption Collaborate in the software engineering process with documentation, testing, and code review Essential Qualifications 8+ years of experience in system software engineering and embedded platf

NVIDIA seeks an exceptional Network Engineer to join the Vertical Verification Group. As a senior engineer, you will contribute to the Vertical Verification work, concentrating on validating and improving complex Ethernet and InfiniBand systems within NVIDIA’s Data Center and HPC environments. You will play a key role in testing advanced networking features, building complex customer-like topologies, and ensuring NVIDIA products meet industry-leading benchmarks of performance, efficiency, and quality. You will collaborate closely with architects, software engineers, and hardware teams across NIC, HCA, switches, CPUs, and GPUs in a fast-paced and highly technical environment. This is an outstanding opportunity to join a highly skilled team and contribute significantly to groundbreaking technology! What you’ll be doing: Review architecture, build, and requirements for new networking features across Ethernet and InfiniBand portfolios Compose and build complex testbed topologies that emulate customer environments Implement, run and optimize integration test plans including functional, regression, and performance testing Identify, reproduce, and debug issues; work closely with R&D to drive root cause analysis and resolution Collaborate with automation teams Analyze and optimize network performance, latency, and efficiency Provide clear status updates, reports, and insights on system quality and performance What we need to see: B.Sc. in Computer Science, Electrical Engineering, or related field (or equivalent experience) 8&#43; years of experience in networking, system validation, or related engineering roles Strong hands-on experience with Linux-based systems Deep understanding of networking protocols (TCP/IP, UDP, Ethernet, VLANs, L2/L3) Experience with routing, switching, and modern data center network architectures<

NVIDIA's Performance Lab (PerfLab) builds the automation platforms that evaluate the performance and quality of accelerated computing workloads efficiently and accurately, from single nodes to large training and inference clusters. Our platforms turn complex benchmark campaigns into reliable, scalable, and reproducible workflows, enabling engineering, product, and marketing teams to make data-driven decisions. We are looking for a System Software Architect to set the technical direction for these platforms. You will build platform components and lead projects from problem discovery and technical design through production deployment and adoption. This hands-on role combines architecture, cross-team alignment, and direct system debugging. You will collaborate with NVIDIA teams around the world and help shape how NVIDIA measures, understands, and improves performance for large language models, agentic AI, and emerging HPC and AI workloads. What You'll Be Doing: Define the technical direction and architecture for major areas of PerfLab's benchmark infrastructure, translating evolving business and engineering needs into clear roadmaps and scalable platform capabilities. Lead the implementation of reusable software, services, and workflows that automate benchmark definition, execution, result collection, validation, and reporting across local, cluster, and cloud-native environments. Establish engineering approaches that improve the reliability, scalability, observability, maintainability, and reproducibility of large benchmark campaigns. Stay hands-on with AI benchmarking, analysis, and benchmark design, and use that first-hand knowledge of how real workflows behave to ground platform investments and technical decisions. Lead delivery across team boundaries: align partner teams on direction, eliminate duplicated efforts, manage delivery risk, and keep stakeholders informed. Ra

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As an STPG PE System Engineer , you will support SSD products from product development and qualification through manufacturing ramp and high-volume production, with focus on product quality, manufacturing readiness, yield improvement, and technical issue resolution. This aligns with the established STPG Product Engineering mission of transitioning products from design through qualification and high-volume manufacturing. You will collaborate with cross-functional engineering teams including Product Engineering, Firmware, NAND, ASIC, Hardware, Test, Manufacturing, and Quality to deliver robust and manufacturable SSD products. Responsibilities Drive SSD product engineering execution including manufacturing test bring-up, product qualification, firmware/test validation, and production readiness . Analyze test yield, characterization data, test limits, and manufacturing performance to identify issues and drive continuous improvement. Perform system-level failure analysis and root-cause investigation , working across Firmware, NAND, ASIC, Hardware, and Manufacturing teams to resolve complex product issues. Develop and improve test, debug, data analytics, automation, and AI-enabled engineering solutions to improve

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is hiring a System-Level Test (SLT) Engineer to ensure our silicon behaves predictably when running real workloads in real systems. You’ll build the software and system infrastructure that enables validation tests to operate reliably in manufacturing, while applying structured debug to separate hardware issues from software, interface, and environmental effects. This role is ideal for someone who understands how tests are constructed and how silicon responds under stress—and who can turn that insight into scalable, production-ready solutions. Candidates will be assessed for the appropriate level during the interview process, and the offer level may differ from the level listed in this posting. This role is hybrid, based out of Austin,TX; Santa Clara,CA; or Fort Collins, CO . We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You bring 10+ years of experience in system-level test, embedded systems, software architecture, or hardware/software integration, with strong skills in C/C++, Python, or similar languages. You apply object-oriented design principles to build modular, maintainable, and extensible test frameworks

InnoPhase Inc., DBA GreenWave Radios™, is at the forefront of innovation in Open RAN digital radios. Our cutting-edge solutions, powered by the Hermes64 RF SoC, are designed to enhance network energy efficiency while dramatically reducing operational expenses, with purpose-built silicon that is the heart of ORAN-based active antenna arrays. Headquartered in San Diego, California, GreenWave Radios™ has established itself as a pioneer in delivering power-efficient digital-to-RF solutions. The company is supported by a talented team of over 100 engineers spread across four global R&D facilities. With an extensive portfolio of more than 120 global patents, GreenWave Radios™ continues to push the boundaries of radio technology and innovation. To learn more about GreenWave Radios™ and hear what our employees have to say, visit the GreenWave™ certification profile at GreatPlacetoWork.com or explore our Home - GreenWave Radios website. About the Role GreenWave Radios is seeking a highly technical Staff RF System Test Engineer to develop, automate, and execute system-level validation of next-generation RF SoC platforms from early silicon bring-up through production release. You will be a hands-on contributor responsible for uncovering complex RF performance issues, building scalable test infrastructure, and generating the data that drives critical design decisions. As a member of the Systems Engineering Group in San Jose, CA, this role sits at the intersection of RF hardware, embedded software, and test automation. You will work directly with designers and developers to characterize radio performance, debug challenging system behaviors, and create robust automated test solutions that ensure compliance with global wireless standards. The ideal candidate combines deep RF measurement expertise with strong software development skills and enjoys solving difficult technical problems through rigorous experimentation and data-driven analysis. What You'll Do Des

About the Role At Together AI, you’ll build and operate one of the world’s largest GPU fleets used for frontier model training and inference. This isn’t a traditional infrastructure role—we’re looking for engineers who love building systems, automating everything, and solving problems at massive scale. If you enjoy writing software more than clicking dashboards, obsess over eliminating manual work, and want to build infrastructure that manages tens of thousands of GPUs autonomously, we’d love to talk. Responsibilities Design and build fleet automation systems that provision, validate, deploy, upgrade, repair, and retire GPU clusters with minimal human intervention. Build AI Infrastructure Agents that automate deployment, root-cause failures, incident triage, and autonomous remediation. Develop Fleet Intelligence platforms that continuously monitor hardware health, firmware, networking, storage, thermals, and workload performance to predict failures before they impact customers. Build software that maximizes GPU availability, utilization, performance, and reliability across thousands of accelerators. Create automated validation systems for GPUs, InfiniBand/RoCE fabrics, NVLink/NVSwitch, storage, and distributed AI workloads. Build internal platforms and developer tools that allow infrastructure to be managed through software—not manual operations. Continuously improve deployment velocity, reliability, and operational efficiency through automation. Partner closely with hardware, networking, platform, and AI teams to push the limits of AI infrastructure. Requirements 3+ years building distributed systems, infrastructure platforms, or large-scale backend software. Strong software engineering skills in Python, Go, or Rust . Experience building platforms, automation systems, or developer infrastructure. Experience with Linux, Kubernetes, Terraform, Ansible, or similar infrastructure technologies. Strong systems thinking with the ability to understand problems across hardw

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a hands-on RTL Design Engineer to own the microarchitecture and RTL implementation of the Power Management Subsystem/Interrupt Controllers/AXI Interconnect/Cache Controller . You’ll collaborate with cross-functional teams—architecture, firmware, software, DV, and PD—to define, design, and optimize power management solutions for next-generation RISC-V/ARM-based SoCs. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels. During the interview process, you will beevaluated and offered a level that aligns with your experience, which may differ from the one in this posting. Who You Are 5–10 years of experience in ASIC/SOC/IP design, with hands-on experience in microarchitecture and RTL development Skilled in Verilog/SystemVerilog and comfortable working across design, debug, and analysis Design and develop microarchitectures for a set of highly configurable IPs Microarchitecture and RTL coding ensuring optimal performance, power, area Work with verification teams on assertions, test plans, debug, coverage, etc. Deep understanding of power management concepts—clocking, reset, DVFS, and low-power modes Familiar with RISC-V or ARM-based SoCs and standard bus protocols (AXI, AHB, APB, CHI) Awareness of functional safety (ISO 26262) practices in hardware design What We Need Abil

About the Team The Hardware Health and Observability team owns the end-to-end health lifecycle of OpenAI’s global compute fleet. Our mission is to maximize healthy, usable compute across accelerator vendors, generations, cloud providers, and regions through reliable health signals, automated remediation, and scalable operational tooling. We build the systems that observe, detect, remediate, and verify hardware issues across GPUs, CPUs, networking, and platform infrastructure, enabling frontier model training and inference workloads to run reliably at hyperscale. We are the last line of defense for the success of OAI’s production and research workloads. About the Role On the Hardware Health and Observability team, you’ll build critical infrastructure that keeps OpenAI’s largest compute clusters healthy and operational at scale. Even small numbers of unhealthy systems can impact large-scale training and inference workloads. This team focuses on minimizing downtime, improving fleet efficiency, and ensuring compute resources remain continuously available to researchers and product teams. Engineers on this team own problems end-to-end, from defining health signals and debugging failures to building automated remediation systems that operate across millions of GPUs globally. In this role, you will: Define and maintain health signals across GPUs, CPUs, networking, and platform infrastructure. Build and evolve health checks that detect, remediate, and verify failures at scale. Ensure critical health checks execute with minimal latency to maximize workload uptime. Investigate hardware failures and system-level issues across large-scale compute environments. Own node lifecycle workflows including drain, quarantine, repair, RMA, and return-to-service processes. Build automation and tooling that enables global cluster management with minimal manual intervention. Partner with workload, reliability, and provider teams to integrate health signals into training and inference system