Transportation Outbound Strategy Manager Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities and Tasks: Global Standardization and BKM (Best Known Methods) Governance: Lead the development, standardization, benchmarking, and continuous improvement of FE ME operation/equipment metrics, capacity readiness processes, business processes, and BKMs across all sites. Govern Fab Manufacturing Engineering operational ground rules and ensure consistent alignment of methodologies, metrics, and best practices globally. Act as a global/area technical SME to optimize area operations, systems integration, and digital ecosystem adoption, driving global standardization and systemization of BKMs into long‑term ME blueprints. Facilitate WW ME forums, area network meetings, and sustain/audit existing global BKMs and business processes. Analyze line performance, equipment utilization, OEE, workstation/block WPD, and capacity readiness using Theory of Constraints and Lean Manufacturing. Proactively drive area efficiency improvement by deep‑diving into root causes of equipment availability losses, operating losses, and baseline capability gaps—partnering with Site Manufacturing, Process, Equipment, and SIC teams. Forecast potential roadblocks in constraint workstation management and work with Site Manufacturing Managers to create mitigation plans. Lead proof‑of‑concepts and deployment of automation solutions, scheduling enhancements, BKM dashboards, and digital reporting to improve fab productivity. </li

GitLab is the intelligent orchestration platform for DevSecOps. GitLab enables organizations to increase developer productivity, improve operational efficiency, reduce security and compliance risk, and accelerate digital transformation. More than 50 million registered users and more than 50% of the Fortune 100* trust GitLab to ship better, more secure software faster. The same principles built into our products are reflected in how our team works: we embrace AI as a core productivity multiplier, with all team members expected to incorporate AI into their daily workflows to drive efficiency, innovation, and impact. GitLab is where careers accelerate, innovation flourishes, and every voice is valued. Our high-performance culture is driven by our values and continuous knowledge exchange, enabling our team members to reach their full potential while collaborating with industry leaders to solve complex problems. Co-create the future with us as we build technology that transforms how the world develops software. * Fortune 500® is a registered trademark of Fortune Media IP Limited, used under license. Claim based on GitLab data. Fortune 100 refers to the top 20% ranked companies in the 2025 Fortune 500 list, published in June 2025. Fortune and Fortune Media IP Limited are not affiliated with, and do not endorse products or services of GitLab. An overview of this role As Legal Counsel, Commercial, you’ll help GitLab move faster by making commercial contracting clear, consistent, and scalable. Reporting to the Director, Legal, Commercial, you’ll partner with internal stakeholders and external counterparties to negotiate and review complex agreements, assess legal risk, and translate regional legal requirements into practical templates, policies, and processes. You’ll be a trusted advisor to teams across GitLab, helping them reach business goals while protecting GitLab’s interests, and you’ll contribute to the growth of the commercial legal function through mentorship, p

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description: For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming the ways people around the globe engage with information to improve life. We are looking for Layout Design engineer at our Micron Technology’s HBM Team in Guadalajara, Mexico. As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high performance computing solution, High Bandwidth Memory. As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment. Responsibilities: Design and development of analog, mixed-signal, custom digital block and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, quality check and documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Will bee leading planning, area/time estimation, scheduling, delegation and execution to meet project schedule/breakthroughs in multiple project environment. Effectively communicating with Global engineering teams to assure the success of layout project. Minimum Qualification: 5&#43; years of experience in analog/custom layout design in advanced CMOS process, in various

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join Micron’s AI Enablement team and help accelerate enterprise-wide AI adoption. This role is designed for engineers passionate about applying AI to real-world business challenges. You will work on rapid prototyping, automation, and integration of AI solutions that enhance productivity and innovation across diverse business areas. Responsibilities: AI Solution Development: Build and deploy AI-driven tools and workflows using platforms like Copilot Studio , UiPath , and other automation frameworks. Integration & Enablement: Connect AI agents with enterprise systems (e.g., SharePoint, M365), external APIs, knowledge bases, and ensure seamless interoperability. Process Automation: Identify repetitive tasks and design intelligent automation solutions to improve efficiency. Collaboration & Training: Partner with

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join Micron’s Memory Systems Engineering team and contribute to the development of premier digital and mixed-signal foundations for our high-bandwidth memory (HBM) products. This position offers an outstanding chance to work intimately with multiple engineering areas, guaranteeing the smooth integration and implementation of HBM base die. Join a motivated team committed to delivering robust first-pass silicon that meets our strict bandwidth, latency, power, and reliability objectives! Responsibilities Assist in defining and carrying out digital micro-architecture for HBM base-die subsystems, covering channel support logic, boot and initialization sequencing, training orchestration, configuration and status registers, telemetry, performance counters, and reliability features. Translate system requirements into timing, power, and area considerations by partnering with physical layer and system architects, and help maintain interface specifications for bus protocols, clock-domain crossings, and reset strategies. Implement and integrate synthesizable SystemVerilog RTL, including multi-channel logic, interrupts, events, register maps, scan hooks, and design-for-test interfaces, while supporting clean integration and ECO flows. Collaborate with design verification teams to support verification planning, coverage goals, CDC/RDC checks, and debugging of RTL, testbench, and gate-level issues. Support silicon bring-up and post-silicon validation through debug enablement, issue correlation to RTL or architecture, and col

We believe that the way people interact with their finances will drastically improve in the next few years. We’re dedicated to empowering this transformation by building the tools and experiences that thousands of developers use to create their own products. Plaid powers the tools millions of people rely on to live a healthier financial life. We work with thousands of companies like Venmo, SoFi, several of the Fortune 500, and many of the largest banks to make it easy for people to connect their financial accounts to the apps and services they want to use. Plaid’s network covers 12,000 financial institutions across the US, Canada, UK and Europe. Founded in 2013, the company is headquartered in San Francisco with offices in New York, Seattle, Washington D.C., Raleigh, London, and Amsterdam. Plaid is in one of the most exciting chapters in its history — and this role exists to make sure every Plaid employee feels it. As Internal Communications Lead, you'll build and own the systems, channels, and programs that keep Plaids informed, aligned, and energized about our mission and the opportunity ahead. This spans employee-facing comms and programming across channels, including programming and producing monthly All Hands and Half-yearly Business Reviews, and supporting leaders with change management. This is a builder role: you'll take what exists and programmatize it, defining the infrastructure, cadences, and editorial strategy that elevate how we communicate as a company. You'll play a central role in shaping Plaid's internal AI narrative, helping employees understand where AI is taking us and what it means for their work. You'll operate as a trusted advisor to Plaid's executive team and founder CEO, with the exec presence and judgment to counsel leaders on high-stakes moments. You will also work closely with senior leaders across the org as well as cross functional partners across the people team (Chief People Officer, HRBPs, WPE, Comp, Learning and Development) Respon

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. (English follows after Japanese) Manufacturing Engineering Clean, Coat, Repair, Refurb (CCRR)エンジニアとして、スペアパーツの改善を推進するチームの一員となります。このポジションは、 Micronの戦略的なJapan Business Ecosystemの目的と目標を達成するために、各拠点のHigh Volume Manufacturing Engineering/Process Equipment Engineering、コストチーム、調達、品質、その他のビジネスパートナーと協力して業務を遂行します。 役割と職責&#xff1a; 広島サイト戦略プログラム - Cost/Scale/Quality/Cycle Time (Speed) を達成するため、各Manufacturing エリアや、購買、 Operations Central Team チームなどのグループと共に、スペアパーツコスト削減活動をリード / サポートする。 Areaチームに技術的なコンサルティングと実践的な支援を提供し、最適なソリューションの作成や特定、既存のソリューションのトラブルシューティング、新しいソリューションの導入を行う。 Global/ 他サイト及び国内外の Supplier との Discussion を行います。 進捗状況を確認し担当者のサポートを行います。 内製 / 国内修理を拡大するため、 Global Bench team と共に内製修理、また地域企業と共に、国内修理再生を拡大するため、最適なソリューションや新技術の発掘、導入を行う。 募集要件&#xff08;下記のすべての条件を満たす必要はありません。&#xff09; 最低 3年以上の製造経験 工学学士&#xff0f;修士取得者 学習、成長、自己開発に対する熱意 英語コミュニケーションスキル&#xff08;英語を学ぶ意欲があること&#xff09; 問題解決能力、分析能力 目標達成へのコミットメントと粘り強さ 最終目標達成のために様々な相手と協力できる優れたコミュニケーション能力 時間管理能力とマルチタスク能力 CVD装置Equipment Engineer or Process Engineer経験者 As Manufacturing Engineering Clean, Coat, Repair, Refurb (CCRR) Engineer, you will be a member of the manufa

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Project Title Operation Flow Systemization with AI Agents Project Description This internship focuses on supporting the design and development of standardized operation flows through AI-enabled systemization . The intern will develop Python-based automation and AI agents that analyze operational data, identify inefficiencies, and support decision-making in a manufacturing environment. Scope of Work Analyze existing operational and manufacturing workflows to identify systemization opportunities Design and develop AI agents for: Operational flow assistance Alerting and exception handling Bottleneck and inefficiency identification Develop backend logic, automation scripts, and AI workflows using Python Work with MSSQL databases for: Data extraction Transformation and aggregation Integration into AI and analytics pipelines Apply relevant Python libraries, including (exposure expected, not mastery): pandas, numpy – data processing and analysis matplotlib, seaborn, plotly – data visualization scikit-learn – basic machine learning and pattern detection LLM / AI frameworks (e.g., LangChain, LlamaIndex, or equivalent internal AI tools) Collaborate with engineering, planning, and manufacturing teams to translate operational problems into AI-driven solutions Supporti

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a SoC Architecture and Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the architecture, design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, design, verification, physical design, firmware, and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area, and schedule targets. This is a hands-on technical role for candidates passionate about architecture, RTL build, IP integration, debugging, and pre/post-silicon support. Key Responsibilities Architect, design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die. Architect and design memory sub-systems including memory IP selection and integration, bus and protocol selection, and power/performance/area optimization. Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic). Trans

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Product Yield Enhancement (PYE) Electrical Failure Analysis (EFA) Engineer, you will work with a team dedicated to improving yields of next-generation memory products across all stages of the manufacturing lifecycle. Through failure analysis of test, internal qualification, and RMA failures, you will identify and help eliminate yield-limiting defects — driving enhanced product reliability, rapid production ramp, and early time to market. Your day-to-day work will center on fault isolation using a combination of electrical and physical characterization techniques paired with data analysis to pinpoint physical defects introduced during process fabrication or package assembly. You will also be responsible for presenting and coordinating failure analysis findings with Management, Product, Process, Assembly, and Global Quality teams to ensure corrective actions are implemented and yields continue to improve. Responsibilities Perform Electrical Failure Analysis and Fault Isolation using emission microscopy, laser techniques, EOTPR, and PFA/de-processing methods Characterize and model backend test, internal qualification, and RMA fail signatures using layout, schematic, and data analysis tools Apply in-depth knowledge of CMOS fabrication processes and package assembly flows to identify process- and assembly-related defects, root causes, and downstream effects Evaluate reliability concerns and delayed breakdown failure mechanisms across test insertions Perform

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Summary Department Introduction The OCT Material & Filtration Engineering team supports Micron’s global manufacturing network. The team focuses on material quality, risk reduction, and continuous improvement to enable successful technology ramps and sustainable manufacturing performance. We collaborate closely with engineering, quality, procurement, and operations partners around the world. Position Overview As an OCT MTE Material Engineering Staff/Principal Engineer, you will contribute to material quality, filtration strategy, and value‑engineering efforts across multiple sites. In this role, you will help shape global material strategies, strengthen risk controls, and share guidelines that improve safety, quality, speed, and cost. This position offers opportunities to grow technical influence while making a meaningful impact on technology development and high‑volume manufacturing. Responsibilities Support and lead material quality, filtration, risk mitigation, and value‑engineering initiatives across the global network. Partner with global and site teams to define and align material technical requirements and qualifications. Develop, share, and sustain Best Known Methods (BKMs) across manufacturing sites. Collaborate with fabs to build and complete material roadmaps that support technology ramps. Facilitate global peer teams to align priorities, strategies, and execution to manufacturing goals. Plan and manage projects

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. 世界最先端技術を使用した半導体部品の開発・設計・製造を行っている会社です。 マイクロンメモリジャパン社の就業環境の特徴として下記が挙げられます。 工場クリーンルーム内で就業を行う場合にはエアコンが一定温度で常に稼働しているので快適な環境で働けます。 外資系企業ですが、英語が出来なくても問題ありません。 入社後は社内研修実施に参加いただくので、未経験の方でも安心して働ける環境です。 ​ 業務概要: 最先端の半導体製造技術である「EUV&#xff08;極端紫外線&#xff09;露光技術」に関わる業務です。この最先端技術は、スマートフォンやPCなどに使われるメモリ製品の微細加工に不可欠なものであり、所属部門では新技術を量産工程へ導入する役割を担っています。 本ポジションでは、EUV露光工程で使用される「フォトマスク&#xff08;レチクル&#xff09;」の受入・検査・管理を担当します。 ※フォトマスクとは、半導体の回路パターンをシリコンウェハーに転写するための“原版”のようなものです。 【業務内容の一例】 フォトマスクの受入・外観検査・異常対応 新規装置の操作習得と運用改善 装置の保守・点検・トラブル対応 エンジニアとの連携による技術サポート 作業進捗の報告とチーム内での情報共有 【求める人物像】 未経験でも新しいことに前向きに挑戦できる方 積極的に業務に取り組み、責任感を持って行動できる方 チームメンバーと協力しながら改善提案ができる方 翻訳ツールを活用して英語の読み書きに取り組める方&#xff08;英語学習への意欲があればOK&#xff09; 日本語でのコミュニケーションが可能な方&#xff08;必須&#xff09; 【必須条件】 高校卒業以上 Microsoft office(Word, Excel, PowerPoint, Outlookなど&#xff09;基本的なソフトウエアを 使用できる。 日本語でのコミュニケーション must have Japanese language skills 【勤務形態】 交代制勤務&#xff08;年間休日180日以上&#xff09; 日勤&#xff1a;8:00&#xff5e;20:15 夜勤&#xff1a;20:00&#xff5e;8:15 <

GitLab is the intelligent orchestration platform for DevSecOps. GitLab enables organizations to increase developer productivity, improve operational efficiency, reduce security and compliance risk, and accelerate digital transformation. More than 50 million registered users and more than 50% of the Fortune 100* trust GitLab to ship better, more secure software faster. The same principles built into our products are reflected in how our team works: we embrace AI as a core productivity multiplier, with all team members expected to incorporate AI into their daily workflows to drive efficiency, innovation, and impact. GitLab is where careers accelerate, innovation flourishes, and every voice is valued. Our high-performance culture is driven by our values and continuous knowledge exchange, enabling our team members to reach their full potential while collaborating with industry leaders to solve complex problems. Co-create the future with us as we build technology that transforms how the world develops software. * Fortune 500® is a registered trademark of Fortune Media IP Limited, used under license. Claim based on GitLab data. Fortune 100 refers to the top 20% ranked companies in the 2025 Fortune 500 list, published in June 2025. Fortune and Fortune Media IP Limited are not affiliated with, and do not endorse products or services of GitLab. An overview of this role As an Senior AI Engineer at GitLab, you'll help build the foundation for GitLab's transformation into an AI-first company. Reporting to the Director, Enterprise AI, you'll be a hands-on technical leader responsible for delivering internal AI-powered solutions that drive measurable business outcomes. Building fast matters, but it's not enough on its own. This role starts with understanding the real problem: mapping how work moves across teams, tools, and handoffs, identifying the true constraint, and validating whether AI is the right solution before you begin development. From there, you'll take ownership

We believe that the way people interact with their finances will drastically improve in the next few years. We’re dedicated to empowering this transformation by building the tools and experiences that thousands of developers use to create their own products. Plaid powers the tools millions of people rely on to live a healthier financial life. We work with thousands of companies like Venmo, SoFi, several of the Fortune 500, and many of the largest banks to make it easy for people to connect their financial accounts to the apps and services they want to use. Plaid’s network covers 12,000 financial institutions across the US, Canada, UK and Europe. Founded in 2013, the company is headquartered in San Francisco with offices in New York, Seattle, Washington D.C., Raleigh, London, and Amsterdam. The Marketing Operations (Ops) Team at Plaid builds the essential foundation that enables the Marketing function to operate efficiently, scale sustainably, and align with the company’s strategic goals. We focus on people, technology and process to drive operational excellence and optimize marketing performance. Our team is focused on creating and executing impactful marketing strategies that resonate with our target audiences, drive sustainable growth through high-quality pipeline generation, and enhance marketing efficiency. By integrating innovative technologies, we strive for seamless workflows and data-driven decision-making. We also continuously strengthen the foundation of a high-performing marketing organization, ensuring that processes and systems are in place to support long-term success. Responsibilities: Own the strategy and execution for integrating AI into marketing workflows, identifying high-impact opportunities to improve efficiency, scalability, and performance. Design, build, and deploy AI-powered agents and automations that support marketing workflows. Evaluate emerging AI tools and technologies, staying current on industry trends and translating new capabilitie

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description: As a Mixed-Signal Design Engineer in Micron’s Pathfinding Design Team, you will play a key role in crafting next-generation memory technologies. This position involves contributing to defining, developing, and analyzing high-speed logics to operate the memory. These paths span from the memory array to the interface block for memory technologies, including DRAM and emerging memories. You will work on novel concept development, circuit simulation, optimization, and floor planning to enable groundbreaking memory solutions! Responsibilities: Provide technical direction and design implementation for a memory control circuits (both of digital and analog) from the memory array to the interface block. Collaborate closely with physical design teams to ensure timing closure, CDC robustness, and power intent alignment. Demonstrated experience working with custom mixed-signal IC build and development for volatile or nonvolatile memory technology. Experience with modeling and simulation of ICs using HSPICE/finesim. Minimum Qualifications: Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or related field. 7&#43; years of experience in custom mixed-signal circuit design. Proficiency with UNIX and CADENCE design environment (Simulation, Schematic entry, SPF extraction) </