Lead Implementation Services Project Manager in Austin

Shape the Future with Dun & Bradstreet At Dun & Bradstreet, we believe data has the power to create a better tomorrow. As a global leader in business decisioning data and analytics, we help companies worldwide grow, manage risk, and innovate. Since 1841, businesses have trusted us to turn uncertainty into opportunity. We’re a diverse, global team that values creativity, collaboration, and bold ideas. Are you ready to make an impact and help shape what’s next? Join us! Explore opportunities at dnb.com/careers.

Shape the Future with Dun & Bradstreet At Dun & Bradstreet, we believe data has the power to create a better tomorrow. As a global leader in business decisioning data and analytics, we help companies worldwide grow, manage risk, and innovate. For over 180 years, businesses have trusted us to turn uncertainty into opportunity. We’re a diverse, global team that values creativity, collaboration, and bold ideas. Are you ready to make an impact and help shape what’s next? Join us! Explore opportunities at dnb.com/careers.

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. At Tenstorrent, we build open, state of the art compute for real workloads and real developers. You will own CPU core-level testbench development and verification, shaping how our out-of-order RISC-V CPUs behave in silicon. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You bring 8+ years in CPU verification, CPU testbench development, or closely related digital design. You have deep hands-on experience building and owning CPU core-level testbenches, not just using existing environments. You know high-performance out-of-order CPU microarchitecture in depth. You are comfortable developing testbench infrastructure in CVM methodology, with UVM experience as a strong plus. You work comfortably across RTL, waveforms, logs, regressions, and cross-functional debug with design, DV, emulation, and post-silicon teams. You are comfortable using AI-assisted verification workflows to improve debug, stimulus creation, and coverage analysis, while applying strong engineering judgment to validate results. What We Need Lead hands-on CPU core-level testbench development for hi

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. At Tenstorrent, we build open, state of the art compute for real workloads and real developers. You will own CPU focused test generator development and verification strategy, shaping how our out-of-order RISC-V CPUs are validated against complex ISA and microarchitectural behavior. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You bring 8+ years in CPU design verification, test generation, or closely related CPU validation work. You have led development of test generators for x86, ARM, or RISC-V ISA environments. You understand CPU ISA behavior, privileged architecture, and high-performance out-of-order CPU microarchitecture. You are comfortable building tools, stimulus, and automation that scale verification across large CPU programs. You communicate clearly across design, DV, architecture, emulation, and post-silicon teams. What We Need Lead development of CPU core-level test generators for high-performance out-of-order RISC-V cores. Own generator strategy, infrastructure, and methodology for ISA and microarchitectural verification in both pre-silico

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of a best-in-class family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from a diverse group of backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary We are seeking a senior validation lead engineer to lead at-scale rack validation efforts for next-generation AI hyperscale systems. This role focuses on post-silicon system validation across the full lifecycle, ensuring functional, electrical, and thermal performance meets product objectives. You will own end-to-end blade and rack validation including planning, development, execution, and debug while collaborating across firmware, systems, and hardware teams. The Team The Rack Validation team is responsible for ensuring system readiness and quality at scale. The team works cross-functionally with firmware, silicon, and system engineering teams to validate complex AI compute platforms. Responsibilities and Duties Lead post-silicon validation of AI compute blades and racks including test planning, development, and automation. Drive provisioning and integration of system components (SoC FW, BMC, RMC, OS) for rack-level readiness. Own execution against program achievements and report validation progress and risks. Triage test failures, collect debug data, and collaborate on root cause analysis. Track

About the job Lead the team that proves our AI silicon performs reliably before it reaches customers. You will build and lead Graphcore's characterisation capability for next generation silicon and system platforms. Your work will help ensure our products perform consistently across real world conditions. You will define bring up and characterisation strategies, lead technical execution, and shape the lab infrastructure needed for success. You'll work across silicon, hardware, manufacturing, architecture and product teams to solve complex engineering challenges. This is a hands on leadership role with the opportunity to influence both product design and how Graphcore validates future AI systems. The team and culture This is a newly formed team within Manufacturing Operations. You'll have the opportunity to establish how the team works while building strong partnerships across engineering and operations. Day to day, you'll work closely with architecture, silicon, hardware, production test and product teams. Decisions are driven by data, technical evidence and close collaboration across disciplines. We value ownership and clear communication. You'll be trusted to lead technical direction, remove blockers and help teams make progress with confidence. What we're looking for Essential Proven track record of delivering complex technical projects as an individual contributor, manager, or project manager, with the ability to work independently and drive execution. Strong expertise in silicon digital device design, bring-up, characterisation, and silicon process technologies, with an understanding of their impact on transistor- and system-level performance. In-depth knowledge of high-performance processors, system-on-chip (SoC) architectures, and high-speed digital interfaces such as PCIe, Ethernet, and DDR. Experience with measurement automation, data analysis, and scripting/coding to develop automated test and analysis workflows, with familiarity of ATE systems and t

Manufacturing Test Engineering Manager Position Summary We are seeking an experienced Manufacturing Test Engineering Manager to lead the development and execution of the end-to-end manufacturing test strategy for next-generation AI server platforms and datacenter infrastructure. This role is responsible for defining and driving the manufacturing test architecture from L6 board assembly through L11 rack-level integration and final system validation , ensuring world-class product quality, manufacturability, and production scalability. This leader will manage a team of 3–5 Manufacturing Test Engineers while partnering closely with Hardware, Firmware, Platform, Validation, Quality, Operations, and Joint Design Manufacturing (JDM) partners. The role owns the manufacturing test strategy, test coverage, factory test infrastructure, manufacturing capacity planning, and continuous improvement of manufacturing quality. Key Responsibilities Manufacturing Test Strategy Define and own the end-to-end manufacturing test strategy from L6 board assembly through L11 rack integration . Develop standardized manufacturing test methodologies that optimize quality, throughput, cost of test, and scalability across multiple products and JDM sites. Establish manufacturing test standards, best practices, and engineering processes that support high-volume server manufacturing. Technical Leadership & People Management Lead, mentor, and develop a team of 3–5 Manufacturing Test Engineers supporting multiple hardware programs. Establish team priorities, allocate resources, and ensure successful execution of manufacturing test deliverables. Foster a culture of technical excellence, accountability, collaboration, and continuous improvement. Serve as the primary technical escalation point for manufacturing test and production issues. Cross-Functional Engineering Collaboration Partner with Hardware, Platform, Firmware, Validation, Reliability, Quality, and Operations teams to ensure manufac

ABOUT TOPGOLF Topgolf is a sports entertainment company that has changed how millions of people experience golf and where you can build a serious career. Our venues are high-energy, high-volume environments where performance matters and results are visible. Every day, we bring together golf, food and beverages, events, and entertainment into one experience that keeps guests coming back. WHAT WE’RE SEEKING Do you hold the line on quality even when it is busy? Can you lead a kitchen team through a high-volume service and still have the team better when the shift ends than when it started? We are looking for a Culinary Manager who leads from the front. Someone who understands food cost and portion control, coaches their team through the work, and takes genuine ownership of the kitchen's performance. Consistency is not lucky. It is what happens when a leader pays attention. If you run a tight, proud kitchen, this is where those matter. THE ROLE The Culinary Manager supports the Executive Culinary Manager in leading all kitchen operations, ensuring best-in-class culinary experiences for every guest. This role requires both culinary expertise and the ability to lead, coach, and develop the kitchen team. The Culinary Manager may be responsible for day-to-day line operations or events execution. They supervise the kitchen team, manage inventory and product ordering, enforce safety and sanitation standards, and maintain the quality and consistency Topgolf guests expect. As a leader of a high-energy, guest-facing venue, this role requires a flexible schedule including evenings, weekends, and holidays, with availability to work extended hours during peak periods, special events, and high-volume seasons. WHAT YOU WILL DO Lead Kitchen Operations • Supervise the kitchen team in delivering best-in-class culinary experience

Overview The Associate Director of Service Engineering leads the reliability, availability, and operational excellence of Natera’s lab-facing platforms. This role ensures that clinical systems, laboratory equipment workflows, and data pipelines operate with high reliability, scalability, and compliance in a regulated healthcare environment. You will lead a team responsible for production stability, incident response, and service health, partnering closely with Production Engineering, Lab Operations, Bioinformatics, Infrastructure, Facilities, and Compliance to support mission-critical genetic testing and diagnostics. Key Responsibilities Leadership & Team Development Lead, mentor, and scale a team of Service Engineers / SREs supporting clinical production systems Establish clear expectations around ownership, on-call readiness, and operational excellence Drive hiring, onboarding, performance management, and career growth Foster a blameless, learning-oriented culture focused on patient impact and reliability Service Reliability & Production Operations Own reliability and availability for production services supporting laboratory operations, reporting, and customer delivery Define and manage SLAs, SLOs, and operational KPIs aligned with clinical and business priorities Lead major incident response, ensuring rapid triage, clear communication, and thorough post-incident reviews Oversee on-call rotations, escalation paths, and operational playbooks Ensure operational readiness and go-live support for new assays, pipelines, and platform capabilities Technical Strategy & Execution Partner with Engineering and Development teams to design resilient, fault-tolerant systems Drive best practices for monitoring, alerting, logging, and observability across lab and cloud platforms Reduce operational toil through automation, tooling, and process improvements Advocate for reliability, performance, and scalability requirements early in t

POSITION SUMMARY: Assists in analyzing specimens and maintains equipment in good operating condition. PRIMARY RESPONSIBILITIES: • Assist in testing of patient samples according to standard operating procedure. •Meet expected performance metrics within role as applicable. • Responsible for maintaining updated understanding and knowledge of methods performed in the lab • Provide guidance for new team members. • Follows GLP (good laboratory practice): maintain clean and organized workspace • Completes training and other deadlines on time. • Recognizes, escalates, and troubleshoot equipment malfunctions and common processing errors according to the laboratory’s standard operating procedures • Recognizes, documents, and escalates protocol deviations in lab to lead/supervisor • Communicates with team and other departments on various platforms (including via e-mail) • Provides feedback on day-to-day schedule and tasks to lead/supervisor • Assists teammates in completing daily tasks • Maintains equipment and instruments in good operating condition (such as calibration and expiration date) • Maintain sufficient inventory of material, supplies and equipment in the laboratory for performance of duties. • Participate in Continuous Improvement Projects (TAG, 5S) • Conducts himself/herself in a professional manner • Adheres to Departmental Expectations • This role works with PHI on a regular basis both in paper and electronic form and have access to various technologies to access PHI (paper and electronic) in order to perform the job • Employee must complete training relating to HIPAA/PHI privacy, General Policies and Procedure Compliance training and security training as soon as possible but not later than the first 30 days of hire. • Must maintain a current status on Natera training requirements. • Employee must pass post-offer criminal background check. • Performs other duties as assigned. QUALIFICATIONS: • BS/BA in a biological science or a related field • 0-2 y

Fanatics Commerce is the global leader in licensed sports merchandise, operating a vertically integrated platform that designs, manufactures, and delivers officially licensed apparel, jerseys, headwear, and collectibles for major leagues, teams, and events worldwide. With more than 900 e-commerce sites and a global omnichannel presence across digital, in-venue, and retail, Fanatics Commerce reaches fans in over 180 countries and powers official fan experiences for many of the world's most iconic sports properties. At Fanatics, we bring our BOLD Leadership Principles to life every day - building championship teams, obsessing over fans, acting with entrepreneurial speed, and delivering with a determined and relentless mindset. As we continue to scale our global platform, the Retail Supervisor will play a critical role in driving store and venue sales results and delivering the ultimate fan experience on game day. ROLE OVERVIEW The Retail Supervisor partners with the store Leadership team to lead the front-line part-time retail team — including Retail Associates and Retail Leads — across daily operations, coaching, and game day execution. This role carries full Manager on Duty responsibilities and operates on a full-time schedule that includes days, nights, weekends, and extended hours during events. The Retail Supervisor delivers business and fan impact through BOLD leadership and execution excellence, leveraging data, automation, and AI-enabled insights. HOW WILL YOU DRIVE IMPACT Success is measured by the ability to deliver results through BOLD capabilities and measurable outcomes. Team & Leadership Impact (Build Championship Teams) Cross-Functional Leadership: Partner with store Leadership on key business decisions, including revenue targets, per cap, and units per transaction (UPT), providing recommendations grounded in observed operational data. Communicate expectations clearly for assignments and projects to the part-time retail team, ensuring alignment acro

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking an Physical Design Engineer to lead cross-functional efforts to solve complex physical design challenges and develop end-to-end RTL-to-GDS methodologies across advanced nodes, with a strong focus on PPA and runtime improvements. The engineer will architect, integrate, and deploy AI/ML-driven solutions into production physical design flows, creating custom CAD tools and partnering with internal teams and EDA vendors to drive next-generation, ML-enabled capabilities. This role is hybrid, based out of Santa Clara, CA or Austin, TX or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are BS in Electrical or Computer Engineering (or equivalent experience) with 5+ years in Physical Design CAD methodology at advanced nodes. Proven track record improving PPA and/or runtime on high-performance, low-power taped-out designs. Hands-on with industry-standard EDA tools (e.g., Fusion Compiler) across synthesis, P&R, STA, signoff, and hierarchical flows. Strong Python/Tcl and data skills, with interest or experience in ML frameworks (PyTorch, TensorFlow), and the ability to drive complex projects independent

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a CPU Verification Fellow to lead verification strategy and execution for next-generation RISC-V high-performance processors. This role requires deep CPU verification expertise, strong microarchitecture understanding, and the ability to guide large engineering teams from early design through tapeout and post-silicon validation. The ideal candidate has verified complex out-of-order, speculative, superscalar CPUs and can define scalable methodology across simulation, formal verification, emulation, FPGA, and silicon bring-up. This role is hybrid, based out of Santa Clara, CA or Austin, TX. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You have deep experience verifying high-performance superscalar CPUs, ideally including out-of-order and speculative processors. You have strong knowledge of RISC-V architecture, including ISA compliance, privileged architecture, virtual memory, atomics, vector extensions, and memory model behavior. You are highly proficient in SystemVerilog, UVM, constrained-random verification, assertions, functional coverage, and advanced debug methodologies. You have hands-on experience with CPU refere

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a Director of Accounting Operations to lead and scale the company’s core accounting operations function. This leader will build a disciplined, accurate, audit-ready, and scalable organization that can support rapid growth, global expansion, increasing transaction complexity, and future public-company requirements. In this role, you will oversee day-to-day accounting operations across AP, AR, payroll accounting, fixed assets, accruals, reconciliations, and close operations while partnering across global finance functions. This role is hybrid, based out of Santa Clara,CA; Austin,TX; Boston, MA; or Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are An experienced accounting operations leader who thrives in fast-paced, high-growth environments and brings strong technical accounting judgment, operational discipline, and a builder’s mindset. Equally comfortable solving detailed accounting issues and designing scalable processes, systems, and controls, with a strong foundation in US GAAP, close, reconciliations, accruals, AP, AR, payroll accounting, fixed assets, internal controls, and audit support. Able to tell wha

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a SoC Physical Design Verification Engineer to drive full-chip signoff and ensure manufacturable, high-quality silicon across advanced technology nodes. You’ll lead physical verification closure (DRC, LVS, ERC, etc.), debug issues using standard industry PV tools, and collaborate across RTL, PD, CAD, and packaging teams to achieve successful tapeouts. If you thrive in a fast-paced environment and enjoy solving complex challenges in cutting-edge silicon, we’d love to hear from you. This role is hybrid , based out of Santa Clara, CA or Austin, TX or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A seasoned engineer with a strong background in CPU/IP/SoC physical verification and tapeout closure. A hands-on problem solver who excels at debugging and driving signoff through complex verification flows. A collaborative team player who works effectively across RTL, PD, CAD, and foundry interfaces. A mentor and technical leader passionate about building efficient, manufacturable silicon. What We Need BS/MS in Electrical/Electronics Engineering (or related) with 7–14 years of hands-on CPU/IP/SoC physical verif