Architect Memory Subsystem Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary – Member of Technical Staff - Agentic AI Architect, Smart Manufacturing AI Pathfinding & Innovation (AIPI) Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The memory solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. The Smart Manufacturing and AI team at Micron Technology is looking for an ambitious engineer (Member of Technical Staff | MTS) to deliver industry-winning Agentic AI solutions that power Micron’s dominance in the highly competitive memory solutions market. This role sits at the intersection of applied Agentic AI engineering and production systems work: you will architect autonomous AI Agents and the agentic and data pipelines that power them, build robust CI/CD deployment paths to Kubernetes and containers, and push the limits of agent performance profiling and evaluation to turn massive data and compute into measurable manufacturing impact. Qualified applicants will have experience across data/cloud technologies and systems engineering, with extensive practice modeling data, querying, and deploying scalable pipelines to execute AI agents. You will collaborate with Data Scientists, Data Engineers and expert users to build and deploy scalable Agentic AI solutions that drive value and insight from Mi

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join Micron’s AI-Optimized Memory Architecture team, where we are shaping the future of artificial intelligence workloads through next-generation memory solutions. We partner closely with customers to architect and deliver high-performance memory systems that enable emerging AI platforms and applications. Our team values innovation, technical excellence, and collaboration as we bring advanced memory technologies from concept to silicon. As a Member of Technical Staff, you will play a key role in translating architectural vision into efficient, silicon-proven hardware implementations. This position offers the opportunity to work on tightly coupled, high-performance memory architectures for AI, balancing performance, power, area, and reliability while influencing critical design decisions across the development lifecycle. Responsibilities: Translate architecture requirements into scalable microarchitectures and drive implementation from concept through silicon Design, implement, and review SystemVerilog RTL for advanced memory system architectures Perform synthesis and early PPA analysis to optimize area, power, and timing Develop and maintain microarchitecture documentation that aligns design intent across teams Evaluate architectural and implementation tradeoffs to support technical decision-making Minimum Qualifications: Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Interested in changing the landscape of artificial intelligence workloads? Join our team where we are building next-generation, high-bandwidth memory products. In Micron's High Bandwidth Memory Architecture organization, we partner closely with customers to deliver memory solutions purpose-built for emerging AI systems and applications. As a Member of Technical Staff, SoC Power and Physical Architect in the Next-generation HBM Architecture Team, you will drive SoC-level specification 3D-stacked, high-performance memories. Apply your knowledge to analyze SoC trade-offs in close collaboration with peer architecture and design teams. Drive power architecture, physical planning, and early SoC design activities, including definition of IP interfaces (e.g., signals, power delivery), clocking, power sequencing, design-for-test, floorplanning, and specification development. Responsibilities: Define clocking architectures, power sequencing, power delivery, and on-die signal interfaces. Define and analyze on-die power delivery networks (PDN) and full-chip thermal implications, including power hot-spot identification and mitigation. Define DFT architectures (e.g., scan chain topology) and set verification requirements. Define SoC floorplans in collaboration with physical designers. Compose and maintain clear SoC physical documentation. Preferred Qualifications: Experie

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are the Core Data Business Unit (CDBU), where memory, storage, and system architecture come together to shape the future of AI and datacenter platforms. We work at the intersection of silicon, systems, and ecosystems to solve problems at hyperscale—and we do it by partnering deeply across Micron and with the industry. If you enjoy influencing what comes next in computing infrastructure, you’ll find that work here matters! As a Sr. Principal Solutions Architect for Network Interconnect Technology, you will play a critical role in defining how Micron’s memory and storage technologies connect, scale, and deliver value in next-generation AI and datacenter systems. This role blends long-term vision with hands-on technical leadership, customer engagement, and ecosystem influence. You will help set strategy, guide architecture decisions, and translate emerging interconnect technologies into real system and business impact. Responsibilities: Own Micron’s long-term network and optical interconnect strategy aligned to AI-scale and hyperscale datacenter needs Define system and interconnect architectures across electrical and optical fabrics, endpoints, and scale-up/scale-out topologies Lead deep technical engagements with hyperscale customers and ecosystem partners to evaluate trends and drive adoption Translate architectural direction into product requirements and roadmaps with business, R&D, and engineering teams Communicate system-level tradeoffs and re

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Summary – Member of Technical Staff - Agentic AI Architect, Smart Manufacturing AI Pathfinding & Innovation (AIPI) Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The memory solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. The Smart Manufacturing and AI team at Micron Technology is looking for an ambitious engineer (Member of Technical Staff | MTS) to deliver industry-winning Agentic AI solutions that power Micron’s dominance in the highly competitive memory solutions market. This role sits at the intersection of applied Agentic AI engineering and production systems work: you will architect autonomous AI Agents and the agentic and data pipelines that power them, build robust CI/CD deployment paths to Kubernetes and containers, and push the limits of agent performance profiling and evaluation to turn

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking an experience high-speed high-speed IO/Clocking Design Engineering at a Principal/Sr Member of Technical Staff (SMTS) level to join our DRAM IP Design team and contribute to the development of critical high-speed IP circuits used across Micron’s DRAM memory products. In this role, you will be responsible for the architecture, design, development, optimization, verification, and technical support of these high-speed IPs. You will focus on equalization and bandwidth extension to push the limits of circuit and process performance, analyze IO impairments as well as clock jitter and duty cycle distortion, and assess their impact on DRAM system timing. You will also develop core strategy and implement effective engineering solutions to address these challenges. Relocation to Micron headquarter in Boise, Idaho is required for this position. Responsibilities: Define, innovate, design, optimize and verify high-speed IO and clocking circuits used in new DRAM products. Apply robust high-speed circuit design techniques and enhance critical performance evaluation, including timing and jitter sensitivity, of the IO data path and clock path at circuit and full-chip level. Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full-chip and system level. Work with Product Engineering and SI team to compare silicon performance with simulation resu

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a Principal/Member of Technical Staff (MTS) IO/Clock Design Engeer to join our DRAM IP Design team and contribute to the development of critical high-speed IP circuits used across Micron’s DRAM memory products. In this role, you will be responsible for the design, development, optimization, verification, and technical support of these high-speed IPs. You will focus on equalization and bandwidth extension to push the limits of circuit and process performance, analyze IO impairments as well as clock jitter and duty cycle distortion, and assess their impact on DRAM system timing. You will also develop and implement effective engineering solutions to address these challenges. Relocation to Micron headquarter in Boise, Idaho is required for this position. Responsibilities: Innovate, design, optimize and verify high-speed IO and clocking circuits used in new DRAM products. Apply robust high-speed circuit design techniques and enhance critical performance evaluation, including timing and jitter sensitivity, of the IO data path and clock path at circuit and full-chip level. Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full-chip and system level. Work with Product Engineering and SI team to compare silicon performance with simulation results and support correlation activities. Collaborate with process integration and transistor

Who We Are At OKX, we believe that the future will be reshaped by crypto, and ultimately contribute to every individual's freedom. OKX is a leading crypto exchange, and the developer of OKX Wallet, giving millions access to crypto trading and decentralized crypto applications (dApps). OKX is also a trusted brand by hundreds of large institutions seeking access to crypto markets. We are safe and reliable, backed by our Proof of Reserves. Across our multiple offices globally, we are united by our core principles: We Before Me , Do the Right Thing , and Get Things Done . These shared values drive our culture, shape our processes, and foster a friendly, rewarding, and diverse environment for every OK-er. OKX is part of OKG, a group that brings the value of Blockchain to users around the world, through our leading products OKX, OKX Wallet, OKLink and more. About the Opportunity We are seeking an AI Infrastructure Engineer to design and build the foundational systems that power next-generation AI agents. This role sits at the intersection of research and production engineering, focusing on scalable long-term memory , knowledge graph infrastructure , and robust context management systems . You will transform cutting-edge research concepts (e.g., Context Graphs, GraphRAG, agent memory architectures) into auditable, maintainable, and production-grade infrastructure that enables reliable, stateful AI systems. What You’ll Be Doing Architect and implement long-term memory infrastructure for AI agents , including auditable, versioned, and rollback-capable middleware that supports persistent, stateful reasoning. Design and own end-to-end GraphRAG and knowledge graph pipelines , from ingestion and schema design to graph indexing, retrieval optimization, and integration with LLM-based reasoning systems. Build scalable context management infrastructure , elevating context from prompt-level techniques to structured, maintai

OKX will be prioritising applicants who have a current right to work in Singapore, and do not require OKX's sponsorship of a visa. Who We Are At OKX, we believe that the future will be reshaped by crypto, and ultimately contribute to every individual's freedom. OKX is a leading crypto exchange, and the developer of OKX Wallet, giving millions access to crypto trading and decentralized crypto applications (dApps). OKX is also a trusted brand by hundreds of large institutions seeking access to crypto markets. We are safe and reliable, backed by our Proof of Reserves. Across our multiple offices globally, we are united by our core principles: We Before Me , Do the Right Thing , and Get Things Done . These shared values drive our culture, shape our processes, and foster a friendly, rewarding, and diverse environment for every OK-er. OKX is part of OKG, a group that brings the value of Blockchain to users around the world, through our leading products OKX, OKX Wallet, OKLink and more. About the Opportunity We are seeking an AI Infrastructure Engineer to design and build the foundational systems that power next-generation AI agents. This role sits at the intersection of research and production engineering, focusing on scalable long-term memory , knowledge graph infrastructure , and robust context management systems . You will transform cutting-edge research concepts (e.g., Context Graphs, GraphRAG, agent memory architectures) into auditable, maintainable, and production-grade infrastructure that enables reliable, stateful AI systems. What You’ll Be Doing Architect and implement long-term memory infrastructure for AI agents , including auditable, versioned, and rollback-capable middleware that supports persistent, stateful reasoning. Design and own end-to-end GraphRAG and knowledge graph pipelines , from ingestion and schema design to graph indexing, retrieval optimization, and integration with LLM-based reasoning systems. Build scalable context management inf

NVIDIA is currently seeking a Solutions Architect Manager for Data Processing! Would you enjoy researching new algorithms and memory management techniques to accelerate data processing on modern computer architectures? Do you like investigating hardware and system bottlenecks, and optimizing performance of data intensive applications? Are you excited about the opportunity to work on the top tier edge of technology with both visibility and impact to the success of a leader like NVIDIA? If so, the Solution Architecture Team invites you to consider this opportunity. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, revolutionized parallel computing, and ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence; join our team today! What you will be doing: In this role, you will lead a data processing SA team to research and develop techniques to GPU-accelerate high performance database, ETL and data analytics applications and new AI data processing technologies. Work closely in China To4++ in their fields (industry and academia) to perform in-depth analysis and optimization of complex data intensive workloads to ensure the best possible performance of current GPU/CPU architectures. Influence the design of next-generation hardware architectures, software, and programming models in collaboration with research, hardware, system software, libraries, and tools teams at NVIDIA Influence partners (industry and academia) to push the bounds of data processing with NVIDIA’s full product line What we need to see: Masters or PhD in Computer

About the Role We are building a new class of clinical-grade AI agents powered by a foundational model that unifies 3D volumetric medical data and textual reasoning . These agents will assist with radiology workflows, treatment planning, case summarization, longitudinal patient analysis, and human-in-the-loop clinical decision support. In this role, you will design the agent layer that transforms a powerful multimodal foundation model into a safe, reliable, adaptive medical assistant capable of analyzing 3D scans, retrieving past cases, explaining findings, and coordinating multi-step reasoning chains. This position is ideal for researchers from multimodal/VLM/CLIP ecosystems who want to move up the stack into autonomous medical reasoning , multimodal alignment, and real-world clinical impact. What You Will Work On Architect LLM-driven medical agents capable of: Reading & interpreting 3D medical volumes (MRI, CT, PET). Answering radiology questions, generating report drafts, and performing differential reasoning. Retrieving similar prior cases using contrastive embeddings. Synthesizing multi-instance evidence across scans, labs, and notes. Executing multi-step “clinical workflows”—image → analysis → summary → recommendation. Integrate clinical agents with the 3D foundation model’s representations, enabling structured medical reasoningand contextual memory across longitudinal data. Develop evaluation frameworks for trustworthiness, interpretability, calibration, and clinical safety. Collaborate with clinicians and scientists to co-design tasks, datasets, and validation protocols. Benchmark models against open and proprietary datasets: MIMIC, CheXpert, MosMed, LiTS, BraTS, and India-specific clinical corpora. Publish findings at top-tier venues (MICCAI, NeurIPS, AAAI, EMNLP). Work with regulatory and product teams to translate research into medically viable systems. Why This Role Appeals to CLIP / VLM / Chitrarth / Patram Authors A rare opportunity to work at the

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Interested in changing the landscape of artificial intelligence workloads? Join our team where we are building next-generation, high-bandwidth memory products. In Micron's High Bandwidth Memory Architecture organization, we partner closely with customers to deliver memory solutions purpose-built for emerging AI systems and applications. As a Senior Member of Technical Staff or Member of Technical Staff, DRAM Design Engineer in the next-generation HBM Architecture team, you will drive the architecture and optimization 3D-stacked, high-performance memories. Apply your knowledge to optimize DRAM designs and architectures for maximum performance, power, and area (PPA). This role is ideal for experienced DRAM designers who will identify, architect, design, and simulate next-generation architectures and memory features in collaboration with experts in stack architecture, memory systems architecture, and SoC microarchitecture. Responsibilities: Identify and develop novel DRAM circuit architectures that anticipate next-generation AI workload requirements, to unlock improvements in bandwidth and energy efficiency. Collaborate with peers to identify the highest-leverage DRAM circuit bottlenecks and define architectural hypotheses. Validate architectural hypotheses through schematic-level circuit design, SPICE simulation, and tradeoff analysis, establishing PPA feasibility. Partner with layout designers to conduct floorplanning studies. Colla

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Systems Software Engineer in the Storage and Memory Systems (SMS) group within Micron’s ITP Pathfinding organization, you will architect, design, and develop software that enables and demonstrates the value of future memory and storage technologies. You will work in a small, highly skilled engineering team, collaborating closely with AI/ML application and modeling specialists, software engineers, hardware engineers, and system architects. Your pathfinding work will accelerate the development of future products and influence technical direction. This role requires broad technical expertise and a willingness to contribute across multiple layers of AI and systems software stacks, from AI applications to hardware/software interfaces. Responsibilities Design and modify AI inference software stacks to enable proof-of-concept hardware capabilities. Develop software to quantify and demonstrate the value of proposed system features. Lead software architecture and development efforts, both independently and as a technical lead for small teams. Research emerging AI software topics to identify memory and storage system challenges and opportunities. Develop and modify Linux applications and libraries using C, C++, Python, Rust, CUDA, and/or SYCL for advanced heterogeneous computing systems. Develop and use emulators to predict system‑level performance and functional impacts in advance of hardware availability. Debug system-level issues spanning applications, libraries, o

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Compute Strategy & Pathfinding group focuses on compute architectures and algorithms that define future memory and compute capabilities 3–5 years ahead of product integration. The team works closely with internal engineering groups, external partners, and customers to architect, evaluate, simulate, and design advanced ASIC solutions that shape Micron’s long‑term technology roadmap. We are seeking a highly skilled ASIC Architect with strong experience in architecture definition, logic design, synthesis, and system‑level evaluation. The ideal candidate will assist with architectural definition from concept through implementation readiness, bridging high‑level system modeling with RTL development, physical design considerations, and product transition. Responsibilities Define and evolve ASIC and system architectures, including logic partitioning, module interfaces, and design tradeoffs across performance, power, area, and scalability. Write detailed block‑level and architectural specifications to guide RTL design, verification, and system simulation activities. Oversee logic design and synthesis activities, ensuring alignment with architectural intent and project requirements. Contribute to backend synthesis and physical design flows, evaluating the impacts of placement, routing, timing, and power on architectural decisions. Perform

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Sr Principal CAD & HPC Workflow Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate, and advance faster than ever. Position Overview Micron is seeking a Senior Principal CAD Engineer to help shape the engineering environment that powers Memory product development across DRAM, HBM, NAND, and custom memory programs. In this high-impact technical role, you will partner with Micron’s CAD Software and HPC teams to architect, modernize, and scale the platforms our worldwide design teams rely on every day, from CAD software infrastructure, project setup flows, and quality-gating solutions to engineering automation and compute workload scalability. You will also define how success is measured. By developing improvement and quality metrics for job management and workflow performance, you will establish customer-facing service levels that give design teams clear visibility into the performance of their environment and give engineering leaders a data-driven path to continuous improvement. Along the way, you will help bring next-generation AI and agentic software solutions into Design Automation, working closely with CAD, Design Engineering, HPC, and EDA vendors. Key Responsibilities Serve as a senior engineer partnering with the CAD Software and HPC team