Computer Systems Validation Analyst Jobs

About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons - all while shaping the future of connectivity. Role Summary As a Design Quality Assurance Engineer, you will work within the Hardware, Firmware, and Software Design team. This will be a hands-on position to support all design validation and reliability aspects of design, development, and transfer to manufacturing. You will drive system validation activities for new product development, verify design changes for existing products, resolve technical issues related to the manufacturing process, and perform failure analysis on field returned products. Responsibilities Passionate about user experience and deeply committed to delivering intuitive, high-quality UX. Develop and review the quality test plan for design validation and EVT/DVT/PVT builds. Execute tests according to test plans to generate test reports during EVT/DVT builds. Try to reproduce the customer’s issues and record the results for RD analysis Develop an automatic test bench for long-time stress testing. Develop and maintain test environments to make sure enough test coverage and speed up testing. Design test methodology and coverage to assure reliability Develop, maintain, and execute black-box and white-box test cases. Track the progress of issue resolution and verify the effectiveness of corrective actions Requirement BS in Engineering (Electrical Engineering, Industrial Engineering, Computer Science, Phys

About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons - all while shaping the future of connectivity. Role Summary As a Design Quality Assurance Engineer, you will work within the Hardware, Firmware, and Software Design team. This will be a hands-on position to support all design validation and reliability aspects of design, development, and transfer to manufacturing. You will drive system validation activities for new product development, verify design changes for existing products, resolve technical issues related to the manufacturing process, and perform failure analysis on field returned products. Responsibilities Passionate about user experience and deeply committed to delivering intuitive, high-quality UX. Develop and review the quality test plan for design validation and EVT/DVT/PVT builds. Execute tests according to test plans to generate test reports during EVT/DVT builds. Try to reproduce the customer’s issues and record the results for RD analysis Develop an automatic test bench for long-time stress testing. Develop and maintain test environments to ensure sufficient test coverage and speed up testing. Design test methodology and coverage to assure reliability Develop, maintain, and execute black-box and white-box test cases. Track the progress of issue resolution and verify the effectiveness of corrective actions Requirement BS in Engineering (Electrical Engineering, Industrial Engineering, Computer Science, Phy

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join Micron’s SSD Hardware Architecture organization, where we develop the technologies that power next-generation storage solutions. We work across architecture, silicon, firmware, and product engineering teams to deliver high-performance SSD controllers that meet demanding standards for quality, reliability, and innovation. As a Staff SSD Hardware PCIe Engineer, you will play a key role in bringing advanced SSD controller technologies to life. This position offers the opportunity to lead PCIe subsystem validation, debug complex system-level challenges, and influence future product capabilities while collaborating with highly skilled engineering teams across the organization. Responsibilities: Develop hardware and system specifications from architectural and product requirements Lead PCIe bring-up, characterization, debugging, validation, and compliance activities for SSD controller SoCs Partner with architecture, verification, firmware, product engineering, and external IP vendors to resolve issues and improve functionality Drive system-level validation methodologies, automation, and test development to improve coverage and efficiency Perform root-cause analysis and validate PCIe functionality across complex SSD use cases Minimum Qualifications: Bachelor’s degree in Electrical Engineering, Computer Engineering, Electronics Engineering, or a related field, or equivalent experien

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to senior leadership within Architecture and Validation, the Debug Validation Engineer will drive post-silicon debug and validation activities for next-generation AI compute silicon and systems. The role is responsible for leading teams focused on identifying, reproducing, analysing and resolving complex silicon, firmware and system-level issues during bring-up, characterization and product readiness. This position combines deep technical debugging expertise with strong cross-functional collaboration across multiple engineering disciplines. The role will work closely with architecture, RTL, firmware, software and systems teams to improve debug methodologies, accelerate issue resolution and strengthen validation coverage. The role will work closely with architecture, RTL, firmware, software, systems and platform teams to improve debug methodologies, accelerate issue resolution and strengthen validation coverage. The Team The Post-Silicon Debug and Validation team sits within the Architecture and Validation organisation and is responsible for bring-up, debug and validation of Graphcore silicon and systems.

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to senior leadership within Architecture and Validation, the Debug Validation Lead will drive post-silicon debug and validation activities for next-generation AI compute silicon and systems. The role is responsible for leading teams focused on identifying, reproducing, analysing and resolving complex silicon, firmware and system-level issues during bring-up, characterization and product readiness. This position combines deep technical debugging expertise with strong cross-functional collaboration across multiple engineering disciplines. The role will work closely with architecture, RTL, firmware, software and systems teams to improve debug methodologies, accelerate issue resolution and strengthen validation coverage. The role will work closely with architecture, RTL, firmware, software, systems and platform teams to improve debug methodologies, accelerate issue resolution and strengthen validation coverage. The Team The Post-Silicon Debug and Validation team sits within the Architecture and Validation organisation and is responsible for bring-up, debug and validation of Graphcore silicon and systems. The

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of a best-in-class family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from a diverse group of backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary We are seeking a senior validation lead engineer to lead at-scale rack validation efforts for next-generation AI hyperscale systems. This role focuses on post-silicon system validation across the full lifecycle, ensuring functional, electrical, and thermal performance meets product objectives. You will own end-to-end blade and rack validation including planning, development, execution, and debug while collaborating across firmware, systems, and hardware teams. The Team The Rack Validation team is responsible for ensuring system readiness and quality at scale. The team works cross-functionally with firmware, silicon, and system engineering teams to validate complex AI compute platforms. Responsibilities and Duties Lead post-silicon validation of AI compute blades and racks including test planning, development, and automation. Drive provisioning and integration of system components (SoC FW, BMC, RMC, OS) for rack-level readiness. Own execution against program achievements and report validation progress and risks. Triage test failures, collect debug data, and collaborate on root cause analysis. Track

About the job Own the reliability of AI compute hardware where lab discovery becomes data centre reality. Graphcore is building the hardware and systems infrastructure needed for the next generation of AI breakthroughs. This role helps prove those platforms work when complexity, scale and pressure increase. You will lead advanced operational, diagnostic and engineering support across lab and data centre environments. Your work will improve hardware bring-up, validation and troubleshooting for AI compute platforms. You will diagnose failures across server blades, racks, power systems, thermal behaviour, network configuration and BIOS/BMC issues. You will turn hard problems into clear root cause analysis, corrective action and better operating practice. This is hands-on engineering with visible impact. You will support new platforms from early bring-up through deployment, helping Graphcore move faster with confidence. The team and culture You will work with Systems Engineering, Hardware Engineering, server engineering, firmware, platform architects and data centre operations. Problems are solved close to the hardware, with clear evidence and direct ownership. The team moves quickly during bring-up and validation cycles. Engineers are expected to act fast, take responsibility and speak up when something needs attention. Decisions are shaped by data, system behaviour and practical engineering judgement. You will guide others, improve documentation and help raise the standard of hardware diagnostics. What we're looking for · Strong knowledge of server hardware architectures and board-level debugging · Experience isolating failures using system logs, telemetry, power data and thermal metrics · Hands-on experience with HPC systems, AI compute platforms or rack-scale infrastructure · Ability to lead structured root cause analysis and propose practical corrective actions · Confidence working across engineering, platform and data centre teams · Clear written and verbal

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Validation Engineer at Micron, you will be part of a forward-thinking team of engineers that participate in the development of state of the art storage solution. You will solve complex problems, be responsible for enabling Micron’s products with flawless and issue free release to customers. Responsibilities: Develop and execute validation test plan on SSD devices on PC systems Analyze and writes test standards and procedures. Maintain documentation of test results to assist in debugging and modification of software. Analyze test results to ensure existing functionality, recommends and implement test coverage improvement actions Perform Failure analysis and work with other function groups to resolve SSD system issues Provide system analysis support for customer or yield related issues. Improve customer integration experience. Requirements: Bachelor degree in Electrical/Computer Engineering with minimum 3 years of relevant experience Experience in working with motherboards and sever architecture, including setup and troubleshooting Experience in SSD validation or firmware coding Familiarity with PCIe and NVMe storage interface protocols, as w

About the job Validate the memory and system interfaces that keep advanced AI compute reliable under real product conditions. As a Validation and Debug Engineer, you will help prove Graphcore silicon and platforms work across the conditions our customers need. You will build deep understanding of our devices, boards and system behaviour. You will create and execute validation and debug plans for new hardware platforms. Your focus will include LPDDR5-9600, slow-speed interfaces, PCB issues, power behaviour and signal integrity. This is hands-on lab work with real ownership. You will investigate failures, tune memory subsystems and turn complex findings into clear actions across hardware and firmware. The team and culture You will work with Architecture, Silicon Engineering, Hardware Engineering, Firmware, PCB design, power and signal integrity teams. Progress comes through lab evidence, practical judgement and clear debug reports. The team moves quickly because the problems are real and often complex. You will own bring-up activity, drive root cause analysis and keep issues moving across teams. Decisions are made close to the data. You will be expected to speak up, challenge assumptions and help teams choose the right corrective action. What we’re looking for · Strong hands-on hardware debug experience, including board bring-up and subsystem debug · Experience validating and tuning LPDDR memory subsystems, ideally including LPDDR5 · Ability to debug PCB, power, signal integrity and interface issues through to root cause · Knowledge of DDR training, timing optimisation, margin analysis, eye diagrams and stability validation · Confident use of lab instrumentation, including high-bandwidth oscilloscopes, BERT systems and VNA/TDR equipment · Ability to work independently, take responsibility and drive issue resolution across hardware and firmware teams While we have outlined a set of requirements, we value transferable skills and diverse experiences. If you meet most of

About Graphcore Graphcore is a global leader in artificial intelligence computing systems. We design advanced semiconductors and data center hardware that provide the specialized processing power needed to advance AI while improving the efficiency required for broad adoption. As part of SoftBank Group, Graphcore belongs to a family of companies developing transformative technologies. Our AI Engineering Campus in Austin plays an important role in building the hardware platforms that support the next generation of AI systems. The Opportunity We are looking for a recent graduate or early-career engineer to join the Hardware Platform Development team as a Graduate Systems Engineer. You will contribute to the design, integration, validation, and performance analysis of advanced AI compute platforms. You will work with experienced hardware, firmware, software, mechanical, thermal, and systems engineers throughout the development lifecycle. The role combines subsystem engineering, hands-on laboratory work, test automation, data analysis, troubleshooting, and clear technical documentation. Start: September, 2027 Location: Austin, Texas, USA What You Will Do Contribute to the design, integration, and testing of CPU and high-speed input and output subsystems for advanced compute platforms. Take ownership of defined engineering tasks from requirements and test planning through execution, analysis, and technical review. Develop system-level validation plans, procedures, scripts, and tools that improve test coverage, repeatability, data collection, and analysis. Evaluate platform performance, power, signal behavior, reliability, and interoperability using laboratory measurements and system data. Investigate emerging input and output technologies, including PCIe 6.0 and 800G Ethernet, and assess their use in advanced computing systems. Support platform power, cooling, and energy-efficiency investigations, including liquid-cooling systems for high-performance processor

Job Summary Reporting to the Memory Validation leadership team, the Senior Silicon DDR/HBM Validation Engineer will be responsible for the bring-up, validation, characterization and debug of advanced memory subsystems used in next-generation AI compute platforms. The role will focus on DDR and HBM technologies, working closely with silicon design, firmware, characterization, platform and systems teams to ensure robust memory subsystem functionality, performance and reliability. The successful candidate will take ownership of significant validation activities, contribute to debug and root-cause analysis efforts, and help improve validation methodologies, automation and infrastructure. The Team The Memory Validation team sits within the Validation organisation and is responsible for the bring-up, validation, characterization and debug of memory subsystems across Graphcore silicon and platform products. The team supports DDR and HBM validation activities throughout the product lifecycle, from first silicon through production readiness. Engineers work closely with architecture, RTL, firmware, characterization, systems and platform teams to ensure memory technologies meet functionality, performance, reliability and performance objectives. Responsibilities and Duties Execute validation and bring-up activities for DDR and HBM memory subsystems Verify memory bring-up software, firmware and scripts against defined project requirements Debug firmware, hardware and system-level issues and contribute to root-cause analysis activities Analyse system logs, validation data and characterization results to identify failures and performance issues Perform PHY characterization and analog-level analysis during stress testing and validation activities Develop and execute functional, stress, performance and corner-case validation tests Perform signal integrity, voltage, frequency and timing measurements using laboratory instrumentation Char

About Graphcore Graphcore is a global leader in artificial intelligence computing systems. We design advanced semiconductors and data center hardware that deliver the specialized processing power needed to advance AI while improving the efficiency required for broad adoption. As part of SoftBank Group, Graphcore belongs to a family of companies developing some of the world’s most transformative technologies. Our new AI Engineering Campus in Austin will play a central role in building the future of AI computing. The Opportunity We are seeking a system validation engineering intern to help drive server blade and rack validation efforts for next-generation AI infrastructure hardware systems. This role focuses on post-silicon system validation across the full lifecycle of server hardware systems, ensuring functional and performance meets product objectives. You will help drive end-to-end blade and rack validation including development, execution, and debug while collaborating across silicon, firmware, systems, and platform teams. The Blade and Rack Validation team is responsible for ensuring system readiness and quality at scale. The team works cross-functionally with firmware, silicon, and system engineering teams to validate complex AI compute platforms. Type: 12-week summer internship Timing: May - August (exact dates to be confirmed) Commitment: Full-time What You’ll Do Help drive and execute post-silicon validation goals of AI compute blades and racks including testcase planning, development, and automation Help drive validation testcase execution and system debug against program achievements and report validation progress and risks. Drive provisioning and integration of system components (SoC FW, BMC, RMC, OS) for rack-level readiness Triage test failures, collect debug data, and collaborate on root cause analysis. Track validation coverage and continuously improve test processes and infrastructure. What You’ll Bring Working towards a Bachelor's

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Join Tenstorrent and help bring next-generation AI accelerator technology from silicon bring-up to production. You’ll work at the forefront of hardware innovation, diagnosing complex issues across chips, systems, firmware, and software while collaborating with some of the brightest engineers in the industry. This role offers the opportunity to solve challenging technical problems, build impactful debug solutions, and directly influence the reliability and performance of cutting-edge AI compute platforms. This role is hybrid, based out of Toronto, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A hands-on hardware debug engineer who thrives on solving complex, cross-functional problems at the intersection of silicon, firmware, and software. A curious and analytical problem solver who enjoys digging into failures, identifying root causes, and driving issues from initial discovery through resolution. An engineer with strong post-silicon validation and bring-up experience who is comfortable working in the lab and getting deep into system-level behavior. Someone who enjoys building tools, improving debug methodologies, and creating

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is building next-generation CPU and AI silicon. You’ll work at the forefront of hardware innovation, diagnosing complex issues across chips, systems, firmware, and software while collaborating with some of the brightest engineers in the industry. This role offers the opportunity to solve challenging technical problems, build impactful debug solutions, and directly influence the reliability and performance of cutting-edge AI compute platforms. This role is hybrid, based out of Toronto, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced in hardware debug and post-silicon bring-up for CPU, SoC, or ASIC systems. Strong understanding of processor architecture and microarchitecture (RISC-V, x86, or ARM) with familiarity in debug and trace methodologies (e.g., iJTAG). Hands-on engineer who excels at diagnosing complex hardware, firmware, and software issues through root-cause analysis. Comfortable working in the lab with a passion for building debug tools, automation, and scalable methodologies. Collaborative team player with experience partnering across ASIC, firmware, software, and validation teams. What We Need

About Anthropic Anthropic’s mission is to create reliable, interpretable, and steerable AI systems. We want AI to be safe and beneficial for our users and for society as a whole. Our team is a quickly growing group of committed researchers, engineers, policy experts, and business leaders working together to build beneficial AI systems. About the role As a Repairs Lead within the Data Center Infrastructure organization, you will define and manage the end-to-end hardware repair program across Anthropic's growing fleet of data centers. You will be accountable for repair turnaround time and the compute returned to service across every site, covering server, GPU/accelerator, network, and optics break-fix, RMA and reverse logistics with OEMs and ODMs, and the spares and repair inventory that keeps repair SLAs achievable. As a subject matter expert in hardware operations, you will develop scalable repair processes and quality targets, set the standards that site operations partners and repair vendors execute against, and turn failure trends into fixes which are driven upstream with engineering and equipment partners. If you are experienced in at-scale datacenter hardware operations, are passionate about HPC data centers, & enjoy working in complex, fast-paced environments, we welcome you to apply. Responsibilities Include: Define the global repair strategy including repair SLAs, prioritization rules, escalation paths, and reporting methods, and drive standardization across all sites. Own repair turnaround time and repair backlog across the fleet evidenced by Anthropic-owned ticket and telemetry dashboards you help develop. Author and improve procedures for triage, break-fix, return-to-service validation, and train site operations partners on how to execute them. Manage RMA and reverse logistics programs with OEMs, ODMs, and depot repair vendors, including warranty claims, return cycle times, and failure analysis feedback. Set spares pool sizing and stocking levels by s