Computer Systems Validation Analyst Jobs

JOB TITLE Software Engineer, Controller’s Technology A CAREER WITH POINT72’S TECHNOLOGY TEAM As Point72 reimagines the future of investing, our Technology group is constantly improving our company’s IT infrastructure, positioning us at the forefront of a rapidly evolving technology landscape. We’re a team of experts experimenting, discovering new ways to harness the power of open source solutions, and embracing enterprise agile methodology. We encourage professional development to ensure you bring innovative ideas to our products while satisfying your own intellectual curiosity. WHAT YOU’LL DO As a software engineer on the Controller’s Technology team, you will use your programming expertise to design, develop, and support ETL, data warehouse, process flow, PnL validation and adjustment tools, and PnL reporting framework to modernize the PnL reporting platform and streamline the business process. Build analytical tools on a next generation technology platform to facilitate understanding of performance for Firm management and portfolio managers as well the reporting requirements of our Finance, Operations, Audit, and Technology functions. Develop quantitative understanding of PnL process and data flow to anticipate new requirements Innovate and improve our capabilities to deliver high quality products to our business partners Solving complex and challenging problems through the application of creative and unique solutions using the latest technology WHAT’S REQUIRED Strong data engineering, analytics, ETL and reconciliation skills using T-SQL, Python, Airflow etc. Bachelor’s in computer science, or related technical field with 5 years of programming experience End-to-end system design, development, support, and user coordination experience Strong development skills using Python, or C#. Strong data visualization skills using JS/React etc. A plus to have prior experience in financial industry working with Risk, valuation

About the job Own the reliability of AI compute hardware where lab discovery becomes data centre reality. Graphcore is building the hardware and systems infrastructure needed for the next generation of AI breakthroughs. This role helps prove those platforms work when complexity, scale and pressure increase. You will lead advanced operational, diagnostic and engineering support across lab and data centre environments. Your work will improve hardware bring-up, validation and troubleshooting for AI compute platforms. You will diagnose failures across server blades, racks, power systems, thermal behaviour, network configuration and BIOS/BMC issues. You will turn hard problems into clear root cause analysis, corrective action and better operating practice. This is hands-on engineering with visible impact. You will support new platforms from early bring-up through deployment, helping Graphcore move faster with confidence. The team and culture You will work with Systems Engineering, Hardware Engineering, server engineering, firmware, platform architects and data centre operations. Problems are solved close to the hardware, with clear evidence and direct ownership. The team moves quickly during bring-up and validation cycles. Engineers are expected to act fast, take responsibility and speak up when something needs attention. Decisions are shaped by data, system behaviour and practical engineering judgement. You will guide others, improve documentation and help raise the standard of hardware diagnostics. What we're looking for · Strong knowledge of server hardware architectures and board-level debugging · Experience isolating failures using system logs, telemetry, power data and thermal metrics · Hands-on experience with HPC systems, AI compute platforms or rack-scale infrastructure · Ability to lead structured root cause analysis and propose practical corrective actions · Confidence working across engineering, platform and data centre teams · Clear written and verbal

About Graphcore Graphcore is a global leader in artificial intelligence computing systems. We design advanced semiconductors and data center hardware that provide the specialized processing power needed to advance AI while improving the efficiency required for broad adoption. As part of SoftBank Group, Graphcore belongs to a family of companies developing transformative technologies. Our AI Engineering Campus in Austin plays an important role in building the hardware platforms that support the next generation of AI systems. The Opportunity As a Systems Engineering Intern, you will contribute to projects that combine hardware, firmware, and software engineering for advanced AI compute platforms. You will work with experienced engineers on subsystem design, laboratory testing, system validation, automation, and performance analysis. The internship provides hands-on experience with modern hardware development and system-level engineering. You will own clearly defined technical tasks with guidance from the team and document your methods, results, and conclusions. What You Will Do Support the design and testing of CPU and high-speed input and output subsystems for advanced compute platforms. Run laboratory tests and measurements to help evaluate performance, power, signal behavior, and reliability. Contribute to system-level validation by creating scripts and tools that streamline testing, data collection, and analysis. Explore emerging input and output technologies, including PCIe 6.0 and 800G Ethernet, and learn how they support advanced computing workloads. Assist with investigations into platform power, cooling, and energy efficiency, including liquid-cooling systems for high-performance processors. Use power meters, oscilloscopes, logic analyzers, or comparable lab equipment under appropriate supervision. Analyze test results, identify unexpected behavior, and work with engineers to reproduce and investigate issues. Collaborate across hardware, firmware, software, m

The DFP Engineer – Manufacturing role defines and implements the validation and screening of new silicon features within high‑volume manufacturing flows. You will translate product requirements into executable test methodologies, infrastructure, and detailed manufacturing test plans that ensure quality, yield, and efficiency at scale. This role sits at the intersection of multiple multi-functional teams to make manufacturing test an outstanding part of the overall codesign and DFP lifecycle. What you will be doing: Own end-to-end manufacturing test methodology across all test stages. Translate system specs and product POR into DFP requirements, test content, coverage, and flows. Define and maintain the DFP roadmap, including infrastructure and turning point planning. Partner multi-functionally to implement test content, debug hooks, and coverage improvements. Drive alignment on manufacturability, test time, binning strategies, and cost vs. coverage trade-offs. Embed testability requirements into design to enable robust screening and debug. Define data and analytics frameworks to support yield analysis and continuous improvement. Lead DFP documentation as the single source of truth and feed findings into future methodologies. What we need to see: MS in Electrical Engineering, Computer Engineering, or related field (or equivalent experience) 6&#43; years in silicon post‑silicon validation and/or high‑volume manufacturing test for complex SoCs, GPUs, CPUs, or similar. Hands‑on experience with test content bring‑up, limit setting, correlation to characterization, and yield/coverage optimization. Proficiency with scripting and data analysis (e.g., Python, MATLAB, R, SQL) for test data analytics, limit tuning, and yield/debug analysis. <

About the Team Industrial Compute is building the world's most advanced AI infrastructure. Working alongside our capital partners, engineering teams, and construction organizations, we design and deliver large-scale, mission-critical compute campuses that power the next generation of AI. Our Design organization brings together engineering, construction, and digital design to ensure facilities are coordinated, constructible, and optimized from the earliest planning phases through deployment. About the Role We are seeking a BIM Designer & Coordinator to support the planning and design of large-scale industrial and mission-critical facilities. In this role, you will develop, coordinate, and maintain multidisciplinary BIM models across Civil, Electrical, Mechanical, Architectural, and Structural disciplines, enabling early design validation, constructability reviews, equipment planning, and cross-functional coordination. You will partner closely with internal engineering teams, external design consultants, contractors, and project stakeholders to produce coordinated BIM deliverables that improve design quality, reduce project risk, and support efficient execution across Industrial Compute's global infrastructure portfolio. Key Responsibilities: Develop and maintain conceptual and schematic BIM models for large-scale industrial and MEP-intensive facilities. Coordinate BIM models across Civil, Electrical, Mechanical, Architectural, and Structural disciplines. Create and maintain federated models used for design reviews, spatial coordination, constructability analysis, and clash detection. Model major building systems including equipment layouts, utility corridors, electrical rooms, mechanical rooms, structural framing, site infrastructure, and architectural constraints. Coordinate equipment clearances, maintenance access, routing zones, shafts, risers, utility entrances, and major MEP pathways. Translate engineering sketches, basis-of-design documents, equipment lists

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Lead DFT Engineer Job Description: Developing silicon for edge-to-cloud computing isn't just about speed; it’s about balancing high-performance data processing with extreme power efficiency and reliability in remote environments. As the Design for Test (DFT) Lead, you will be the architect of our testing strategy, ensuring our data center chips are flawlessly manufacturable and resilient enough for edge deployment. Key Responsibilities: Architectural Leadership: Define and implement the end-to-end DFT architecture for complex SoCs, including Hierarchical DFT, Scan compression, Boundary Scan and MBIST. Edge-Specific Reliability: Develop strategies for In-System Test (IST) and power-on self-test (POST) to ensure chip health in remote edge data centers. Implementation & Flow: Oversee scan insertion, ATPG (Stuck-at, Transition, Path Delay), and Memory /Logic BIST. Cross-Functional Synergy: Collaborate with Design, Physical Design, and Yield teams to ensure high test coverage while minimizing area overhead and power impact as well as timing analysis . Post-Silicon Validation: Lead the bring-up and debug phase on ATE (Automated Test Equipment) to root-cause silicon failures and optimize test time. Technical Requirements: Experience: 12+ years in DFT, with at least 2 years in a leadership or principal role. Bachelor’s degree in a related field. Tools:

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Senior Emulation Engineer Location: India - Remote Job Description: At EnCharge AI, we are building the next generation of AI compute silicon — purpose-built for high-performance, low-power, and scalable AI inference. As an Emulation Engineer, you will play a critical role in validating complex AI accelerator architectures on emulation platforms before tape-out. This position is ideal for someone passionate about bridging the gap between hardware and software in fast-paced, deep tech environments. Responsibilities: • Set up and maintain Siemens Veloce emulation and prototyping platforms • Adapt SoC designs for Emulation and Prototyping • Develop and debug emulation testbenches and system-level environments • Support pre-silicon validation, power/performance analysis, and early software bring-up. Participate in silicon bring-up and validation. • Collaborate with design and verification teams to isolate design issues and accelerate debug. • Optimize performance of the emulation workloads and reduce turnaround time. • Work with firmware/software teams to enable use of emulators for OS and driver testing. Required Background: • BS/MS/Ph.D. in EE, CS, or related field with 7+ years of SoC design experience. • Experience with emulation platforms (Veloce, Palladium, or ZeBu) and FPGA-based prototyping systems (proFPGA, HAPS, or Protium) • Experience with emula

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Job Description : Lead DFT Engineer (Edge Computing) Developing silicon for Edge Computing isn't just about speed; it’s about balancing high-performance data processing with extreme power efficiency and reliability in remote environments. As the Design for Test (DFT) Lead, you will be the architect of our testing strategy, ensuring our data center chips are flawlessly manufacturable and resilient enough for edge deployment. Key Responsibilities Architectural Leadership: Define and implement the end-to-end DFT architecture for complex SoCs, including Hierarchical DFT, Scan compression, Boundary Scan and MBIST. Edge-Specific Reliability: Develop strategies for In-System Test (IST) and power-on self-test (POST) to ensure chip health in remote edge data centers. Implementation & Flow: Oversee scan insertion, ATPG (Stuck-at, Transition, Path Delay), and Memory /Logic BIST. Cross-Functional Synergy: Collaborate with Design, Physical Design, and Yield teams to ensure high test coverage while minimizing area overhead and power impact as well as timing analysis . Post-Silicon Validation: Lead the bring-up and debug phase on ATE (Automated Test Equipment) to root-cause silicon failures and optimize test time. Technical Requirements Experience: 12+ years in DFT, with at least 2 years in a leadership or principal role. Tools: Mastery of industry-standard

This is an exciting opportunity to lead a Software Engineering & DevOps team at Natera, a global leader in precision medicine and genomics testing. As a Senior Manager of the Software Engineering & DevOps team inside our Data Science Production Engineering (DSPE) department, you will have the opportunity to build with Natera's diverse and ultra-large data sets (up to PB size), create software and automation solutions for the most cutting-edge medical diagnostics and genomics applications, and make real impact by delivering reliable, efficient, high performance software products and data/cloud/automation systems to support Natera's Lab Operations and Genetic Counselor/Lab Director teams, and ultimately impact patients' medical outcomes. PRIMARY RESPONSIBILITIES: Leadership Lead a DevOps team, working closely with other DSPE teams, to develop, test, deploy, maintain, and update DSPE's data platforms, cloud platforms, automation systems, and analytics systems Manage the DevOps team, to achieve the timely and efficient delivery of software products and systems with correct and robust functionality. Train and coach team members on new technologies, procedures, and guidelines/best practices. Create and maintain operational visibility (e.g., workload, productivity, etc.) of the DSPE DevOps team. Technical Translate DSPE's business needs and project requirements into technical specifications and implementation plans. Working with DSPE leadership teams, create suitable system architecture and infrastructure design documents that can be efficiently implemented and maintained. Maintain and optimize infrastructure performance, monitoring key system metrics including network I/O, disk I/O, memory allocation, and compute resource utilization. Contribute to key development, testing, deployment, validation, maintenance, and update activities. Quality, Compliance, and Documentation Improve and enforce procedures for work efficiency, quality, and compliance. Lead

This is an exciting opportunity to lead a Software Engineering & DevOps team at Natera, a global leader in precision medicine and genomics testing. As a Senior Manager of the Software Engineering & DevOps team inside our Data Science Production Engineering (DSPE) department, you will have the opportunity to build with Natera's diverse and ultra-large data sets (up to PB size), create software and automation solutions for the most cutting-edge medical diagnostics and genomics applications, and make real impact by delivering reliable, efficient, high performance software products and data/cloud/automation systems to support Natera's Lab Operations and Genetic Counselor/Lab Director teams, and ultimately impact patients' medical outcomes. PRIMARY RESPONSIBILITIES: Leadership Lead a DevOps team, working closely with other DSPE teams, to develop, test, deploy, maintain, and update DSPE's data platforms, cloud platforms, automation systems, and analytics systems Manage the DevOps team, to achieve the timely and efficient delivery of software products and systems with correct and robust functionality. Train and coach team members on new technologies, procedures, and guidelines/best practices. Create and maintain operational visibility (e.g., workload, productivity, etc.) of the DSPE DevOps team. Technical Translate DSPE's business needs and project requirements into technical specifications and implementation plans. Working with DSPE leadership teams, create suitable system architecture and infrastructure design documents that can be efficiently implemented and maintained. Maintain and optimize infrastructure performance, monitoring key system metrics including network I/O, disk I/O, memory allocation, and compute resource utilization. Contribute to key development, testing, deployment, validation, maintenance, and update activities. Quality, Compliance, and Documentation Improve and enforce procedures for work efficiency, quality, and compliance. Lead

Job Title Physicist Job Description We are looking for a Physicist to join our Computed Tomography (CT) R&D team in Haifa, part of the DMS organization. In this role, you will contribute to the research, development, optimization, and validation of next‑generation detector technologies that power advanced CT systems. This position offers the opportunity to work at the intersection of physics, engineering, and medical imaging driving innovation that directly impacts product performance and patient outcomes. Your role: Be actively involved in the development and evaluation of CT detector concepts and components. Model and characterize key detector performance parameters, including spatial resolution, noise, dynamic range, spectral response, stability, and dose efficiency. Collaborate with system image quality teams in shaping and designing image correction algorithms. Design and execute experiments to assess detector behavior under laboratory and system-level operating conditions. Analyze imaging data and detector signals using quantitative methods to identify performance limitations and improvement opportunities. Collaborate with hardware, electronics, software, reconstruction, systems, and manufacturing teams to translate physics requirements into technical specifications. Support prototype integration, verification testing, root-cause analysis, and performance troubleshooting. Support Service and Production detection related investigations. Develop test methods, technical reports, verification protocols, and documentation for internal and regulatory use. Stay current with scientific literature, emerging detector technologies, and industry trends. You're the right fit if: MSC or PhD in Physics, with a strong advantage for experimental Physics. Hands on experimen

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE Everpure is seeking a Hardware Engineering Manager to lead a team developing and supporting high-performance storage systems. This role oversees the full hardware lifecycle, from design through production and customer support. The ideal candidate is a strong technical and people leader who can set direction, deliver results, and collaborate across the organization. WHAT YOU'LL DO Lead, mentor, and develop a team of hardware engineers. Set technical direction and execution plans for complex compute, storage, networking, and I/O systems. Own team delivery across architecture, schematic capture, PCB layout, eDVT, qualification, failure analysis, and production release. Harden and evolve hardware validation and qualification strategies, including automated testing, system stress testing, and coverage reviews. Drive root-cause and failure-analysis efforts for internal issues and customer escalations, ensuring corrective actions improve product robustness. Partner with Manufacturing, Operations, Test, Quality, and JDM/OEM partners to transition new hardware subsystems into production. Build scalable engineering processes, automation, documentation standards, and “Quality by Design” practices. Hire and retain top hardware engineering talent while creating a culture of accountability, collaboration, technical excellence, and continuous improvement. Communicate program status, ris

We are now looking for a Senior ASIC Design Engineer. NVIDIA is seeking ASIC Design Engineers to implement the world’s leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing! What you'll be doing: As a key member of the GPU Design team, you will implement, document and deliver high performance, area and power efficient RTL to achieve design targets and specifications. Analyze architectural trade-offs based on features, performance requirements and system limitations. Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design. Collaborate and coordinate with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams to accomplish your tasks. Work on a broad list of IPs such as GPU's work scheduler, time distribution system, interrupt controllers, and DMA engines. Architect features to help silicon debug and support post-silicon validation activities. What we need to see: Bachelors Degree or equivalent experience in Electrical Engineering, Computer Engineering or Computer Science. 8&#43; years of meaningful work experience. Experience in micro-architecture and RTL development (Verilog), focused on arbiters, scheduling, synchronization & bus protocols, interconnect networks and/or caches. Great understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis. Exposure to Digita

NVIDIA is seeking a QA Engineer to join our Cloud Testing team. As part of the broader QA organization, you’ll focus on testing the software layer that enables NVIDIA’s products to achieve industry-leading benchmarks in performance and quality. This role involves hands-on testing of cutting-edge cloud and networking features, learning new technologies, and contributing to both manual and automated validation efforts. What You’ll Be Doing: Design, develop, and execute test plans for new features across software and update releases Identify and report bugs, assist in reproducing issues, and collaborate with R&D to isolate root causes and validate fixes Perform a variety of tests including functional, regression, performance, and security testing Analyze network flows and debug issues through log and system analysis Develop automation scripts and contribute to building scalable test infrastructures What We Need to See: Practical Engineer / BA / BSc in Computer Science or a related field 1–3 years of relevant work experience Proficiency in scripting and automation languages such as Python, PyTest, or Bash Strong hands-on experience with Linux systems Ability to work independently, take ownership, and execute tasks effectively Willingness and availability to work with physical lab setups Strong verbal and written communication skills in English Ways to Stand Out from the Crowd: Experience with containerized environments (Docker, Kubernetes) Familiarity with DevOps practices and CI/CD pipelines using Jenkins or GitLab Understanding and experience with Agile and Scrum methodologies A collaborative team player with a proactive and leadership-oriented minds

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary We are seeking an experienced Principal Hardware Diagnostics Engineer to design and develop diagnostics software used to monitor hardware health and diagnose system-level issues across Graphcore’s AI infrastructure platforms. This role focuses on building diagnostics agents, tools, and analytics frameworks that enable engineers and automation systems to identify, isolate, and resolve hardware issues across blade-level servers and rack-scale clusters. The Team Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. The Systems Engineering and Platform Validation team ensures Graphcore’s AI compute platforms are reliable, diagnosable, and operationally robust at scale. The team co