Data Center Rack Integration Manager Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The HBM Platform Architecture team defines the electrical, thermal, and power-delivery architectures that enable Micron's next-generation High Bandwidth Memory (HBM) solutions. Working closely with architecture, design, packaging, and technology teams, the organization drives innovation in signaling, power integrity, thermal management, and system optimization to support AI, high-performance computing, and data center applications. As an HBM Platform Architecture Intern, you will contribute to the development of future HBM platforms by evaluating electrical, thermal, and power delivery architectures for advanced memory systems. You will work alongside experienced architects to analyze design trade-offs, develop modeling tools, and investigate solutions that improve performance, power efficiency, reliability, and scalability for next-generation memory products. Responsibilities Perform signaling and timing analysis for on-die and off-die interfaces across multiple system and packaging topologies. Develop and evaluate thermal models to analyze heat transfer, thermal performance, and design trade-offs in advanced memory systems. Analyze power delivery networks (PDNs), including IR-drop, electromigration (EM), power integrity, and power grid optimization for advanced HBM architectures. Develop modeling, simulation, and automation tools to support power delivery, thermal analysis, and architecture evaluation activities. Collaborate with architecture, design, packaging, and technology teams to

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Memory Systems Architecture team defines the next generation of High Bandwidth Memory (HBM) solutions that power artificial intelligence, high-performance computing, and data center applications. The team drives architectural innovation across memory systems, controllers, interfaces, and reliability features to deliver industry-leading performance, scalability, and efficiency for future computing platforms. As a Memory Systems Architecture Intern, you will contribute to the architecture and microarchitecture development of future HBM products. You will work alongside experienced architects to evaluate new memory features, analyze architectural trade-offs, develop performance models, and explore solutions that improve memory performance, reliability, and efficiency for AI and high-performance computing workloads. Responsibilities Research and evaluate next-generation HBM architecture and microarchitecture features, including memory scheduling, refresh management, reliability features, thermal behavior, and memory controller interactions. Develop and enhance performance models, simulators, and analytical tools using Python, C++, or similar technologies to assess architectural trade-offs and system performance. Analyze workload behavior, simulation results, and architectural data to provide recommendations for future HBM product development. Utilize AI-assisted engineering tools and workflows to accelerate software development, specification analysis, data exploration, and technical documentat

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we are transforming how the world uses information to enrich life. The High Bandwidth Memory (HBM) Design team develops industry-leading memory solutions that power Artificial Intelligence (AI), high-performance computing, graphics, and data center applications. Our team collaborates across Design, Verification, Physical Design, Product Engineering, and CAD organizations to deliver next-generation memory technologies. As an HBM Design Engineer Intern, you will work alongside experienced engineers on the design, development, and validation of advanced HBM products. This internship provides hands-on experience with semiconductor design methodologies, industry-standard EDA tools, and AI-assisted engineering workflows while contributing to real-world memory design projects in a collaborative global environment. Responsibilities Assist with HBM memory and logic design activities, including RTL development, circuit implementation, simulation, verification, and functional analysis. Develop and use scripting, automation, and AI-assisted workflows to improve design productivity, debug efficiency, and design-flow quality. Perform timing, power, and functional analysis of HBM subsystems and support design reviews, technical investigations, and root-cause analysis using AI-enabled engineering techniques where appropriate. Collaborate with Design Verification, Physical Design, CAD, and Product Engineering teams to support project execution and product development. Document technical work

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The DRAM Systems & Architecture Lab researches and develops next-generation memory architectures that enable future AI, cloud, data center, and high-performance computing platforms. By combining advanced modeling, simulation, AI-enabled workflows, and architectural innovation, the team evaluates emerging memory technologies and defines solutions that improve performance, scalability, and efficiency for future memory systems. As a DRAM Architecture Research Intern, you will develop software frameworks, automation tools, and AI-assisted workflows that accelerate memory architecture research and analysis. You will work closely with architects and researchers to evaluate next-generation memory technologies, build simulation environments, perform performance analysis, and apply advanced AI capabilities to automate architectural studies and design-space exploration. Responsibilities Develop and enhance software frameworks, simulation environments, and automation tools that support DRAM architecture research and evaluation. Design and implement AI-assisted workflows for simulation generation, experiment automation, data analysis, technical documentation, and engineering productivity. Analyze memory architectures, including DRAM, LPDDR, DDR6, MRDIMM, CAMM, and emerging memory technologies, using modeling and simulation techniques. Perform performance, power, bandwidth, latency, and workload characterization studies to identify architectural trade-offs and optimization opportunities. Coll

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. In this role, your primary focus will be on Linux technologies as well as VMware/Nutanix and UCS/Dell hardware Platforms. This role helps define and implement Linux Server technologies and methodologies, which will have a heavy emphasis on automation and a hybrid cloud environment with AI Code Assist, while maintaining operational excellence in multiple world class Data Center environments.​ Responsibilities and Tasks: Provide day to day technology directions and operations within Infrastructure of Cisco/Dell Server, Linux and VMware platform IT Incident and Request handling and management within service level agreement Maintain IT operations by monitoring of system performance metrics and proactive actions Site expansion and global project execution Propose system or architectural design to improve performance, high availability, scalability and disaster recovery by innovative technologies and roadmap management oncall operational support and escalation Recommended qualifications include (but are not limited to): Recommend English ability of TOEIC higher than 550 grades Major in Computer Science, Information Engineering, Information Management, or related fields Familiarity in programming skills such as Linux shell or Python, produce code with AI assisted Experiences and skills in data analysis tool such as Splunk Experiences and skills in system infrastructure architecture is a plus e.g. VMWare/Nutanix

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Summary The SSD Validation (Test Development) Engineer is responsible for designing, developing, and maintaining performance and power validation test cases for Micron data center SSD products. The role focuses on translating product, customer, and industry requirements into scalable test methodologies, automated test cases, and validation frameworks to ensure comprehensive performance coverage and high product quality. Working closely with Performance Validation Leads, Firmware, System Architecture, Infrastructure, and Customer Performance teams, the engineer develops the validation strategies, test plans, and best practices while ensuring timely test enablement aligned with program milestones. The engineer is also expected to leverage modern software development practices, automation, and AI-assisted tools to improve engineering productivity, test effectiveness, and continuous improvement across the validation ecosystem. Key Responsibilities Test Development & Automation Design, develop, maintain, and optimize performance and power validation test cases for data center SSDs. Work closely with Performance Validation Leads to understand program-specific validation requirements and priorities. R

About Anthropic Anthropic’s mission is to create reliable, interpretable, and steerable AI systems. We want AI to be safe and beneficial for our users and for society as a whole. Our team is a quickly growing group of committed researchers, engineers, policy experts, and business leaders working together to build beneficial AI systems. About the role Data Center Security Engineering (DCSE) secures Anthropic's data center footprint; this role covers how the sites are designed and built to be secure. Much of that footprint is designed and built with partners, so a site's security is decided early: in what Anthropic hands the people who build it, and in how rigorously the delivered systems are tested against it. You'll design and specify the physical security systems for a site: perimeter and vehicle barriers, intrusion detection, video, security lighting, and the site penetrations and utility entry points that bypass them. Design firms and integrators produce the site drawings and install; you specify, review, and verify. You'll write the performance requirement and verification method behind each control, review every site design against them at each stage with redlines a design team can act on, test in the field that what was built performs as specified, and re-verify post-acceptance changes. This is a foundational role. You'll own Anthropic's physical security reference design package (typical details, reference drawings, schedules, and test procedures) in the form partners build from, and keep it current against each site's threat basis and the sites actually being built. You'll set the technical position for a site and decide what applies where; where a requirement can't be met as written, you'll engineer the compensating control and document the deviation. You'll work with the rest of DCSE, with Anthropic's design, construction, and real estate counterparts, and directly with the vendors who build to the package. We use Claude throughout our engineering workflow

Hyliion is committed to creating innovative solutions that enable clean, flexible and affordable electricity production. The Company’s primary focus is to develop distributed power generators that can operate on various fuel sources to future-proof against an ever-changing energy economy. Job Purpose The Field Service Engineer will supervise the onsite installation of the KARNO™ Power Module at customer sites, and lead the commissioning, maintenance, troubleshooting, and on-site customer support for the successful deployment of the KARNO Power Modules. This position is part of Hyliion's field service organization, which supports KARNO installations across the United States. Current deployments are primarily in defense and data center applications. The position begins with a training period of approximately three to four months in Milford, OH, working alongside the research, development, and engineering teams as KARNO units are built and serviced during final testing, including training on heat engine fundamentals, PLCs, HMIs, and advanced control systems. The position then transitions to field installation, commissioning, and long-term on-site support at customer locations, initially across the West Coast and expanding to other regions as the installed base grows. AI at Hyliion At Hyliion, AI is core to how we work. We equip every team member with leading AI tools and count on you to use them — to move faster, solve harder problems, and help us realize the full potential of KARNO technology for the world. Duties and Responsibilities Provide on-site maintenance, troubleshooting, and break-fix support for deployed KARNO units, with remote support from the engineering team. Diagnose issues using remote monitoring systems and troubleshooting logs. Troubleshoot controls, instrumentation, and high-voltage electrical system issues. Supervise installation work at customer sites and provide the required technical support. Serve a

About Anthropic Anthropic’s mission is to create reliable, interpretable, and steerable AI systems. We want AI to be safe and beneficial for our users and for society as a whole. Our team is a quickly growing group of committed researchers, engineers, policy experts, and business leaders working together to build beneficial AI systems. About the role Data Center Security Engineering (DCSE) owns physical security across Anthropic's data center footprint: the sites, the hardware inside them, and the supply chain that delivers it. The Security Fusion Platform is where physical security signals from across that footprint are correlated and put in front of the analysts who act on them. It carries continuous monitoring, audit evidence, metrics, and analyst response, along with the classification and analytics pipelines that turn sensor data into events. You'll build and own the platform analysts work from. This is a foundational role. You'll build the software platform that carries a signal from source to analyst decision, ship its first versions, and keep them running in production. The sensors and systems at each site belong to other DCSE engineers; you define the event contract their owners deliver to, and you build the classification and analytics pipelines that run over what those sources produce. Physical security systems engineers own the operations spaces; you own the software that runs in them. You'll work alongside engineers focused on the sites themselves. What you lead, you own end to end: the design, the technical approach, and the result in production. You'll work with external vendors and integrators, setting requirements and acceptance criteria for what you own and deciding what the team builds itself. We use Claude throughout our engineering workflow and expect you to as well. This role involves regular travel to data center sites. No security clearance is required. These are critical services, and you'll take part in on-call for them. Key responsibilitie

Celonis is the trusted platform to industrialize Enterprise AI. At our core is the Celonis Context Model — which combines process data, business knowledge, and intelligence into a living digital twin of the enterprise that AI can actually understand, turning AI's operational blind spots into operational clarity. World's leading companies trust Celonis and its global ecosystem of partners to make their AI agents, people, systems, and processes work together, achieving transformational outcomes. We believe there's a massive opportunity to unlock global productivity and sustainability by giving AI the context to understand how every business process really works. Join our mission to make processes work for people, companies, and the planet. The Team: The Head of IT Platform & Infrastructure leads one of the core teams of our Global IT organization and reports to the Head of IT Infrastructure. The team owns the platforms almost every Celonaut works in every day — Google Workspace, Atlassian, Slack, and a long tail of business-critical SaaS applications — as well as a deliberately lean, fully cloud-based infrastructure with no legacy data center to maintain. You lead a distributed team of platform engineers across Europe and India and work side by side with our IT Identity & Endpoint and IT 1st Level Support teams and in very close alignment with InfoSec. Security and identity are shared design principles here, not downstream review steps. The Role: This role owns the strategy, operation, and evolution of Celonis' internal platform landscape. You set the direction for how our collaboration and productivity platforms are run, governed, and simplified, and you make sure they stay reliable, secure, and easy to use for a fast-moving global company. You take full ownership of our Atlassian Cloud estate and run it to the same standard as any other production platform. We are explicitly looking for a leader with a strong AI skillset and mindset: someone who treats AI as

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron Technology, we transform how the world uses information to enrich life for all. The Heterogeneous Integration Group (HIG) develops next-generation High Bandwidth Memory (HBM) solutions that enable advanced AI, high-performance computing, data center, and networking applications. Our team collaborates across architecture, RTL design, verification, physical design, firmware, and product engineering to deliver innovative memory-centric SoC solutions that meet demanding power, performance, area, quality, and schedule objectives. As an HBM SoC Design Engineer/Architect, you will contribute to the design, integration, and validation of advanced HBM logic die and memory-centric SoCs. Working alongside experienced engineers, you will apply knowledge gained through academic coursework, research, internships, and engineering projects to solve real-world semiconductor design challenges. This role offers opportunities to develop expertise in digital design, ASIC development, HBM architecture, and AI-enabled engineering methodologies that improve design productivity and quality. Responsibilities Design, implement, and integrate digital logic and subsystem RTL using Verilog or SystemVerilog for next-generation HBM SoC solutions. Collaborate with architects and multi-functional engineering teams to translate functional requirements into microarchitectures, interface definitions, and implementation plans. Support design-quality activities including simulation, synthesis, static timing analy

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are the Compute and Memory Business Unit (CMBU), driving the innovation behind Micron's next generation DRAM solutions for AI, data center, and client computing platforms. Our team collaborates across product architecture, design, validation, and system engineering to solve complex challenges in bandwidth, power, reliability, and scalability. Together, we help shape the future of memory technology for the world's most demanding compute environments. As a Product Architecture Engineer focused on Signal Integrity (SI) and Power Integrity (PI), you will define the electrical architecture that enables next-generation DRAM products. This highly visible role combines deep technical expertise with system-level thinking to influence product roadmaps, guide design decisions, and partner with industry-leading ecosystem stakeholders. Your work will help deliver memory solutions that power tomorrow's AI and high-performance computing platforms. Responsibilities: Lead SI/PI architecture pathfinding for next-generation DRAM products across AI, data center, and client platforms Define channel, package, board, and module-level SI/PI requirements and design targets for product development Evaluate DDR and LPDDR electrical performance, including timing, jitter, signal margin, crosstalk, impedance, reflections, and power delivery behavior Develop and apply modeling, simulation, and correlation methodologies using industry-standard EDA tools and validation data Partner across design, validation, package,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The High Bandwidth Memory (HBM) organization develops industry-leading memory solutions that power artificial intelligence, high-performance computing, graphics, and data center applications. The team brings together experts across architecture, design, verification, physical design, product engineering, and validation to deliver advanced memory products that enable the world's most demanding computing workloads. As an HBM Design Development Technical Leadership (DDTL) Intern, you will support the planning, execution, and coordination of next-generation HBM product development programs. You will work closely with technical leaders and engineering teams to track project execution, manage risks, analyze program data, and improve engineering productivity through automation, analytics, and AI-enabled workflows. This role offers exposure to both the technical and leadership aspects of semiconductor product development. Responsibilities Support HBM product execution by tracking schedules, achievements, dependencies, technical risks, and design readiness throughout the development lifecycle. Collaborate with multi-functional engineering teams to monitor project status, coordinate deliverables, and support successful achievement completion. Develop dashboards, reports, data analytics solutions, and executive summaries to provide transparency into program health and key performance indicators. Create automation tools, workflow improvements, and AI-assisted solutions that improve engineering productivity, de

We’re building a world of health around every individual — shaping a more connected, convenient and compassionate health experience. At CVS Health®, you’ll be surrounded by passionate colleagues who care deeply, innovate with purpose, hold ourselves accountable and prioritize safety and quality in everything we do. Join us and be part of something bigger – helping to simplify health care one person, one family and one community at a time. Position Summary We are seeking an accomplished Principal Cloud Storage Engineer to lead the design, engineering, and evolution of our private cloud storage platforms. This role will focus on large-scale storage architecture, data protection, cyber recovery, and resiliency technologies across complex enterprise environments. The ideal candidate will combine deep technical expertise in storage systems with strong leadership, architectural vision, and the ability to influence technical direction across the organization. Key Responsibilities Architect and engineer enterprise storage platforms that ensure data integrity, availability, security, and disaster recovery readiness Design and implement end-to-end storage solutions, including Software Defined Storage, SAN, NAS, and object storage across private cloud and data center environments Drive strategic technology decisions by evaluating emerging products, tools, and standards supporting storage, data protection, cloud, and compute platforms Lead infrastructure initiatives involving storage modernization, data protection, cyber recovery, data migration, and resilience engineering Develop and execute enterprise strategies for backup, recovery, cyber vaulting, and business continuity Create and maintain comprehensive documentation of storage architectures, configurations, policies, and operation

We’re building a world of health around every individual — shaping a more connected, convenient and compassionate health experience. At CVS Health®, you’ll be surrounded by passionate colleagues who care deeply, innovate with purpose, hold ourselves accountable and prioritize safety and quality in everything we do. Join us and be part of something bigger – helping to simplify health care one person, one family and one community at a time. Position Summary CVS Health is seeking a highly skilled and visionary Sr. Manager to lead and manage our enterprise Cisco Application Centric Infrastructure (ACI) environment and the transition to Cisco Nexus Dashboard Fabric Controller (NDFC). This role sits within the Network Engineering team and is pivotal to driving the modernization and scalability of our next-generation data center fabric. This role will help set and drive the network technology strategy for ISTS, ensuring that ISTS delivers on our mission to transform technology and provide an agile, cost optimized and resilient set of network infrastructure services to meet the evolving needs of all the CVS Health lines of business. The ideal candidate will have experience supporting complex enterprise network environments and demonstrate deep expertise in Cisco ACI and NDFC technologies. As a strategic leader, you will be responsible for setting the direction, leading a team of engineers, and ensuring the operational integrity, performance, and evolution of our fabric-based data center architecture. This position will also mentor staff members in an effort to develop excellent enterprise networking skills. Key Responsibilities Lead the deployment, administration, and lifecycle management of the Cisco ACI environment Oversee the strategic transition to and ongoing management of the Cisco