Design Manager Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron Technology, we transform how the world uses information to enrich life for all. The Heterogeneous Integration Group (HIG) develops next-generation High Bandwidth Memory (HBM) solutions that enable advanced AI, high-performance computing, data center, and networking applications. Our team collaborates across architecture, RTL design, verification, physical design, firmware, and product engineering to deliver innovative memory-centric SoC solutions that meet demanding power, performance, area, quality, and schedule objectives. As an HBM SoC Design Engineer/Architect, you will contribute to the design, integration, and validation of advanced HBM logic die and memory-centric SoCs. Working alongside experienced engineers, you will apply knowledge gained through academic coursework, research, internships, and engineering projects to solve real-world semiconductor design challenges. This role offers opportunities to develop expertise in digital design, ASIC development, HBM architecture, and AI-enabled engineering methodologies that improve design productivity and quality. Responsibilities Design, implement, and integrate digital logic and subsystem RTL using Verilog or SystemVerilog for next-generation HBM SoC solutions. Collaborate with architects and multi-functional engineering teams to translate functional requirements into microarchitectures, interface definitions, and implementation plans. Support design-quality activities including simulation, synthesis, static timing analy

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities: Design of digital blocks such as control logic, BIST and DfT using semi-custom methodology Participation in logic synthesis constraining, P&R Functional and gate level verification Equivalence Checking Setup and enhancement of the semi-custom flow Assist in silicon design validation Prepare documentation Required Qualifications Experience in RTL Coding of digital blocks with Verilog or VHDL, Synthesis, Constraining, STA, RTL and gate level simulations Familiarity with full-custom and semi-custom design methodologies. Experience in place and route Experience with digital interface description Degree or equivalent experience in electrical engineering or physics Good English written and spoken Independent and proactive way of working Great teammate and ready to work in an international enviro

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Memory Systems Engineering team develops the digital and mixed-signal foundation that enables Micron's High Bandwidth Memory (HBM) products. The team works across architecture, PHY, design verification, DFT, and silicon validation functions to deliver innovative memory solutions that achieve demanding performance, power, and reliability targets. In this role, y ou'll receive mentorship from expert engineers while building expertise in sophisticated memory technologies. You will also contribute to the definition, implementation, integration, and validation of HBM base-die digital subsystems. You will collaborate with cross-disciplinary engineering groups to develop robust RTL solutions, support verification activities, and help ensure successful first-pass silicon execution. This position provides an opportunity to gain broad exposure to memory system design, silicon development methodologies, and AI-enabled engineering workflows. Responsibilities Define and implement digital micro-architecture for HBM base-die subsystems, including channel support logic, boot and initialization sequencing, training orchestration, configuration and status registers, telemetry, performance monitoring, and reliability features. Translate system requirements into timing, power, and area objectives while partnering with physical layer and system architects; develop and maintain interface specifications for bus protocols, clock-domain crossings, and reset architectures. Develop, integra

NVIDIA's accelerated computing platforms move data at speeds that push the limits of what silicon and physics allow. Whether a high-speed interface trains reliably, maintains accurate margins, and survives every platform topology it will ever see is a question we answer ourselves. This role does that work. The Silicon Co-Design Group leads the boundary between what was designed and what was built. When a GPU, CPU, or SoC ships with interfaces that work at scale, this team is the reason. Most engineers debug within a layer. You will own the full stack. When an interface fails to train, the link margin is unexpectedly tight, or a customer reports a critical silicon issue, you trace the problem through protocol behavior, signal integrity, firmware, platform topology, and silicon marginalities. You then confirm that the fix works. Your methodology shapes how NVIDIA validates high-speed interfaces across generations. Your decisions affect yield, production ramp, and field quality. This is not a coordination role. The engineers who do it well hold protocol depth and system breadth simultaneously, never lose the thread across hardware, firmware, and software, and have the judgment to know when to go deeper and when to act. They are rare. Should that describe you, read on. What you'll be doing: Own post-silicon bring-up, characterization, validation, and debug of PCIe, NVLink, C2C, and other HSIO interfaces across NVIDIA GPUs, CPUs, and SoCs from first power-on through production readiness. Close the hardest failures. Drive root cause across protocol behavior, signal integrity, firmware and driver interactions, platform topology, and silicon marginalities and own every fix through to confirmation. Define validation strategy. Set test coverage, debug priorities, margining methodology, and stress criteria f

NVIDIA silicon runs the world's AI infrastructure. The frequency it delivers across every voltage, process corner, and workload is not assumed. It is measured, correlated, and validated. This role does that work. The Silicon Co-Design Group is where architecture intent becomes silicon reality. We own the boundary between what was designed and what was built, and we are the team that knows the difference. When a program ships at frequency and at quality, this team is a reason why. You will be the person who follows through between simulation and silicon. When the model is wrong, a frequency corner that doesn't hold, a Vmin that walks, a critical path that timing analysis missed, you find out why, and your data is what the rest of the program acts on. Architecture, design, and product teams do not guess. They use your numbers. The engineers who do this well are rare. They think like circuit designers, work like experimentalists, and reason like data scientists. If that is you, read on. What you'll be doing: Own silicon speed characterization from first power-on through production sign-off, covering frequency, Vmin, Vmax, and timing margins across the full PVT space. Close the correlation gap. Tie pre-silicon timing analysis and critical path predictions to measured silicon, quantify where the model diverges from reality, and produce analysis that architecture and design can act on with confidence. Trace failures to their source, whether a microarchitectural bottleneck, a critical path that doesn't close under voltage, a clocking issue, or a process corner the model didn't anticipate, and drive the resolution. Own and build AI agents that work at your direction: automated test orchestration, intelligent data pipelines, and analysis flows that expand coverage and compress cycle time without sacrificing difficulty. Know where AI accelerates real work and whe

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary: Have you ever dreamed of contributing to the development of groundbreaking technologies? Micron plans to invest more than $250 billion globally over the next decade in groundbreaking manufacturing and R&D, including fab expansion in the United States giving us the opportunity to bring in passionate team members to help us continue to be at the forefront of memory in the World! We have an outstanding opportunity for a high energy, tenacious, ambitious, result driven individual with a strong work ethic and integrity to join our Facilities Team in Boise, Idaho! Micron seeking a Life Safety & Fire Alarms Systems Engineer, to become part of a team that is helping shape the future of how the world uses information. T his is an outstanding opportunity to work at the forefront of technology while supporting the design, operation, and continuous improvement of critical life safety systems within world-class semiconductor manufacturing facilities. Responsibilities: Serve as a technical owner for fire alarm, mass notification, emergency communication, and life safety systems. Review of vendor provided design drawings and specifications for completeness, accuracy and adherence to all applicable design and safety standards and codes including NFPA 72, NFPA 70, NFPA 101, IFC, IBC, and FM Global requirements. Review system configurations, equipment layouts, and distribution routing to ensure functionality, life s

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Design Validation Product Engineer on High Bandwidth Memory (HBM) technology you will be tasked with developing next-generation HBM products. Product Engineers are a key interface between Design, Manufacturing, Test, and Quality internal departments as well as external customers. We take ownership of HBM products; starting at the Design phase, through initial bring-up, qualification, and into volume production. The seniority level offered will be based on a combination of experience and education. In HBM HIG or equivalent experience (High Bandwidth Memory, Heterogeneous Integration Group), we innovate and integrate end-to-end groundbreaking front-end and backend processes with groundbreaking design, debugging various tests, and qualification techniques to develop the lowest power per bit solutions to improve customer experience in the field of ML (Machine Learning) and AI. The success of a sophisticated product such as HBM relies vastly on vertical integration and the various engineering working in unison. To provide greater detail, our HBM technology pertains to stacking numbers of DRAM chips along with a logic chip within one package through an assembly technology called TSV (Through Silicon Via). This greatly increases the memory density in a package, while allowing very high-speed signal transmission. Furthermore, "high bandwidth"; is an outstanding memory design area where custom gate-level design and RTL style logic design are blended into the same product, and most of the DDR or LPDDR design is based on the gate-level design on

We are now looking for Chip Design Internships for the Switch Silicon group. As a Chip Design Intern at NVIDIA's Networking business unit, you'll join a group of passionate engineers to implement the next generation state of the art Switch Silicon chips. In this intern position, you'll be part of a dynamic, technology-focused company while closely engaged with developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! What you'll be doing: Understand the fullchip working flow and build infrastructure for better automation, efficiency. Work in a combined design and verification team and develops test facilities for quality assurance. Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW. What we need to see: Pursuing BS / MS in electrical / computer engineering and related. A team player with quick learning, good communication and interpersonal skills. Fluent English (both written and spoken). Experience in RTL design or RTL verification is a plus. Strong scripting

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Engineer – HBM Design for Test (DFT) is an experienced technical contributor responsible for the definition, implementation, integration, and support of DFT solutions across HBM core die and base die for current and next‑generation HBM products. This role focuses on driving defined DFT architectures , contributing to DFT specifications, and partnering with multi‑functional teams to ensure DFT features meet test, quality, and manufacturability requirements. The Engineer works closely with DFT Architecture, Design Engineering, Product Engineering, Test, and DFT Verification to support successful tape‑out, silicon bring‑up, and qualification. Key Responsibilities Implement and integrate DFT features for assigned HBM core die and base die designs in alignment with established DFT architecture and guidelines Contribute to the development, review, and maintenance of DFT specifications, requirements, and implementation guidelines Ensure DFT implementations support high‑quality, efficient, and manufacturable HBM products Use AI Supported tools and flows where necessary to improve job efficiency Collaborate with Design Engineering, Product Engineering, Test, and DFT Verification to: Translate manufacturing and test requirements into actionable DFT implementations. Support alignment between DFT specifications and verification coverage. Identify, debug, and resolve DFT‑related issues during build execution, tape‑out, and silicon bring‑up Serve as a DFT contributor or sub‑d

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join Micron’s Memory Systems Engineering team and contribute to the development of premier digital and mixed-signal foundations for our high-bandwidth memory (HBM) products. This position offers an outstanding chance to work intimately with multiple engineering areas, guaranteeing the smooth integration and implementation of HBM base die. Join a motivated team committed to delivering robust first-pass silicon that meets our strict bandwidth, latency, power, and reliability objectives! Responsibilities Assist in defining and carrying out digital micro-architecture for HBM base-die subsystems, covering channel support logic, boot and initialization sequencing, training orchestration, configuration and status registers, telemetry, performance counters, and reliability features. Translate system requirements into timing, power, and area considerations by partnering with physical layer and system architects, and help maintain interface specifications for bus protocols, clock-domain crossings, and reset strategies. Implement and integrate synthesizable SystemVerilog RTL, including multi-channel logic, interrupts, events, register maps, scan hooks, and design-for-test interfaces, while supporting clean integration and ECO flows. Collaborate with design verification teams to support verification planning, coverage goals, CDC/RDC checks, and debugging of RTL, testbench, and gate-level issues. Support silicon bring-up and post-silicon validation through debug enablement, issue correlation to RTL or architecture, and col

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NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. Our team builds AI-driven software systems for Circuit Design: combining automation algorithms, DL models and agentic workflows to accelerate end-to-end design automation. Come join this integral team in our Circuit Solutions Group! What you'll be doing: Work within a multi-functional team on various projects involving Pre-silicon and Post Silicon custom circuit design and related data, Circuit/Layout Optimization and Spice correlation Research and implement techniques on frontier solutions of electronic design automation. Build and innovate agentic AI solution for VLSI design problem. Responsible for analyzing the problem or datasets, raise and validate hypotheses, design and build models and algorithm until they reach the desired QOR. What we need to see: MS (or equivalent experience) with 3+ years’ experience or PhD with 1+ years’ experience in Electrical/Computer Engineering degree Experience in the following fields is a strict requirement for this role: Combinatorial Optimization, Agentic AI and large language models, Machine Learning for Chip Design & EDA Experience in Algorithms/Data Structures/

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. ROLE Lead first-silicon bring-up, characterization, debug, and validation of advanced 3D NAND products. Establish whether silicon meets design intent and datasheet requirements, correlate simulation with measurements, and resolve issues that could affect product qualification, reliability, yield, or SSD/system integration. This role provides a unique opportunity to develop end-to-end expertise across advanced NAND products, spanning circuit design concepts, mixed-signal simulations, first-silicon bring-up, silicon debug, product qualification, and manufacturing readiness. Engineers gain broad exposure to analog, mixed-signal, digital, firmware, memory-array, and system-level behavior while working closely with design, verification, firmware, product, and system teams. RESPONSIBILITIES • Own validation strategies, coverage, and test plans for assigned NAND circuits and functions; define expected behavior, operating corners, and pass/fail criteria from product specifications and design intent. • Lead first-silicon bring-up, characterization, debug, and simulation-to-silicon correlation across voltage, temperature, process, timing, and workload conditions. • Characterize and debug NAND subsystems including reference and bias generation circuits, bandgap references, oscillators, voltage regulators, charge pumps, sensing and page-buffer paths, high-voltage program/er

Senior/Staff Facilities Electrical Systems Engineer- Operations & Design — Boise, ID - Main Site. Apply via Workday.

New College Grad - Mixed Signal Design Engineer, HBM — Richardson, TX. Apply via Workday.