Design Manager Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has been at the forefront of innovation, delivering the world’s most advanced memory and semiconductor technologies. Our distributed team of engineers, scientists, and visionaries is developing groundbreaking solutions that redefine how the world uses information to enrich life for all. We are seeking a Layout Design Engineering Led to join Micron's organization in Guadalajara, Mexico. In this leadership role, you will guide a distributed team focused on developing complex analog, mixed‑signal, and custom layouts powering next‑generation AI and high‑performance computing solutions. Responsibilities Lead a team designing and developing critical analog, mixed‑signal, and custom block layouts, including support for full‑chip-level integration. Oversee layout verification activities, including LVS, DRC, Antenna checks, documentation, and quality reviews. Ensure timely and high‑quality delivery of block‑level layouts that meet all project requirements. Coordinate planning, area/time estimation, scheduling, task delegation, and execution for multiple concurrent projects. Mentor and guide layout engineers of all levels. Perform detailed reviews of sub‑block‑level layouts. Collaborate with global engineering teams to drive successful project execution and alignment across Micron’s worldwide footprint. Minimum Qualificatio

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a Principal IO/Clocking Design Engineer to be a part of our design team working on critical high-speed circuits common to all DRAM related memory products! In this position, you will be responsible for the development, design, optimization, verification, and fan out of these high-speed circuits to all DRAM related projects at Micron. You will work on equalization and bandwidth extension to push the speed limits of the circuit and process technology, analyze resulting IO impairments, clock jitter and duty error impact to DRAM system and timing budget, and develop effective engineering solutions. Responsibilities: Innovate, design, optimize and verify high-speed IO and clocking circuits used in new DRAM products. Apply proven high-speed circuit design techniques and enhance critical performance evaluation of the IO data path and clocking path at circuit level. Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full-chip and system level. Work with Product Engineering and SI team to compare silicon performance with simulation results and support correlation activities. Collaborate with process integration and transistor modeling teams on Micron's next groundbreaking process node. Minimum Qualifications: Minimum MSEE + 10 years or BSEE + 12 years of industry experience in analog and mixed-signal circuit design. Proficiency w

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology’s vision is to transform how the world uses information to enrich life and our commitment to people, innovation, tenacity, collaboration, and customer focus allows us to fulfill our mission to be a global leader in memory and storage solutions. This means conducting business with integrity, accountability, and professionalism while supporting our global community. Role: The team member will typically work on processors, controller architectures or ASICs for Enterprise SSD Group. Should be proficient in block level low power aware floorplanning, placement, clock tree synthesis, routing, RC extraction, STA timing closure, IR/EM analysis, DRC/LVS/ERC and tape out activities. Requirements Minimum of 15 years of hands-on physical design implementation/IR/EM experience along with APR flow development and PPA analysis STA closure at block & Full Chip Experience in Advanced process technology nodes (5nm/3nm preferred) Experience with Ansys Redhawk-SC tool Experience with Cadence layout tools ( In

Lead Director, Omnichannel Experiential Design — 8 Locations. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes. Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Participate in developing verification methodology and verification environments for sophisticated products. Co-work with international colleagues on developing new verification flows to take on the challenges in design. Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Ability to identify verification pain points suitable for AI-based automation and collaborate with cross‑functional teams to deploy scalable solutions. Core Requirements Good communication skills and ability to work well in a team Exposure to gate level simulations ( with delays ) and Logic schematic analysis Analytical capability for complex CMOS and/or gate level circuit designs Proficient with Spice and Verilog simulations Qualifications & Skills Experience in DRAM, SRAM or other memory related fields Experience in python scripting Experience in timin

Sr. Designer - Creative Design Ready to turn bold ideas into real-world impact? At Genpact, we don’t just adapt to change, we lead it. AI and digital innovation are transforming the way businesses work, and we’re at the forefront of it. Genpact’s AI Gigafactory , our industry-first accelerator, exemplifies how we scale advanced technology solutions to help global enterprises work smarter, grow faster, and transform at scale. Whether tackling complex challenges through large-scale models or agentic AI , our breakthrough solutions tackle companies’ most complex challenges. If you thrive in a fast-moving, innovation-driven environment, love building and deploying cutting-edge AI solutions, and want to push the boundaries of what’s possible, this is your moment. Genpact (NYSE: G) is an agentic and advanced technology solutions company. We leverage process intelligence and artificial intelligence to deliver measurable outcomes. With a strong partner ecosystem and decades of client trust, we provide innovative solutions that transform how businesses run. Powered by a team with an active learning mindset and client centricity at its core, we deliver lasting value for the world’s leading enterprises. Get to know us at genpact.com and on LinkedIn , YouTube , X , and Facebook . Job Description Responsibilities: Create and deliver high-quality creative assets across digital and print, includ

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description: As a Design Engineer for Non-Volatile Memory Datapath Functional Group at Micron, you will support design and validation activities of Datapath and DDR high-speed interfaces of Flash Memory (non-volatile memory) products. Prior experience in Plane Datapath Design is a plus. In this highly challenging role, you will be engaged in high-speed circuits block level and sub-system level design and timing optimization and supervising their layout. You will be working with project/cross-functional teams to understand full chip floor plan and how to fit and place your circuits at full chip level. You will be also working with Application Engineering team to understand the new specs and translate them into circuit requirements. You will also work with CMOS/modeling team to define CMOS characteristics to realize and enable high-speed circuits. In addition to design activities, you will be heavily engaged in high-speed circuits functional and timing validation from base cells all the way to full-chip level using wide variety of simulation tools such as HSPICE, Fast SPICE and NC Verilog. Having 'Design/Verification + AI' approach accelerates the design process. So, you should be able to adept to ‘Design + AI’ approach with N

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an Electrical Design Engineer in the Systems Integration Group (SIG) of Micron Technology, Inc, you will design load boards that support semiconductor memory manufacturing, as well as resolve issues with and develop improvements to deployed automated test equipment (ATE) products. Load boards, used for testing memory devices after they are manufactured & packaged, are the contact interface between ATE and pins of the device under test (DUT). Load boards contain the necessary components to: setup the DUT for correct testing by the ATE; route power, test, and response signals between the DUT and the ATE; provide additional test capabilities that the ATE may not be able to provide; and, alternately, testing or calibrate the ATE itself. Load board design considerations, like other PCB assemblies, include DC power supply distribution, clock & digital routing, and high-speed signal integrity. You will apply circuit theory to design load board solutions working closely with other team members located around the world that include other engineering disciplines, technicians, procurement, planning, and external contract manufacturers. Responsibilities and Tasks Develop requirements specifications Analog and digital circuit design and simulation Schematic capture Work closely with layout designers to develop PCBs Author test plans and lab repo

Zscaler (NASDAQ: ZS) accelerates digital transformation so customers can be more agile, efficient, resilient, and secure. The Zscaler Zero Trust Exchange platform protects thousands of customers from cyberattacks and data loss by securely connecting users, devices, and applications in any location. Distributed across 200+ public data centers globally and thousands of private sites at the edge, the SASE-based Zero Trust Exchange is the world’s largest in-line cloud security platform. We believe the future of work is Human + AI and are building an AI-native enterprise where human potential is amplified by machine intelligence to solve the world’s hardest security challenges. Driven by deep customer obsession, we are committed to the mission, outcome, and to each other. We bring these commitments to life through three core behaviors: ownership and collaboration, trust through outcomes and impact, and a challenge culture with ongoing feedback. Ready to make an impact at the company pioneering security transformation in the AI era? Join us at Zscaler. Role We are looking for a Director, Global Partner Program Design & Scale to join our Channel and Alliances team. Reporting to the global head of Partner Programs, you will lead the design, development, launch, and scaling of Zscaler's priority partner programs and go-to-market initiatives. Working with global program and route-to-market owners, you will turn strategic priorities into complete, repeatable programs and lead a regional program team to drive activation, adoption, and continuous improvement worldwide What you'll do (Role Expectations) Lead Partner Program Design & Development: Translate growth opportunities and field needs into partner programs, offers, and repeatable sales plays. Own a focused portfolio from business case and design through pilot and launch, with clear outcomes, investment requirements, accountable owners, and decision gates. Evolve Program Architecture & Partner Experience:

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Title: Principal Engineer – HBM Verification Location: Hyderabad, India Experience : 12+ years in Design Verification (experience with Pre-Silicon Verification OR DDR/GDDR/LPDDRmemory/SerDes PHY IP Verification is preferred) Role Description Join the Micron HBM team where you will drive verification architecture for next-generation HBM, ensuring robust methodologies and sign-off strategies. This role is perfect for a hands-on silicon verification expert who is passionate about developing best-in-class verification methodologies, testbench design, AI enabled verification and developing novel solutions to improve quality and efficiency of verification workflows. Key Responsibilities Define and drive verification architecture and methodology for next generation HBM designs. Develop verification plans, coverage strategies, and sign-off criteria. Architect and implement UVM-based testbenches and reusable verification components. Apply Formal Verification techniques for critical Collaborate strictly with build teams to ensure verification completeness and quality. Mentor a

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities and Duties include, but not limited to: Chipping in to the development of new NAND Flash Memory by assisting with the overall design, layout, and optimization of Memory/Logic circuits Supervising and own the full chip verification activities including planning, tracking, and criteria setting Drive multi-functional team in key features evaluation and recommend decision on architecture Driving innovation into the future Memory generation with dynamic work environment Proven ability to leverage AI‑assisted (vibe) coding techniques to improve efficiency or automate design and analysis methodologies Leverage AI tools to automate the tools and workflow Applying Artificial Intelligence in workflows to improve build efficiency Successful candidates for this position will have: Broad knowledge and experience in IP Verificatipn is preferred Ability to lead multi-functional team in a project environment Good interpersonal skills with the ability to convey complex technical concepts in verbal and written form Proven knowledge of variousverification functionality on full chip level Proven expertise and background in Test Bench development in System Verilog Knowledge in verification methodologies such as UVM Knowledge of circuit simulators such as XA, hspice and/or hsim/Finesim, etc. 6-8 years of proven experience in Verification Degree or equivalent

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities: Contribute to the development of new product opportunities by assisting with the overall Verification Activities of DRAM Design Actively leverage AI‑based tools, agentic workflows, and automation frameworks to: Accelerate verification cycle time Assist in Test-Case/TB and various other components required for DRAM Design Verification Improve debug efficiency across simulation and silicon learning loops Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon block level/full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features Develop and maintain test benches / test vectors using simulation tools and run regressions for coverage analysis and improvements using Agentic AI Flow Participate in simulating, analyzing, and debugging pre-silicon full chip designs by applying leading edge verification technique Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design. Participate in developing verification methodology and verification environ

Senior Specialist, Product Experience Design — Dublin, Ireland. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s DRAM Design Engineering Group (DDEG) is where bold ideas become real technology. We push the limits of memory and storage innovation, and we thrive in a collaborative environment where engineers learn, build, and solve challenges together. We are driven by curiosity, creativity, and the pursuit of better solutions every day! We are seeking a Principal or Member of Technical Staff (MTS) in Analog Design to join our DRAM IP Design team. As a Principal/ MTS, you will help shape the next generation of Micron's memory products, while working closely with global design, verification, and product teams to bring innovative circuit designs from concept to silicon. Your work will directly influence product performance, quality, and reliability—and contribute to advancements that define the semiconductor industry. Responsibilities: Design, optimize, and verify block‑level analog and mixed-signal circuits for DRAM projects. Work with the internal data science team and EDA vendors to leverage and improve AI-assisted design flow and circuits optimization. Propose, evaluate and implement new or improved circuit topology to further enhance PPAC of the circuit block. Improve design verification scope and coverage to increase circuit robustness to enhance mass production yield. Partner with global design groups and provide layout guidance through post‑layout simulation. Compare silicon

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Advanced Mask Development team within Micron’s Technology Development organization delivers reticle solutions that help enable the next generation of memory and storage products. We work at the intersection of advanced lithography, materials science, and precision manufacturing to solve complex patterning challenges. If you enjoy collaborating with technical experts, driving innovation, and making a direct impact on product quality and technology advancement, you’ll find exciting opportunities here! As a Resolution Enhancement Techniques (RET) Engineer, you will help develop and optimize RET and Optical Proximity Correction (OPC) solutions that enable high-fidelity wafer patterning for advanced memory technologies. Depending on experience and qualifications, candidates may be considered for Principal, MTS, or SMTS-level roles. This position partners closely with teams across technology development and manufacturing to improve reticle solutions, enhance tapeout methodologies, and solve critical patterning challenges that support Micron’s technology roadmap. Responsibilities: Develop and implement RET and OPC solutions to improve pattern fidelity, manufacturability, and yield Optimize lithography methodologies, software capabilities, and tapeout processes to improve performance and efficiency Analyze patterning issues, identify root causes, and drive corrective actions across R&D and manufacturing environments Lead complex mask development and lithography optimiza