Design Manager Jobs

New College Grad - CMOS & Metallization Test Structure Design and Layout — Jalisco, Mexico. Apply via Workday.

We anticipate the application window for this opening will close on - 2 Nov 2026 Careers that change lives start here. Medtronic is a global leader in healthcare technology with a Mission to alleviate pain, restore health, and extend life. Our 95,000 employees work across more than 150 countries to put patients first — developing innovative medical technologies that improve the lives of 72+ million patients each year. Your unique talents will help shape the future of healthcare while building a career grounded in purpose, growth, and impact. A Day in the Life The Affera Mapping and Ablation System is an innovative medical technology designed to treat patients with cardiac arrhythmias. The system involves advanced mapping techniques to create detailed images of the heart's electrical activity, helping physicians identify abnormal areas causing arrhythmias. Once identified, the Affera Ablation System delivers targeted energy to disrupt these abnormal signals, restoring normal heart rhythm. This position follows Medtronic’s minimum four-day-per-week onsite work model. As a Sr. Mechanical Design Engineer in CAS Research & Technology (R&T), you will support the initial design of electrophysiology devices for use with the Affera system. This is a high impact role, defining the design direction for future catheter and sheath products.We are looking for passionate individuals who are interested in making a difference in a dynamic work environment. The ideal candidate will be a hands-on, self-starter looking to improve the lives of others through excellence in product design. Command of theoretical and practical engineering fundamental principles and an interest to learn about the field of cardiac electrophysiology are required. Prima

Reddit is a community of communities. It’s built on shared interests, passion, and trust, and is home to the most open and authentic conversations on the internet. Every day, Reddit users submit, vote, and comment on the topics they care most about. With 100,000+ active communities and approximately 130 million daily active unique visitors, Reddit is one of the internet’s largest sources of information. For more information, visit www.redditinc.com . This is an Android role on Reddit’s Design System Team. The mission of the Design System Team is to deliver a cohesive, modern and accessible experience across all of Reddit’s platforms. As an Android engineer on the Design System Team, you will help evolve Reddit’s cross-platform design system and UI architecture that powers experiences across the company. You will build reusable components, improve platform capabilities, and help establish frontend patterns that enable product teams to ship high-quality experiences efficiently. This role has broad scope and impact, helping shape the future of frontend development at Reddit. What You’ll Do : Evolve Reddit’s cross-platform design system by expanding its capabilities and developing higher-level reusable components that accelerate product development while maintaining consistency and quality. Collaborate cross-functionally with product teams, designers, and engineers to ensure the design system and UI infrastructure effectively support real product needs. Improve performance at scale , contributing to Android architecture, rendering patterns, and performance-focused development practices that make performance a built-in feature of the platform. Advance accessibility across the platform , building accessible components, patterns, tooling, and documentation that help teams adopt accessibility best practices by default. Strengthen developer experience , contributing to shared tooling, documentation, and platform improvements that help engineers build reliable, consiste

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Contribute to the Development of New Memory Products by owning the overall logic design of the on-chip memory controller, including all optimizations and pathfinding. Responsible for meeting the performance/area/power targets Ability to interpret device and system specifications to produce required functionality Participate in new circuit conception and design as needed Define and build design architecture spec documents for the new features Architect, design, and integrate complex RTL blocks for sophisticated memory products, driving functionality from specification through verification and design closure. Develop and optimize synthesis and timing constraints, perform STA, and resolve timing challenges to meet performance, power, and area objectives. Back-end implementation activities including APR, timing closure, physical signoff readiness, and functional/timing ECO execution. Maintain Technical Expertise and provide training Define best known design and verification practices and communicate to the entire department Prepare detailed documentation as required Participate in recruiting, and interviewing new candidates Build new hire ramp up plans Engage in continuing education and competitor analysis Manage Verification Processes Perform RTL and synthesized netlist (gate level) verification at block, su

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Summary: As an ENGINEER, NAND SILICON DESIGN VALIDATION at Micron, you will be part of an ambitious group committed to developing and validating top-tier NAND Flash memory products. This position is distinct since it covers both pre-silicon concept development and practical post-silicon validation. You will acquire a full understanding of the product lifecycle. You will work on modern technologies, conduct simulations, and compose detailed validation documentation. Your role will be key in identifying and resolving design-related problems to secure outstanding product performance. Your responsibilities will encompass collaborating with R&D teams, designers, and various engineering departments to troubleshoot and validate device testing programs. You will be the key point of contact for critical product-specific issues, ensuring a seamless interface between Research and Development, Manufacturing, Business Units, and Quality Assurance departments. Main Responsibilities: Develop, validate, and qualify new innovative NAND Flash memory products Define and validate product configuration parameters Apply CAD tools and Verilog simulations for build verification and in-depth circuit analysis Identify build marginalities and recom

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we innovate to transform how the world uses information to enrich life. For more than 40 years, we have developed advanced memory and semiconductor technologies that power innovation across industries worldwide. As a DRAM Engineering Group (DEG) Layout Designer at Micron Technology, Inc. you will be responsible for translating schematics into layout used for the creation of fabrication reticules. You will be required to meet all engineering and process related criteria needed for an assigned Dram product. You will organize and prioritize logistics and resource allocations to meet scheduled deadlines and proactively develop methodologies for issue resolution. In this role you will work with Design and other engineering groups to apply multiple layout techniques for the design and verification of digital and analog circuits. You will be expected to understand various circuit design protocols, different fab processes, mask generation techniques, and tape out processes and procedures. Our team vision is a continuing desire to develop your skills working in a Team across worldwide geographies! Enabling the creative career path you deserve with a collaborative environment and groundbreaking technology and growing upon your imagination and creativity. Responsibilities: Develop and optimize IP layouts for DRAM products while ensuring compliance with design, process, and reliability requirements. Perform physical verification activities including DRC, LVS, EM, quality reviews, and documentation

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Design/Senior Design Engineer – NAND Sequences and Algorithms (NVE Engineering) Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Introduction The Non-Volatile NAND Design Engineering group is responsible for the design and optimization of analog, digital, mixed-signal, and embedded control solutions enabling advanced NAND Flash memory products. Close collaboration with multi-functional teams ensures scalable, manufacturable, and reliable solutions across technology nodes. Position Overview As a NAND Sequences and Algorithms Design Engineer in the NVEG organization at Micron Semiconductor Italia, you will play a key role in the definition, implementation, verification, and silicon validation of embedded control sequences and algorithms enabling advanced NAND Flash functionalities. In this role, you will act as a technical owner of complex NAND algorithms and operational sequences, working at the intersection of architecture, logic, datapath, analog, test, and product engineering teams. You will translate device and system requirements into robust low-level implementations and support new product pathfinding, silicon bring-up, validation, and learning. Responsibilities Responsibilities include, but are not limited to: • Own end-to-end development of NAND sequences and algorithms, from requirements and a

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Design/Senior Design Engineer – NAND digital (NVE Engineering) Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. department Introduction The Non-Volatile NAND Design Engineering group is responsible for the design and optimization of analog, digital and mixed-signal circuits enabling advanced NAND Flash memory products. Close collaboration with cross-functional teams ensures scalable, manufacturable, and reliable solutions across technology nodes. Position Overview As a Logic Design Engineer in the NVEG organization at Micron Semiconductor Italia, you will play a key role in the definition, implementation, verification, and silicon validation of NAND Flash logic features. In this role, you will act as a technical owner of complex logic functionalities, working at the intersection of architecture, firmware, datapath, analog, and test teams. You will contribute to new product pathfinding, ensure robust feature implementation across technology generations, and support silicon bring‑up, validation, and learning. Responsibilities Responsibilities include, but are not limited to: • Own end-to-end development of logic features, from architecture definition through RTL implementation, verification, and post-silicon validation. • Translate system and firmware requirements into micro-a

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Design/Senior Design Engineer – Auto Place & Route / Digital Implementation (NVE Engineering) Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Introduction The Non-Volatile NAND Design Engineering group is responsible for the design and optimization of analog, digital, and mixed-signal circuits enabling advanced NAND Flash memory products. Close collaboration with multi-functional teams ensures scalable, manufacturable, and reliable solutions across technology nodes. Position Overview As a Digital Implementation / Auto Place & Route Engineer in the NVEG organization at Micron Semiconductor Italia, you will drive the physical implementation of advanced NAND Flash digital designs from synthesized netlist through tape-out. In this role, you will own block- and subsystem-level implementation, including floorplanning, power planning, placement, clock tree synthesis, routing, optimization, and physical sign-off. You will partner with RTL, verification, DFT, analog, custom layout, CAD, and product teams to achieve performance, power, area, reliability, and schedule targets. Responsibilities Responsibilities include, but are not limited to: • Own end-to-end RTL-to-GDSII physical implementation for complex digital blocks and subsystems using automated

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. department Introduction The Non-Volatile NAND Design Engineering group is responsible for the design and optimization of analog, digital and mixed-signal circuits enabling advanced NAND Flash memory products. Close collaboration with cross-functional teams ensures scalable, manufacturable, and reliable solutions across technology nodes. Position Overview As a Design Engineer in the NVE Design Engineering Core group at Micron Semiconductor Italia, you will contribute to the development of memory products that are best-in-class, using your specialized knowledge and Micron proprietary methods of designing and analyzing core and mixed circuits used in the development of memory products. Responsibilities Responsibilities include, but not limited to: • Design, simulate, and optimize NAND core circuit blocks, balancing performance, power, area, and reliability trade-offs. • Translate product and system requirements into circuit implementations, evaluating feasibility and functionality across use cases. • Perform comprehensive circuit verification (DC, AC, transient, noise, Monte Carlo, PVT corners) at block and chip level. • Collaborate with multi-functional teams to improve power efficiency, manufacturability, and overall product performance. • Develop and leverage automation solutions (e.g., Python-based workflows, AI-assisted tools) and maintain user documentation. AI Enablement and Productivity The candidate is expected to leverage AI-powered tools and data-driven methodologies to improve engineering prod

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. department Introduction The Non-Volatile NAND Design Engineering group is responsible for the design and optimization of analog, digital and mixed-signal circuits enabling advanced NAND Flash memory products. Close collaboration with cross-functional teams ensures scalable, manufacturable, and reliable solutions across technology nodes. Position Overview As a Design Engineer in the NVE Design Engineering Core group at Micron Semiconductor Italia, you will contribute to the development of memory products that are best-in-class, using your specialized knowledge and Micron proprietary methods of designing and analyzing core and mixed circuits used in the development of memory products. Responsibilities Responsibilities include, but not limited to: • Design, simulate, and optimize NAND core circuit blocks, balancing performance, power, area, and reliability trade-offs. • Translate product and system requirements into circuit implementations, evaluating feasibility and functionality across use cases. • Perform comprehensive circuit verification (DC, AC, transient, noise, Monte Carlo, PVT corners) at block and chip level. • Collaborate with multi-functional teams to improve power efficiency, manufacturability, and overall product performance. • Develop and leverage automation solutions (e.g., Python-based workflows, AI-assisted tools) and maintain user documentation. AI Enablement and Productivity The candidate is expected to leverage AI-powered tools and data-driven methodologies to improve engineering producti

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Craft and analyze digital and analog circuits used in the development of memory products including simulating, optimizing, and floor planning DRAM circuits. Collaborate with various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly, and Marketing to proactively craft HBM products that optimize all manufacturing functions and assure the best performance, power, cost, quality, reliability, time-to-market, and customer happiness. Innovate and integrate end-toend groundbreaking front-end and backend processes with groundbreaking design, debugging various tests, and qualification techniques to develop the lowest power per bit solutions to improve customer experience in the field of ML (Machine Learning) and AI (Artificial Intelligence). Employer will accept a Master’s degree in Electrical Engineering, Physics, Computer Engineering, Semiconductor Engineering or a related field and 10 years of experience in the job offered or in a related field. Position requires: 1. High-speed memory design on data paths, from I/O interface to core array 2. 2. Power domain network analysis 3. Memory test architectures like MBIST and production silicon validation 4. Digital design methodologies experience including RTL design, synthesis, and physical implementation 5. ASIC design development using digital design 6. Memory core timing, latency control, and signal integrity consideration in advanced designs <p style="

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits Parasitic modeling and assisting in design validation, reticle experiments and required tape-out revisions Leading all aspects of and managing the layout process including floor-planning, placement, and routing Performing verification processes with modeling and simulation using industry standard simulators Contributing to cross group communication to work towards standardization and group success Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product Proactively solicit mentorship from Standards, CAD, modeling, and verification groups to improve the design quality Driving innovation into the future Memory generations within a dynamic work environment Design Planning & Top-Level Integration Perform top-level virtual flat placement to explore partitioning options and validate hierarchy quality before commit. Implement top-level global routing to derive congestion, timing, and pin-feasibility signals that drive planning decisions. Own partition creation : block shaping, abutment, channel/keep-out definition, and power-domain planning. Drive pin optimization / pin

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has been at the forefront of innovation, delivering the world’s most advanced memory and semiconductor technologies. Our distributed team of engineers, scientists, and visionaries is developing groundbreaking solutions that redefine how the world uses information to enrich life for all. We are seeking a Layout Design Engineering Led to join Micron's organization in Guadalajara, Mexico. In this leadership role, you will guide a distributed team focused on developing complex analog, mixed‑signal, and custom layouts powering next‑generation AI and high‑performance computing solutions. Responsibilities Lead a team designing and developing critical analog, mixed‑signal, and custom block layouts, including support for full‑chip-level integration. Oversee layout verification activities, including LVS, DRC, Antenna checks, documentation, and quality reviews. Ensure timely and high‑quality delivery of block‑level layouts that meet all project requirements. Coordinate planning, area/time estimation, scheduling, task delegation, and execution for multiple concurrent projects. Mentor and guide layout engineers of all levels. Perform detailed reviews of sub‑block‑level layouts. Collaborate with global engineering teams to drive successful project execution and alignment across Micron’s worldwide footprint. Minimum Qualificatio

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a Principal IO/Clocking Design Engineer to be a part of our design team working on critical high-speed circuits common to all DRAM related memory products! In this position, you will be responsible for the development, design, optimization, verification, and fan out of these high-speed circuits to all DRAM related projects at Micron. You will work on equalization and bandwidth extension to push the speed limits of the circuit and process technology, analyze resulting IO impairments, clock jitter and duty error impact to DRAM system and timing budget, and develop effective engineering solutions. Responsibilities: Innovate, design, optimize and verify high-speed IO and clocking circuits used in new DRAM products. Apply proven high-speed circuit design techniques and enhance critical performance evaluation of the IO data path and clocking path at circuit level. Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full-chip and system level. Work with Product Engineering and SI team to compare silicon performance with simulation results and support correlation activities. Collaborate with process integration and transistor modeling teams on Micron's next groundbreaking process node. Minimum Qualifications: Minimum MSEE &#43; 10 years or BSEE &#43; 12 years of industry experience in analog and mixed-signal circuit design. Proficiency w