Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary At Micron Technology, we are looking for a Senior RTL Engineer to build and develop DRAM digital and mixed-signal blocks for advanced memory products. In this role, you will support the RTL lifecycle from specification and implementation to signoff. You will collaborate with multi-functional teams to develop high-quality builds that meet power, performance, and area (PPA) targets. This position is based in Boise, Idaho, within a collaborative and innovative engineering environment. Responsibilities Contribute to RTL build of digital and mixed-signal components for DRAM using RTL-to-GDS flows. Implement and document high-performance, power- and area-efficient RTL designs meeting product specifications. Perform front-end quality checks including lint, CDC/RDC, synthesis, UPF, and timing QoR. Collaborate closely with physical design and implementation teams to achieve timing closure and PPA goals. Apply power-, clock-, and implementation-aware RTL design practices to minimize silicon risk. Minimum Qualifications Master’s degree in Electrical Engineering with 4+ years of experience, or Bachelor’s degree with 5+ years of pre-silicon RTL design experience. Demonstrated experience developing RTL for complex digital IP from specification through implementation handoff. Hands-on experience with ASIC low-power design methodologies, including UPF-based power intent and CDC/RDC analysis. Strong knowledge of ASIC design flows, including RTL design, logi
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary As a DRAM Architect, you will optimize DRAM solutions for power, performance, and cost while pioneering new memory features and system-level innovations. You will collaborate with global, multi-functional teams to deliver high-quality, reliable, and power-efficient DRAM solutions that meet aggressive performance and time-to-market goals. Responsibilities: Develop comprehensive DRAM system/component solutions, specifications, and methodologies to optimize DRAM performance, power efficiency, and cost. Collaborate with multi-functional teams to brainstorm and implement innovative ideas, assess solution efficiency, and make necessary adjustments. Drive innovation in future memory generations within a dynamic work environment. Analyze system behavior and assess solution effectiveness, make data-driven optimizations and trade-offs. Communicate complex technical concepts to engineers from various backgrounds. Minimum Qualifications: 3+ years of proven experience in memory design, product engineering, or system architecture and usage Self-motivated with exceptional problem-solving skills and a drive to discover new solutions. Excellent communication and interpersonal skills. Bachelor’s degree or equivalent experience in Electrical Engineering, Computer Engineering, or a related field. <
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) sits within the Technology and Products Group (TPG). We are developing High Bandwidth Memory (HBM) solutions for AI and ML applications! We stack multiple DRAM chips on a high-speed memory controller using TSV (Through Silicon Via) technology, dramatically increasing memory density and bandwidth. Our designs span custom digital and RTL2GDS flows, and we are targeting the lowest power per bit in the industry. Join us as a Senior Verification Engineer and contribute to modular, scalable verification solutions for next-generation HBM DRAM products! You will work independently within a multi-functional team of technical domain experts, spanning both IP-level and SoC-level verification. You will collaborate with Design Engineering, Product Engineering, and Business Units to complete the HBM verification roadmap. You will apply your solid understanding of testbench architecture, custom or SoC verification methodologies, and 2.5D & 3D package integration to evaluate issues, define solutions, and broaden your expertise. Responsibilities: Develop and implement verification plans and architecture collateral across IP-level and SoC-level verification for current and future HBM designs Support co-verification of the overall system and participate in customer interactions to gather feedback and provide recommendations for future HBM solutions Build and improve verification methodology components and GenAI applications aligned to HBM design cycles, broadening cross-disc
Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE As an Everpure Hardware Engineer focused on DRAM, you will work with some of the best engineering teams and leaders in the industry. You will own the relationship with suppliers from the engineering side, work with other engineering leads on driving the best RAS capability for DRAM, own DRAM validation from a systems perspective for both new and existing products while continuously improving validation methodologies to ensure best-in-class quality and reliability. In this role, you will stay current with the latest product roadmap, supplier relationships, industry trends, and latest validations tools. You will work with the latest x86 and ARM based CPUs, align with SW teams to drive the latest BIOS and microcode across products. This position works with all the HW teams at Everpure, so you will be the resident expert and go to person for all DRAM related items. This role is part of the HW team so it allows the engineer to delve into other System level validation and design opportunities. WHAT YOU'LL DO Defining test plans and validation for DIMMs from a system perspective Performing hands-on lab characterization of DIMM Modules and interfaces Running stress tests to characterize signal integrity Injecting errors to characterize correct behaviour Using oscilloscopes and logic analyzers as necessary for validation and debug Understanding and ability to debug serial and
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The DRAM Systems & Architecture Lab researches and develops next-generation memory architectures that enable future AI, cloud, data center, and high-performance computing platforms. By combining advanced modeling, simulation, AI-enabled workflows, and architectural innovation, the team evaluates emerging memory technologies and defines solutions that improve performance, scalability, and efficiency for future memory systems. As a DRAM Architecture Research Intern, you will develop software frameworks, automation tools, and AI-assisted workflows that accelerate memory architecture research and analysis. You will work closely with architects and researchers to evaluate next-generation memory technologies, build simulation environments, perform performance analysis, and apply advanced AI capabilities to automate architectural studies and design-space exploration. Responsibilities Develop and enhance software frameworks, simulation environments, and automation tools that support DRAM architecture research and evaluation. Design and implement AI-assisted workflows for simulation generation, experiment automation, data analysis, technical documentation, and engineering productivity. Analyze memory architectures, including DRAM, LPDDR, DDR6, MRDIMM, CAMM, and emerging memory technologies, using modeling and simulation techniques. Perform performance, power, bandwidth, latency, and workload characterization studies to identify architectural trade-offs and optimization opportunities. Coll
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary: Micron's DRAM organization focuses on designing and developing industry leading dynamic random access memory products. These teams drive R&D, product design, and technology development for cutting edge DRAM nodes, including DDR5, LPDDR, HBM, and GDDR products that form the foundation of Micron’s global revenue leadership. Our Process Integration team is at the center of advancing next‑generation memory technology. We work closely across engineering, manufacturing, and change management to turn data into action and keep programs moving forward. If you enjoy solving complex problems and seeing your impact on real products, you’ll find a home here! We’re hiring a Senior Process Integration Technician to partner with Module Engineers and help drive day-to-day execution. This role is essential to keeping experiments, conversions, and production priorities on track through strong coordination and clear communication. You’ll play a hands‑on role in data analysis, issue resolutions, and cross‑functional alignment to support key technology milestones. Responsibilities Collaborate with cross-functional teams to interpret and complete conversions for assigned PI Engineering Module. Serve as the primary point of contact for experiment coordination, conversion activities, and lot movement logistics. Partner with PI Module Owners, Process Area Owners, PI Conversion Coordinators, and Change Management teams to ensure alignment and execution of module support tasks
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Unique Opportunities Complete ownership of verification and end to end analysis of complex full chip gate level custom designs with advanced low power and power management technologies spread across multiple categories such as DDR4,LPDDR4,DDR5 and LPDDR5 that are capable of operating at high speeds of up to 9600MT/s. Collaborate closely with design and verification team members spread across the globe, many of whom have decades of experience in memory design. Work on multi-functional tasks that can widen your skill set and experience in managing design verification of large and complex design Responsibilities Guide and set the broader direction for the verification effort of any project that the team undertakes. Lead cross-site efforts in developing verification methodology and verification environments for advanced DRAM and emerging memory products. Provide advice to senior management on significant technical issues. Strive to establish best known methods (BKM) within the group by driving development meetings, technical forums, etc. Provide verification support to design projects by simulating, analyzing and debugging pre-silicon full chip designs. Drive development of test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements using Agentic AI</spa
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron is a global leader in DRAM innovation, developing memory technologies that enable the next generation of computing, artificial intelligence, and data-driven applications. Within the Technology Development organization, the Process Integration team drives the development of future DRAM architectures by coordinating device, materials, and process innovations across multiple engineering fields. Team members work in a highly collaborative R&D environment to solve complex technical challenges and accelerate technology scaling. As a Process Integration Engineer Intern, you will contribute to the development of next-generation DRAM memory technologies through multi-functional collaboration involving process integration, device engineering, materials development, and process architecture. This role requires strong technical expertise, analytical problem-solving skills, and the ability to coordinate activities across multiple engineering organizations to achieve technology achievements and product objectives. Responsibilities Define technology achievements, design rules, structural requirements, and electrical specifications for next-generation DRAM technologies while supporting achievement of program targets and timelines. Collaborate with process development, simulation, process architecture, circuit design, and quality teams to ensure alignment with product and technology requirements. Develop and maintain documentation related to process integration plans, technical risks, issue resolution,
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Do you love the interaction of cutting-edge hardware and innovative software solutions? In today's data economy, Micron's memory and storage products are essential to advancing state of the art computing technology. Continued scaling of memory technology presents challenges that require complex and creative testing solutions. As a Product Test Engineer, you will be responsible for the development, debug and maintenance of test programs that help deliver Micron's world-class DRAM portfolio to market. A product test engineer can be focused on the health and quality of the memory cells [DRAM features 16 billion cells in less than 80mm^2 of area] or focused on high-speed interface, AI proficiency, AI supported workflow automation, and system level application testing. Responsibilities Develop, debug and support test programs from new product introduction phase up through high volume manufacturing Write test programs and support scripts in C++, Python Contribute input and feedback to help define next generation 'design for test' capabilities Analyze device and test flow data to make informed test coverage decisions Balance test time objectives while maintaining optimal yield and quality
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence. The 3D DRAM Technology Development organization is responsible for advancing next-generation memory technologies that enable future computing innovations. Engineers within this team work in a brand new 300mm R&D facility, collaborating across process development, characterization, reliability, design, and simulation fields to drive memory scaling and manufacturability. As a 3D DRAM Process Integration Engineer Intern, you will support the development of next-generation DRAM technologies with a focus on device performance, reliability, and manufacturability. This role involves working on advanced memory structures, including charge storage devices and thin-film transistors, while partnering with multi-functional engineering teams to solve challenging integration and circuit-related issues. The ideal candidate will have a strong foundation in semiconductor device fabrication, materials science, and device physics, combined with data-driven problem-solving skills and a passion for technology innovation. Responsibilities Contribute to the development of next-generation DRAM technologies, including advanced memory device components such as charge storage structures and thin-film transistors. Design, complete, and analyze experiments within the R&D fabrication environment to support technology development objectives. Collaborate with process
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Within Micron’s Heterogeneous Integration Group (HIG), we are driving the next generation of High Bandwidth Memory (HBM) solutions that power advanced computing and AI applications. Our team brings together experts across design, product development, manufacturing, and ecosystem partnerships to solve complex technical challenges and deliver innovative memory technologies. The Design Development Technical Lead (DDTL) plays a critical role in enabling predictable, high-quality execution across the HBM design lifecycle. As the single-threaded technical program owner for HBM Build, you will coordinate cross-functional teams. You will manage technical dependencies and risks. You will provide clear leadership across build, product, and executive collaborators to ensure successful program delivery. Responsibilities: Lead end-to-end execution of HBM build achievements across DRAM, base die, test vehicles, interposers, IP, and sustaining development efforts Drive multi-functional alignment, manage dependencies, and maintain execution plans to achieve schedule, cost, and quality objectives Lead governance activities including design reviews, program reviews, risk management, and change control processes Partner with foundries, IP vendors, contractors, and procurement teams to resolve execution challenges and support design delivery Own roadmap communication, executive reporting, and collaborator alignment for HBM build programs Minimum Qualifications: Bachelor’s degree in Electri
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a DRAM System Engineer in the DRAM System Validation Group at Micron Technology, Inc., you will be responsible for system-level validation, system characterization, failure analysis and experimentation as requested. We will be running and configuring diagnostic software, designing experiments, analyzing and interpreting data, crafting custom tools, and presenting data to customers both inside and outside Micron. Apply AI-enabled tools (e.g., data analytics, automation, or Copilot-based solutions) to improve system-level validation, failure analysis, and engineering productivity. On occasion, you may need to carry out these responsibilities at the customer site. We will work with colleagues in the Systems Compatibility Group, in Application Engineering Groups, Product Engineering, Return Material Authorization (RMA), and throughout Micron! Education: Bachelor’s Degree in Electrical Engineering, related field of study, or equivalent experience Successful candidates for this position will have: Familiarity with DRAM and System operations Good understanding system level debug Good multi-tasking, teamwork and problem solving skills Strong verbal and written communication skills in English Preferred Skills and Experience with: Application engineering or design experience related to memory testing and
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description: As a Mixed-Signal Design Engineer in Micron’s Pathfinding Design Team, you will play a key role in crafting next-generation memory technologies. This position involves contributing to defining, developing, and analyzing high-speed logics to operate the memory. These paths span from the memory array to the interface block for memory technologies, including DRAM and emerging memories. You will work on novel concept development, circuit simulation, optimization, and floor planning to enable groundbreaking memory solutions! Responsibilities: Provide technical direction and design implementation for a memory control circuits (both of digital and analog) from the memory array to the interface block. Collaborate closely with physical design teams to ensure timing closure, CDC robustness, and power intent alignment. Demonstrated experience working with custom mixed-signal IC build and development for volatile or nonvolatile memory technology. Experience with modeling and simulation of ICs using HSPICE/finesim. Minimum Qualifications: Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or related field. 7+ years of experience in custom mixed-signal circuit design. Proficiency with UNIX and CADENCE design environment (Simulation, Schematic entry, SPF extraction) </
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Own and execute functional verification for block‑level and full‑chip designs from specification through tape‑out Develop, execute, and maintain verification plans , test strategies, and coverage models based on design specifications Architect, develop, and maintain SystemVerilog / UVM‑based testbenches , test vectors, and assertions Run directed and constrained‑random simulations and debug functional failures to root cause Drive coverage closure (functional, code, and assertion coverage) and identify verification gaps Work closely with design engineers to understand RTL, review specifications, and resolve design issues Provide verification status updates , summaries, and risk assessments to project stakeholders Collaborate with cross‑functional teams including design, validation, product engineering, and methodology teams across global sites Contribute to the development and improvement of verification tools, flows, and methodologies Provide verification support to design projects by simulating, analyzing and debugging pre-silicon full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products. Co-w
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Understand design specifications and define verification scope, strategy, and plans for block/chip RTL verification Develop, execute, and maintain verification testbenches and test vectors using digital simulation tools and methodologies (SV-UVM) Run directed and constrained-random tests and regressions; analyze results and triage failures. Close verification metrics (functional coverage / code coverage as applicable) and identify verification holes to demonstrate readiness toward tapeout Provide verification support to design projects by simulating, analyzing, and debugging block level RTL. Develop Test cases/Stimulus to increase the functional coverage for all DRAM architectures and features. Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design. Debug RTL / testbench / environment issues and partner with design engineers to identify root cause, propose fixes, and prevent recurrence. Provide verification status and summaries to stakeholders; communicate risk clearly and drive action closure. Good understanding of digital circuits and experience in RTL Verification. Understand the usage of tools like Virtuoso, Xcellium, Simvision, Verdi/Verisium. Hands on experience in buildin
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