Dram Design Validation Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in artificial intelligence possible! We do it all while committing to integrity, sustainability, and giving back to our communities, because doing so can fuel the very innovation we are pursuing. As a process integration engineer in the DRAM organization, you will be part of a team of world-class engineers who are working in an industry leading 300mm R&D facility on technology which enables future memory scaling. You will focus on the performance and manufacturability of Micron’s cutting-edge next-generation memories. Areas of concentration will include integration and circuit issues specific to DRAM technology. In addition to a broad basis of process integration knowledge, this position will require a strong background in semiconductor device physics. Role interacts significantly with the process development, simulation, modeling, characterization, and reliability groups. Responsibilities include, but not limited to: Lead technology integration activities in enabling manufacturability of state-of-the-art DRAM technology Engage with numerous cross-functional teams including process development, product engineering, design, yield improvement, advanced mask and probe to arrive at solutions to

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron Technology, we transform how the world uses information to enrich life for all. The Heterogeneous Integration Group (HIG) HBM Architecture team develops next-generation High-Bandwidth Memory (HBM) solutions that power AI, high-performance computing, cloud infrastructure, and advanced networking systems. The team works across architecture, design, verification, packaging, product engineering, and technology development to evaluate innovative memory architectures and deliver scalable, high-performance semiconductor solutions. As an HBM Design Architect, New College Graduate, you will contribute to the evaluation and development of future HBM and DRAM architectures. Working with experienced architects and engineering teams, you will analyze system and block-level design tradeoffs related to performance, power, area, thermal behavior, reliability, and manufacturability. This role provides an opportunity to leverage AI, Large Language Models (LLMs), and data-driven engineering methodologies to accelerate architecture exploration and improve decision-making. Responsibilities Analyze HBM and DRAM architectures using analytic

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Ready to join a growing team!!! Micron Technology’s vision is to transform how the world uses information to enrich life and our dedication to people, innovation, tenacity, teamwork, and customer focus allows us to fulfill our mission to be a global leader in memory and storage solutions. This means conducting business with integrity, accountability, and professionalism while supporting our global community. We are the only company manufacturing today's major memory and storage technologies: DRAM, NAND and Emerging memory. We are looking for an energetic, ambitious, individual with strong work ethic and integrity to join us as the Scribe Design Senior Engineer. The Scribe Design Non-Array (SDNA) team is responsible for the design, layout, and verification of CMOS electrical test structures that enable CMOS device development, Compact modeling, Reliability modeling and Fab process monitoring. In this role you will work with a group of Engineers in India, Japan, and the US. As part of a global team, you will contribute to physical layout, floor planning and verifying through DRC and in-house verification tools. This role will allow you to work on all technology types at Micron. Responsibilities and Tasks include, but are not limited to: Proactively identify problem areas for improvement, propose, and develop innovative solutions. Continuously evaluate and implement new tools and technologies to improve the current automation flows. Demons

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron has an opening for a Photolithography Engineer (Level 2 or 3) at our Boise, Idaho facility. This position is part of Micron’s Technology Development organization, where advanced ideas become manufacturable technologies. Our team works at the leading edge of memory innovation, partnering across design, integration, manufacturing, and equipment suppliers to enable the next generation of semiconductor devices. This is where curiosity, experimentation, and impact come together. As a Photolithography Engineer, you will play a key role in developing and integrating lithography processes that directly shape future memory technologies. You will work hands-on with tools, materials, layouts, and data, while leveraging Artificial Intelligence and other software, collaborating with global partners to move innovations from R&D into high-volume manufacturing. This role offers broad technical exposure and the opportunity to influence device performance, yield, and cost at scale. Responsibilities: Develop and integrate photolithography unit processes for advanced memory technologies Perform material evaluations, reticle, and layout development, OPC, overlay optimization, and process window analysis Drive yield improvement, failure analysis, and device performance optimization Partner with equipment vendors to evaluate tools and improve process capability Document processes, communicate results, and support technology transfer to manufacturing Leverage Artifi

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) sits within the Technology and Products Group (TPG). We are developing High Bandwidth Memory (HBM) solutions for AI and ML applications! We stack multiple DRAM chips on a high-speed memory controller using TSV (Through Silicon Via) technology, dramatically increasing memory density and bandwidth. Our designs span custom digital and RTL2GDS flows, and we are targeting the lowest power per bit in the industry. Micron’s High Bandwidth Memory (HBM) Design Verification team is responsible for ensuring the functionality, performance, and quality of next‑generation memory products that enable advanced computing applications. As a Senior Design Verification Engineer, you will collaborate closely with design, architecture, and product engineering teams to verify complex, high‑density DRAM circuits and deliver robust, production‑ready designs. This role combines deep technical verification expertise with cross‑functional collaboration in a global environment. You will be challenged by the complexity and difficulty of verifying high density memory chips (up to 32Gb) with huge scale of circuit capability (over 4M transistors), ultra-high speed designs, sophisticated functionality which includes next Generation DDR/LPDDR (ex: DDR5, LPDDR5) and advanced low power and power management technologies. You will be responsible to evaluate the functionality and performance of the Full-chip and block-level circuit designs using different verification tools, techniques, and strategies. In addition, you will also n

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities: Contribute to the development of new product opportunities by assisting with the overall design, layout, and optimization of DRAM Memory array/Peripheral Logic/Analog circuits Actively leverage AI‑based tools, agentic workflows, and automation frameworks to: Accelerate schematic optimization and design‑space exploration Assist in parasitic analysis, sensitivity studies, and corner coverage Improve debug efficiency across simulation and silicon learning loops Define semicustom methodology for memory design Collaborate with CAD, EDA, and software teams to integrate AI‑driven flows into simulation, verification, and design sign‑off environments. Oversee and manage the layout process including floor-planning, placement, and routing Perform circuit-level verification including functional, timing, power and reliability analysis using industry standard and Micron-specific simulators and tools. Contribute to cross-group communication to work towards standardization and group success Drive innovation into the future memory generations and design methodology within a dynamic work environment Minimum Qualifications Master’s degree in electrical or computer engineering with 4-8 years of experience in memory design. Strong fundamentals in CMOS circuit design, device physics and memory operation. Experience with SPICE-based simulation and parasitic extraction. </

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron's Design-Technology Co-Optimization (DTCO) team plays a critical role in bridging semiconductor device technology and circuit design to enable next-generation DRAM products. The team evaluates emerging technologies, develops methodologies for performance assessment, and contributes to early design enablement activities that influence product power, performance, and area (PPA). Through close collaboration with device, process, modeling, and design engineering teams, DTCO helps guide technology development decisions that shape future memory solutions. As a DTCO Intern, you will gain hands-on experience evaluating advanced DRAM technologies and assessing their impact on future product architectures. You will use industry-standard electronic design automation (EDA) tools, perform circuit simulations and benchmarking, and apply data analysis techniques to support technology development decisions. This position provides an opportunity to work alongside world-class engineers while developing technical skills in semiconductor technology, circuit design, and AI-enabled automation workflows. Responsibilities Evaluate emerging DRAM technologies and analyze their impact on future product architectures and design tradeoffs. Perform transistor-level simulations and circuit benchmarking using industry-standard EDA tools such as HSPICE and FineSim. Develop and utilize Claude AI-based automation workflows and data analysis processes to improve simulation efficiency and engineering productivity. <li

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron is a global leader in DRAM technology, driving innovation that enables the next generation of computing, artificial intelligence, and data-driven applications. The DRAM Technology Development organization focuses on advancing semiconductor manufacturing capabilities through collaborative research, process innovation, and technology scaling. Team members work across multiple engineering fields to develop breakthrough memory solutions that shape the future of the industry. As a Process Integration Engineer, you will contribute to the development of next-generation DRAM technologies by collaborating with process, materials, device, and design engineering teams. This role is responsible for coordinating module-related development activities, defining technical requirements, resolving complex integration challenges, and supporting the successful execution of technology development programs. The ideal candidate will possess strong semiconductor process integration knowledge and a passion for advancing future memory architectures within a fast-paced R&D environment. Responsibilities Define technology landmarks, design rules, structural and electrical specifications, and integration requirements for next-generation DRAM products. Collaborate with multi-functional teams including simulation, process development, process architecture, circuit design, and quality engineering to achieve technical objectives and project timelines. Lead module-related integration activities, identify techni

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary Micron is seeking a Senior Digital Design Engineer to contribute to the development of advanced DRAM digital and mixed-signal blocks. This role is responsible for RTL design, implementation, synthesis, timing analysis, power optimization, and design quality throughout the RTL-to-GDS flow. The engineer will collaborate with architecture, verification, and physical design teams to deliver high-performance, power-efficient designs that meet product specifications and PPA (Power, Performance, Area) objectives for next-generation memory products. Responsibilities Design, develop, and deliver RTL for complex DRAM digital and mixed-signal blocks, ensuring alignment with product specifications and performance targets. Perform front-end design quality checks including linting, CDC/RDC analysis, logic synthesis, timing constraint development, and timing closure activities. Collaborate with architecture, verification, and physical design teams to optimize power, performance, area (PPA), and overall design quality. Develop and maintain synthesis and timing constraints (SDC), analyze timing reports, and drive timing closure across multiple operating scenarios. Improve design methodologies, automation, and RTL-to-GDS flows to enhance development efficiency, design quality, and time-to-market. Minimum Qualifications Master’s degree in Electrical Engineering (or equivalent) with 4&#43; years of experience, or Bachelor’s degree with 5&#43; years

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary Micron is seeking a Senior Digital Design Engineer to contribute to the development of advanced DRAM digital and mixed-signal blocks. This role is responsible for RTL design, implementation, synthesis, timing analysis, power optimization, and design quality throughout the RTL-to-GDS flow. The engineer will collaborate with architecture, verification, and physical design teams to deliver high-performance, power-efficient designs that meet product specifications and PPA (Power, Performance, Area) objectives for next-generation memory products. Responsibilities Design, develop, and deliver RTL for complex DRAM digital and mixed-signal blocks, ensuring alignment with product specifications and performance targets. Perform front-end design quality checks including linting, CDC/RDC analysis, logic synthesis, timing constraint development, and timing closure activities. Collaborate with architecture, verification, and physical design teams to optimize power, performance, area (PPA), and overall design quality. Develop and maintain synthesis and timing constraints (SDC), analyze timing reports, and drive timing closure across multiple operating scenarios. Improve design methodologies, automation, and RTL-to-GDS flows to enhance development efficiency, design quality, and time-to-market. Minimum Qualifications Master’s degree in Electrical Engineering (or equivalent) with 4&#43; years of experience, or Bachelor’s degree with 5&#43; years

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has transformed innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are redefining how the world uses information to enrich life. We are looking for Layout Build engineer at our Micron Technology’s DRAM Team in Guadalajara, Mexico. As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high performance computing solution, High Bandwidth Memory. As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment. Responsibilities: Build and development of analog, mixed-signal, custom digital block and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, quality check and documentation. Responsible for timely delivery of block-level layouts with acceptable quality. Will bee leading planning, area/time estimation, scheduling, delegation and execution to meet project schedule/achievements in multiple project environment. Optimally copresentingith Global engineering teams to assure the success of layout project. Minimum Qualification: Around 5 years of experience in analog/custom layout design in sophisticated CMOS process, in various technology nodes (Planar, FinFET). <

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities: Contribute to the development of new product opportunities by assisting with the overall design, layout, and optimization of DRAM Memory array/Peripheral Logic/Analog circuits Actively leverage AI‑based tools, agentic workflows, and automation frameworks to: Accelerate schematic optimization and design‑space exploration Assist in parasitic analysis, sensitivity studies, and corner coverage Improve debug efficiency across simulation and silicon learning loops Define semicustom methodology for memory design Collaborate with CAD, EDA, and software teams to integrate AI‑driven flows into simulation, verification, and design sign‑off environments. Oversee and manage the layout process including floor-planning, placement, and routing Perform circuit-level verification including functional, timing, power and reliability analysis using industry standard and Micron-specific simulators and tools. Contribute to cross-group communication to work towards standardization and group success Drive innovation into the future memory generations and design methodology within a dynamic work environment Minimum Qualifications Master’s degree in electrical or computer engineering with 4-8 years of experience in memory design. Strong fundamentals in CMOS circuit design, device physics and memory operation. Experience with SPICE-based simulation and parasitic extraction. </

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an HBM Memory Design Engineer in Micron’s HBM Architecture Team, you will design, simulate, analyze, and floorplan digital and analog DRAM circuits used in advanced HBM technology. You will evaluate block-level and full-chip functionality, perform architectural pathfinding, and contribute to the development of next‑generation high‑bandwidth DRAM solutions. This role works across diverse engineering teams to deliver functionally accurate, low‑power, and high‑performance HBM products by bringing to bear 3D stacking and TSV-based integration. Responsibilities • Design, simulate, and optimize digital and analog DRAM circuits including data path, ECC, command/control, and high‑speed timing structures • Evaluate full‑chip and block‑level functionality and propose solutions to achieve correct circuit and system behavior • Perform timing, area, power, and complexity analysis for high‑speed DRAM and mixed‑signal circuits • Conduct pathfinding studies and feasibility analyses for future HBM architectures • Contribute to the development, layout, and optimization of memory, logic, and analog circuits • Analyze circuit behavior under varying PVT and parasitic conditions to ensure robust operation • Collaborate with multi-functional teams across build, verification, product engineering, process, and packaging • Support design reviews, documentation, and continuous improvement of design methodologies Minimum Qualifications • BSEE with 7&#43; years, or MSEE with 5&#43; years of releva

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary At Micron Technology, we are looking for a Senior RTL Engineer to build and develop DRAM digital and mixed-signal blocks for advanced memory products. In this role, you will support the RTL lifecycle from specification and implementation to signoff. You will collaborate with multi-functional teams to develop high-quality builds that meet power, performance, and area (PPA) targets. This position is based in Boise, Idaho, within a collaborative and innovative engineering environment. Responsibilities Contribute to RTL build of digital and mixed-signal components for DRAM using RTL-to-GDS flows. Implement and document high-performance, power- and area-efficient RTL designs meeting product specifications. Perform front-end quality checks including lint, CDC/RDC, synthesis, UPF, and timing QoR. Collaborate closely with physical design and implementation teams to achieve timing closure and PPA goals. Apply power-, clock-, and implementation-aware RTL design practices to minimize silicon risk. Minimum Qualifications Master’s degree in Electrical Engineering with 4&#43; years of experience, or Bachelor’s degree with 5&#43; years of pre-silicon RTL design experience. Demonstrated experience developing RTL for complex digital IP from specification through implementation handoff. Hands-on experience with ASIC low-power design methodologies, including UPF-based power intent and CDC/RDC analysis. Strong knowledge of ASIC design flows, including RTL design, logi

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary As a DRAM Architect, you will optimize DRAM solutions for power, performance, and cost while pioneering new memory features and system-level innovations. You will collaborate with global, multi-functional teams to deliver high-quality, reliable, and power-efficient DRAM solutions that meet aggressive performance and time-to-market goals. Responsibilities: Develop comprehensive DRAM system/component solutions, specifications, and methodologies to optimize DRAM performance, power efficiency, and cost. Collaborate with multi-functional teams to brainstorm and implement innovative ideas, assess solution efficiency, and make necessary adjustments. Drive innovation in future memory generations within a dynamic work environment. Analyze system behavior and assess solution effectiveness, make data-driven optimizations and trade-offs. Communicate complex technical concepts to engineers from various backgrounds. Minimum Qualifications: 3&#43; years of proven experience in memory design, product engineering, or system architecture and usage Self-motivated with exceptional problem-solving skills and a drive to discover new solutions. Excellent communication and interpersonal skills. Bachelor’s degree or equivalent experience in Electrical Engineering, Computer Engineering, or a related field. <