Dram Technology Sr Layout Design Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Lead Principal Engineer, Layout Design at Micron, you will be at the forefront of developing groundbreaking memory solutions! This role is an outstanding opportunity to lead the physical implementation of modern DRAM and mixed-signal circuits, turning schematics and specifications into flawless, manufacturable layouts. You will collaborate with a world-class team of Circuit Designers, Verification Engineers, CAD/Methodology experts, Process Integrators, Product Engineers, Test/Probe specialists, Assembly professionals, and Marketing strategists. Together, we will drive cost, quality, reliability, time-to-market, and customer happiness through outstanding layout and build. Key Responsibilities Lead the layout build and physical realization of new memory products. Interpret device and circuit specifications to implement custom layout solutions meeting PPA (power, performance, area) and reliability targets. Develop hierarchical layouts for analog, digital, and memory-array-related circuitry using industry-standard EDA tools. Build block and top-level floorplans optimizing placement, routing resources, signal integrity, power delivery, and manufacturability. Optimize layout for critical metrics such as die size/area efficiency, matching, coupling/noise, and timing. Produce layout collateral and documentation for cross-team integration. Physical Verification and Tapeout Signoff Run and debug physical verification flows and ensure closure using indust

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Manufacturing Development Engineering (MDE) Shift Engineer in Wet Etch/CMP/Bond , you will play a critical role in enabling 24/7 process development for next-generation DRAM technologies within the Wet Etch/CMP/Bond Process Areas. This position operates on a 12-hour rotating shift schedule and serves as the primary engineering decision-maker for development activities occurring during off-hours for one of the three listed areas while also supporting the other two areas as needed. You will work closely with Process Development, Process Integration, Equipment Development, Manufacturing, and Shift Operations teams to ensure uninterrupted development execution, increase learning velocity, and support technology roadmap objectives. Unlike traditional manufacturing shift engineering roles, this MDE Shift Engineer operates in a highly dynamic development environment where process conditions, specifications, and experimental flows frequently evolve. This role requires strong engineering judgment to disposition development wafers, make real-time process decisions, troubleshooting process and equipment issues, and appropriately balance execution needs with development objectives. Responsibilities Serve as the primary off-shift engineering decision-maker for development activities, using sound engineering judgment to disposition wafers, release or hold tools, define actions on development targets, respond to process deviations, handle execution risk

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. UPWARDSサマーインターンシッププログラムの手続き専用ページです ※求人情報ではありませんので応募できません Applying AI About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_japan@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other paymen

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an Intern Product Yield Enhancement (PYE) Engineer at Micron Technology Inc., you will assist in taking next generation DRAM devices from design to mass production! PYE Engineers are crucial partners between Research and Development, Manufacturing, Product Engineering and Global Quality teams. Our goal is to offer hands-on and substantial engineering projects that allow interns to gain valuable experience with memory systems and the product life cycle while adding impact to Micron’s business. Our intern programs help prepare engineers for future roles and offer an extraordinary experience that supplements your academic experience! The PYE Engineering role is critical to Micron as it serves the company's charter to be the most cost-effective producer of DRAM memory while delivering the quality and reliability that customers expect from the Micron brand. This position is for a 3-month internship. Responsibilities: Your job duties will include detailed DRAM electrical and physical failure analysis. Identify defects introduced by the semiconductor fabrication process. You will data mine using statistical analysis, AI assisted engineering tools, and automation workflows. Find the root cause of failure mechanisms, communicating results with Management, Product, Process and Test Engineering teams. Complete 3-month internship. Minimum Qualifications: Must be pursuing a minimum of a bachelor’s degree in Electrical Engineering, Computer Engineering,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Cloud Memory Business Unit (CMBU) is driving the future of memory solutions for cloud computing, AI infrastructure, enterprise systems, and client platforms. We work across engineering, marketing, finance, and operations to deliver industry-leading DRAM innovations that enable next-generation computing experiences. Our team values strategic thinking, customer focus, and collaboration as we bring advanced memory technologies to market. As Director of Product Management, you will lead the strategy, roadmap, and lifecycle management of a global DRAM product portfolio serving hyperscale cloud, enterprise OEM, AI accelerator, and PC markets. This highly visible leadership role will shape Micron’s position in emerging memory technologies and datacenter LPDDR solutions while influencing product direction through customer engagement, market insight, and technology leadership. You will lead a global team of product managers and serve as a key voice for the business with executive leadership, customers, and industry partners. Responsibilities: Define and execute the multi-year product strategy and roadmap for a global DRAM portfolio Own the full product lifecycle, including product planning, stage gate reviews, and end-of-life decisions Lead cross-functional collaboration to deliver products through Micron’s Product Lifecycle Management (

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities: Contribute to the development of new product opportunities by assisting with the overall Verification Activities of DRAM Design Actively leverage AI‑based tools, agentic workflows, and automation frameworks to: Accelerate verification cycle time Assist in Test-Case/TB and various other components required for DRAM Design Verification Improve debug efficiency across simulation and silicon learning loops Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon block level/full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features Develop and maintain test benches / test vectors using simulation tools and run regressions for coverage analysis and improvements using Agentic AI Flow Participate in simulating, analyzing, and debugging pre-silicon full chip designs by applying leading edge verification technique Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design. Participate in developing verification methodology and verification environ

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) within Micron's Technology and Products Group (TPG) leads the development of High Bandwidth Memory (HBM) solutions for AI and ML applications. Our modern designs use Through Silicon Via (TSV) technology. We stack multiple DRAM chips on a high-speed memory controller with a coordinated logic chip in one package. This new way improves memory density and bandwidth through parallelization. It aims to deliver the lowest power per bit solutions in the industry. You will join an inclusive, forward-thinking team dedicated to building technologies that power virtual reality, neural networks, and next‑generation computing. In this role, you will own design for test (DFT) solutions for complex high‑bandwidth memory (HBM) system‑on‑chip (SoC) base‑die designs. Your work will directly enable manufacturability, quality, and successful silicon bring‑up across current and future HBM generations. (LLM) Responsibilities will include, but are not limited to: Own SoC-level DFT structures and their implementation. This includes scan, memory built-in self-test (MBIST), logic built-in self-test (LBIST) where applicable, boundary scan (JTAG), and test access architectures for HBM base-die builds. Define and drive DFT architecture early in the design cycle, ensuring alignment with SoC integration, floorplanning, timing, power, and physical design requirements. Implement and integrate DFT logic at block, s

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary Micron is seeking a Principal Physical Design Engineer to provide technical leadership for advanced DRAM digital design implementation and signoff methodologies. This role will drive physical design execution from RTL through tapeout, with a strong focus on timing closure, power integrity, EMIR analysis, and design reliability. The engineer will collaborate across architecture, RTL, implementation, CAD, and technology teams to develop scalable physical design solutions that achieve power, performance, area (PPA), and reliability targets for next-generation memory products. Additionally, this individual will lead methodology innovation, mentor engineers, and influence the future roadmap for physical design and power integrity across the organization. Responsibilities Lead physical design implementation of complex DRAM digital designs, including floorplanning, place and route, clock tree synthesis, timing closure, and tapeout activities. Drive power integrity strategies and signoff methodologies, including PDN planning, IR drop analysis, electromigration (EM) verification, and EMIR signoff. Collaborate with multi-functional teams to resolve timing, congestion, power, signal integrity, and reliability challenges at both block and full-chip levels. Develop and deploy methodology improvements, automation solutions, and guidelines to improve build quality, efficiency, and scalability. Mentor engineers and provide technical leadership while influencing future memory products t

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Introduction The Central Process Integration Engineering (cPIE) Loop Integration team drives process optimization, defect reduction, structural performance improvement, and technology integration across Micron's advanced DRAM and HBM manufacturing network. We are ready for the future! The team serves as the technical owner of critical process loops including FEOL, MOL, CAP, BEOL, Uniformity, and Backside Engineering, partnering closely with Process Engineering, Yield Engineering, RDA, Manufacturing, and Technology Development teams to accelerate yield learning and qualification readiness! Position Overview As a Senior Process Integration Engineer, you will own process loop performance across one or more critical semiconductor manufacturing modules. You will identify process interactions, drive yield improvement, characterize failure mechanisms, and enable successful deployment of new technologies from development through high-volume manufacturing. This role provides opportunities to influence process architecture, conversion strategies, inline monitoring systems, and technology ramp execution while collaborating with global engineering teams across multiple sites. In support of Micron's AI transformation, you will be expected to harness Artificial Intelligence tools and advanced analytics to improve engineering productivity, accelerate problem solving, and enhance process understanding. Responsibilities Drive process loop performance and structural optimization for assigned

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities Verify IP, subsystem, full-chip, and system-level HBM and DRAM designs to ensure functional correctness, performance, power efficiency, and product quality. Develop comprehensive verification plans from architecture and functional specifications in collaboration with architecture and design teams. Create, enhance, and maintain verification environments, UVM testbenches, test suites, and automated regression infrastructures. Define and execute coverage-driven verification strategies to achieve functional, assertion, and code coverage goals. Lead debug and root-cause analysis of complex design issues, drive bug resolution, and ensure verification closure. Apply advanced digital and mixed-signal verification methodologies using industry-standard simulation and verification tools. Drive continuous improvements in verification methodologies, automation, regression efficiency, and AI-assisted verification workflows. Collaborate closely with global design, architecture, product engineering, and system engineering teams to ensure successful project execution. Lead verification efforts for major HBM development programs and mentor engineers through technical leadership and knowledge sharing. Minimum Qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience. 10+ years of experience in digital and/or mixed-signal design verification with a proven record of deli

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) within Micron's Technology and Products Group (TPG) leads the development of High Bandwidth Memory (HBM) solutions for AI and ML applications. Our modern designs use Through Silicon Via (TSV) technology. We stack multiple DRAM chips on a high-speed memory controller with a coordinated logic chip in one package. This new way improves memory density and bandwidth through parallelization. It aims to deliver the lowest power per bit solutions in the industry. As a Static Timing Analysis (STA) Engineer — you will be part of the Heterogeneous Integration Group (HIG), owning chip-level timing sign-off for next-generation die. You will work closely with RTL design, physical design, architecture, DFT, verification, and product teams to ensure timing integrity and drive timing closure across all modes and corners from initial design through tape-out. This is a hands-on senior technical role focused on chip-level STA ownership, constraint authoring, timing closure, methodology development, and pre-/post-silicon timing correlation. Key Responsibilities Responsibilities will include, but are not limited to: Own end-to-end chip-level static timing analysis and sign-off across all checks, modes, corners, and voltage and temperature conditions. Develop, maintain, and validate sign-off quality Synopsys Design Constraints (SDC) for clocks, resets, high-bandwidth memory (HBM) interfaces, design for test (DFT), and configuration logic.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an Analog Verification Engineer at Micron Technology, Inc., you will help shape advanced analog verification methodologies for next-generation DRAM products. In this role, you will develop scalable verification solutions, improve coverage and efficiency, and contribute to high-quality silicon through innovation, automation , and close collaboration with design teams. Experience with reliability verification methodologies is a strong plus, but not a requirement; candidates with solid analog verification expertise and a willingness to grow in reliability-focused verification are encouraged to apply. Our team vision is a continuing desire to develop your skills working in an inclusive diverse environment of multicultural Teams across worldwide geographies! Enabling the creative career path, you deserve with a collaborative environment and groundbreaking technology and growing upon your imagination and creativity. Responsibilities Define and drive DRAM analog verifi

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. In the Technology Development — Advanced Modeling & AI Solutions (AMAIS) organization, you will be part of a multidisciplinary team developing next-generation Digital Twins, predictive modeling solutions, and AI-driven technologies that accelerate advanced memory development and manufacturing excellence. You will create predictive digital representations of semiconductor processes, materials, structures, equipment, and products across DRAM, NAND, and advanced packaging technologies including HBM. Leveraging physics-based modeling, computational methods, machine learning, GenAI, large language models (LLMs), and agentic AI frameworks, you will enable technology co-optimization, design-space exploration, process optimization, yield improvement, and accelerated technology learning. Working at the intersection of engineering fundamentals, manufacturing data, and digital engineering, you will develop scalable predictive and prescriptive solutions that connect process, structure, performance, yield, reliability, and cost. This role offers the opportunity to influence critical technology decisions, drive fab-technology co-optimization , and advance Micron's leadership in data-driven semiconductor memory innovation. Qualifications: Independence – be comfortable executing activities and needs Experience in algorithm development, numerical methods, and scientific computing Solid experience with Plasma, FPM, HAR etching, and MC modeling Experience with Wet Pr

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) within Micron's Technology and Products Group (TPG) leads the development of High Bandwidth Memory (HBM) solutions for AI and ML applications. Our modern builds use Through Silicon Via (TSV) technology. We stack multiple DRAM chips on a high-speed memory controller with a coordinated logic chip in one package. This new way improves memory density and bandwidth through parallelization. It aims to deliver the lowest power per bit solutions in the industry. As a Design Engineer at Micron Technology, Inc., you will be responsible for designing and analyzing digital and analog circuits used in the development of memory products. We are engaged in developing groundbreaking silicon-to-systems solutions – right from technology development and advanced memory designs to product development, systems design and validation resulting in world class memory solutions. In this position, you will collaborate with Micron’s various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction. You will contribute to the design and delivery of next‑generation memory products by working across circuit design, layout, and validation. You will apply simulation, modeling, and verification skills to improve

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) within Micron's Technology and Products Group (TPG) leads the development of High Bandwidth Memory (HBM) solutions for AI and ML applications. Our modern builds use Through Silicon Via (TSV) technology. We stack multiple DRAM chips on a high-speed memory controller with a coordinated logic chip in one package. This new way improves memory density and bandwidth through parallelization. It aims to deliver the lowest power per bit solutions in the industry. Micron is seeking a Design Infrastructure Engineer to build, enable, and scale characterization infrastructure and deliver generated IP to multiple advanced memory and logic developments. This position includes characterizing both standard and custom cells across various process technologies. These encompass Micron internal nodes as well as external foundries, such as TSMC. The position supports multiple HBM product lines, including HBM DRAM dies, Logic dies (JEDEC and custom variants), and advanced 3D HBM architectures. You will work where circuit build, EDA infrastructure, and silicon validation readiness meet. You will develop robust, scalable, and high-quality characterization flows. These flows directly affect timing closure, power modeling, and product quality for next-generation HBM programs. Responsibilities: Develop and sustain scalable infrastructure for standard cell and custom cell characterization, encompassing timing, power, noise, and signal integrity modeling. Build reusable, a