Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s DRAM Technology Development group, where engineers operate at the leading edge of semiconductor process and product innovation. This role sits at the intersection of process technology, product requirements, and manufacturing execution, and is critical to enabling next generation DRAM technology. As a Principal Node Development Product Engineer, you will play a technical role in driving product readiness through close engagement with process integration, device, yield, test, design, and manufacturing teams. You will own deep process‑aware product knowledge, identify node‑specific risks, and translate silicon behavior into actionable decisions that ensure robust, scalable next generation DRAM products. Responsibilities Serve as a technical contributor during development stage of next gen DRAM! Drive process‑aware product optimization, identifying sensitivities, interactions, and integration risks Analyze silicon data (electrical, parametric, yield, reliability) to identify systematic process or integration limiters Partner with design, process integration, test, and device teams to debug yield and performance issues and converge on root cause Collaborate closely with manufacturing and TD to enable smooth node readiness, learning cycles, and factory ramp Translate process changes into product impact assessments, including PPA, yield, reliability, and test coverage Guide test content and monitoring strategies to ensure early detection of process
Jobiba hiring network
Dram Technology Sr Layout Design Engineer Jobs
625 active opportunities · Updated for October 2026
Fresh results
15 shown
Explore current dram technology sr layout design engineer jobs. Use filters to narrow by work mode, employment type, experience and date posted.
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s Compute and Memory Business Unit (CMBU), where we shape how memory powers the world’s most demanding computing platforms. Our team works at the intersection of advanced DRAM technology, system architecture, and emerging AI workloads. We collaborate closely with customers, partners, and internal R&D teams to influence the future of memory-centric system design—and we have a lot of fun doing it! As a Product Architecture Engineer for DRAM, you will play a key role in defining how Micron memory technologies enable AI training and inference platforms. This role blends deep technical exploration with industry engagement and internal collaboration. You will help translate system-level challenges into differentiated DRAM solutions while influencing both customer designs and Micron’s product roadmap. Responsibilities : Explore and evaluate system architectures using modeling, simulation, and prototyping tools Engage customers and partners to identify system bottlenecks and future memory innovations Pathfind AI-focused architectures using LPDDR and DDR DRAM technologies Define and explore DRAM features that increase value in AI and high-performance systems Mentor and coach junior architects and engineers Minimum Qualifications : Bachelor’s degree in Electrical Engineering or equivalent practical experience 10+ years of experience in product engineering or product archit
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s advanced lithography organization, where we tackle some of the most complex patterning challenges in semiconductor manufacturing. Our team works at the intersection of process technology, automation, and data, helping shape how next‑generation memory devices are built worldwide. If you enjoy solving hard technical problems and seeing your work scale globally, this is the place to do it! As a Photolithography Overlay Engineer, you will play a key role in advancing overlay and patterning through analysis and data-driven solutions. This role offers hands-on technical impact today, while also influencing Micron’s long-term overlay roadmap. You will collaborate closely with process engineers, automation experts, and vendors to bring new ideas from development into high-volume manufacturing. Responsibilities: Define and maintain overlay control strategies for advanced DRAM technology nodes. Develop alignment and overlay roadmaps to achieve target overlay specifications. Evaluate and deploy new overlay methodologies using modern tools like AI, including feedforward, feedback, NZO correction, and advanced scanner modeling. Optimize overlay performance through sampling plans, control models, and scanner correction capabilities. Document and standardize overlay methods across technologies and global sites. Collaborate with internal teams and vendors to improve photo overlay system Develop so
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Additional Responsibilities Align TDT CMOS Device development and transfer objectives with Technology Development sites. Drive and ensure close collaboration with Design, TCAD, Modeling, and Product Engineering groups across Micron sites. Collaborate with process integration module owners and process owners to drive electrical characterization of CMOS devices and CMOS circuits and identify device improvement opportunities. Utilize technology development and transfer knowledge to develop new technology nodes to mature manufacturing capability while achieving key program metrics. Ensure CMOS devices meet electrical, performance, power, variability, and reliability targets required for product success. Drive close collaboration with device and process integration development groups at other Technology Development sites. Collaborate closely with manufacturing fabs to facilitate successful technology transfer and production ramp. Contribute to the fundamental understanding of CMOS technology and its impact on overall product figures of merit. Lead cross-functional exploration and development of future CMOS device architectures, including non-planar transistor technologies, by partnering with Device, TCAD, Process Integration, Design, and Manufacturing teams to enable future DRAM technology roadmaps. Drive adoption of AI, machine learning, advanced analytics, and engineering automation solutions to accelerate technology development, r
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a DRAM Design Engineering Group at Micron Technology, Inc. you will be responsible for translating schematics into layout used for the creation of fabrication reticules. You will be required to meet all engineering and process related criteria needed for an assigned DRAM product. You will organize and prioritize logistics and resource allocations to meet scheduled deadlines, and proactively develop methodologies for issue resolution. In this role you will work with Design and other engineering groups to apply multiple layout techniques for the design and verification of digital and analog circuits. You will be expected to understand various circuit design protocols, different fab processes, mask generation techniques, and tapeout processes and procedures. Responsibilities: Responsible for Design and development of IP layouts used in DRAM chips. Perform layout verification like LVS/DRC/EM, quality check and documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/breakthroughs in multiple project environment. Contribute to effective project-management. Plan and detail your layout, presenting material for global teams to review Optimally connect with engineering teams in India, Japan the US, and other global teams to ensure the success of the layout project. Minimum Qualifica
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a TCAD Engineer in the DRAM Device Technology group at Micron Technology, Inc., you will work with an industry-leading team to model, simulate, and understand advanced semiconductor devices and processes for future memory products. You will be responsible for physics-based device simulation, supporting technology development by providing quantitative insight into device behavior, variability, and reliability through TCAD tools. Responsibilities and Tasks Develop and apply TCAD simulations to analyze advanced semiconductor devices including DRAM access devices, CMOS devices, diodes, and resistive elements. Build 2D/3D device structures, define physical models (transport, recombination, traps, mobility, quantum effects, etc.), and perform parametric studies to support device and process development. Correlate TCAD simulation results with electrical characterization data to clarify physical mechanisms behind performance, variability, and reliability trends. Investigate impacts of process variations, material properties, defects, and interface states on device characteristics. Support development teams
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our DRAM and Cell Technology team is focused on advancing memory innovation through the development of next-generation DRAM cell and device technologies. We work across disciplines to solve complex technical challenges, improve product performance, and enable future memory scaling. Join a collaborative team that is shaping the future of information technology through breakthrough memory solutions. As a DRAM Device & Cell Technology Engineer, you will play a key role in defining and optimizing next-generation DRAM architectures and technologies. You will contribute to device and cell development, lead experimental investigations, and partner with cross-functional teams to improve performance, reliability, and scalability. This is an opportunity to work on leading-edge memory technology and influence future product roadmaps. Responsibilities: Develop DRAM cell and access device technologies to improve density, retention, and disturb immunity Design and execute silicon experiments; perform electrical characterization, data analysis, and interpretation Analyze array-level behavior and collaborate with circuit teams to optimize operating conditions and sequences Partner with cross-functional teams to ensure developed solutions are scalable and manufacturable Contribute to technology roadmaps through benchmarking, technical evaluation, and strategic recommendations Minimum Qualifications: M.S. or Ph.D. in Electrical Engineering, Materials Science, Applied Physics, or a re
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology’s DRAM and Emerging Memory Group (DEG) is a distributed team of engineers and innovators focused on advancing next-generation memory technologies. For more than 43 years, Micron has been a leader in semiconductor innovation, delivering solutions that power applications ranging from artificial intelligence and high-performance computing to immersive digital experiences. The team is committed to innovation, integrity, sustainability, and meaningful community impact while driving the future of memory technology. As an HBM Memory Design Engineer, you will design, analyze, and optimize digital, analog, and memory circuits used in High Bandwidth Memory (HBM) products. You will collaborate with global design, verification, and product teams to develop high-performance DRAM solutions that meet manufacturability, reliability, and performance objectives. This role provides the opportunity to contribute to innovative memory technologies supporting AI, HPC, and data-centric applications. As part of Micron’s AI-Enabled workforce transformation, you will leverage AI-Assisted tools and data-driven methodologies to improve engineering productivity, accelerate design analysis, enhance decision-making, and drive innovation throughout the product development lifecycle. Responsibilities Design, analyze, and optimize memory, logic, and analog circuits for HBM products, including support for layout, validation, and tape-out activities. Perform circuit verification, parasitic modeling, and design simulations
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology’s DRAM and Emerging Memory Group (DEG) is a distributed team of engineers and innovators focused on advancing next-generation memory technologies. For more than 43 years, Micron has been a leader in semiconductor innovation, delivering solutions that power applications ranging from artificial intelligence and high-performance computing to immersive digital experiences. The team is committed to innovation, integrity, sustainability, and meaningful community impact while driving the future of memory technology. As an HBM Memory Design Engineer, you will design, analyze, and optimize digital, analog, and memory circuits used in High Bandwidth Memory (HBM) products. You will collaborate with global design, verification, and product teams to develop high-performance DRAM solutions that meet manufacturability, reliability, and performance objectives. This role provides the opportunity to contribute to innovative memory technologies supporting AI, HPC, and data-centric applications. As part of Micron’s AI-Enabled workforce transformation, you will leverage AI-Assisted tools and data-driven methodologies to improve engineering productivity, accelerate design analysis, enhance decision-making, and drive innovation throughout the product development lifecycle. Responsibilities Design, analyze, and optimize memory, logic, and analog circuits for HBM products, including support for layout, validation, and tape-out activities. Perform circuit verification, parasitic modeling, and design simulations
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has transformed innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are redefining how the world uses information to enrich life. We are looking for Layout Build engineer at our Micron Technology’s DRAM Team in Guadalajara, Mexico. As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high performance computing solution, High Bandwidth Memory. As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment. Responsibilities: Build and development of analog, mixed-signal, custom digital block and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, quality check and documentation. Responsible for timely delivery of block-level layouts with acceptable quality. Will bee leading planning, area/time estimation, scheduling, delegation and execution to meet project schedule/achievements in multiple project environment. Optimally copresentingith Global engineering teams to assure the success of layout project. Minimum Qualification: Around 5 years of experience in analog/custom layout design in sophisticated CMOS process, in various technology nodes (Planar, FinFET). <
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Frontend Central Product Integration Engineering (PIE) team drives leading-edge process capability, best-in-class yield (bits per wafer), high product quality, and rapid time to maturity through innovation and strong cross-functional collaboration. Supporting a global DRAM and NAND technology portfolio across development and manufacturing sites in the U.S., Japan, Taiwan, and Singapore, the team ensures consistent execution of manufacturing excellence worldwide! As a Frontend Central Process Integration Senior Engineer, you will identify, align, and deploy best-known methods across the global network and develop optimized processes to achieve product maturity and sustainable performance improvement. Responsibilities and Tasks: Drive best-in-class product maturity which includes bits per wafers (yield), product grades (Repair Density and DPM) at the fastest speed and cycle of learning. In depth knowledge of processes across different loops or functions (FEOL, MOL, CELL, BEOL) to identify best optimum process integration solution to achieve the goal, knowledge on product and circuit design will be plus. Collaborate with YE, Device, RDA, Metrology team to resolve top yield issues, develop inline transparency to enable fast yield ramp and minimize excursion. Identify best known method and business process from DRAM/NAND sites and drive for alignment and standardize across network. Travel to Micron sites as necessary for face to face collaboration. </li
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Frontend Central Product Integration Engineering team strives to deliver leading edge process capability, best-in-class bits per wafer (Yield) with highest quality and fastest speed through innovation and collaboration with cross functional team. With the diversity of technology in DRAM/NAND and geography (TD development sites – Boise/Japan, 5 manufacturing sites – US (F6, ID1), Taiwan (OMT), Japan (F15) and Singapore (F10)), Frontend Central PIE team will be responsible to identify best-known-method holistically, align best-known-method timely and implement improvement systematically across the network. As FE Central Process Integration Senior Engineer, you will be responsible to develop best optimum process to achieve product maturity. Responsibilities and Tasks: Drive best-in-class product maturity which includes bits per wafers (yield), product grades (Repair Density and DPM) at the fastest speed and cycle of learning. In depth knowledge of processes across different loops or functions (FEOL, MOL, CELL, BEOL) to identify best optimum process integration solution to achieve the goal, knowledge on product and circuit design will be plus. Collaborate with YE, Device, RDA, Metrology team to resolve top yield issues, develop inline visibility to e
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. This role combines advanced DRAM circuit design with technology development, silicon learning, and yield improvement. We work across Design, Technology Development, Product Engineering, Test, Reliability, Quality, Manufacturing, and other teams to solve challenging memory-design problems and enable future technology generations In this position, you will contribute to the design and optimization of critical DRAM circuitry, including Sense Amplifiers, timing distribution, calibration, and training features. You will influence designs from early process-node development through silicon bring-up and production ramp, using simulation, silicon data, statistical analysis, and automation to improve performance, robustness, yield, and manufacturability Responsibilities: Design, analyze, verify, and optimize memory, logic, and analog circuits, including Sense Amplifiers, timing distribution, calibration, and training features Identify design marginalities and develop circuit- or architecture-level solutions that improve DRAM robustness, performance, scalability, and yield Support new process-node development, qualification, silicon bring-up, yield learning, and production ramp through modeling, simulation, silicon experiments, electrical failure analysis, and statistical analysis Guide layout, parasitic extraction, and modeling activities for Sense Amplifiers and Wordline drivers, including floor planning, placement, routing, signal-margin optimization, and memory-bit interaction Lead technical investigati
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are the R&D DRAM Device and Cell Technology Group at Micron, working at the heart of future memory scaling in an industry‑leading 300mm R&D facility. We explore new device concepts, push the limits of DRAM cell performance, and turn deep physics understanding into manufacturable technology. If you enjoy learning fast, solving hard problems, and collaborating across process areas, this team delivers! In this role, you will play a critical part in defining and validating future DRAM device and cell technologies. As a Device Engineer, you will characterize memory arrays, analyze electrical behavior and failures, and influence process and material decisions that directly impact yield, quality, and performance. Your work will shape the electrical foundation of next‑generation DRAM products. Responsibilities: Define and drive electrical specifications for DRAM, Advanced DRAM and emerging memory technologies, translating product requirements into device-level targets for performance, reliability and scaling Design, implement, and interpret experiments to optimize cell and access device performance. This includes running materials experiment, developing new integration schemes and defining new characterization methodologies Develop physical and electrical models (TCAD and compact modeling) to identify performance, yield and reliability limiters, using advanced materials characterization, device physics insight, and statistical data analysis Creat
Engineer- DRAM, Advanced DRAM and EM Device/Cell Technology — Boise, ID - Main Site. Apply via Workday.
Get new dram technology sr layout design engineer jobs by email
Daily job updates · Unsubscribe anytime