Engineer Hbm Layout in Jalisco

NCG Pathfinding Design Layout Engineer — Jalisco, Mexico. Apply via Workday.

Design Layout Engineer — Jalisco, Mexico. Apply via Workday.

Semiconductor Design Engineer, DRAM — Jalisco, Mexico. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an Optical Proximity Correction (OPC) entry level engineer / technician, you will work in Micron’s reticle data preparation organization to process reticle design data through OPC enabling our Production and R&D fabs to print on wafer using photolithography as intended by the Designers. Your responsibilities will encompass a broad range of teams to ensure inputs and outputs to the tapeout process are accurate and of the highest quality. Interested candidates should be comfortable working across time-zones and interfacing with peers in US, Japan, and India to Passdown and maintain operations around the clock to help Micron improve our speed of development and response times to the needs of our Manufacturing and R&D Fabrication Facilities Responsibilities include, but are not limited to the following: Active participation in OPC production environment as an important part of reducing cycle time for each job requiring collaboration with the Mask and Litho Development teams to advocate the use of best-known methods (BKM) Watch notifications sent by the system, follow up with preliminary investigations, forward key information to appropriate team members and notifications when necessary to keep all aspects of day to day production running efficiently. Interact with a wide range of internal customers and collaborators and effectively communicate with the different groups in the tapeout flow in order to coordinate work load and field preliminary questions, Be able to provide i

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an Optical Proximity Correction (OPC) entry level engineer / technician, you will work in Micron’s reticle data preparation organization to process reticle design data through OPC enabling our Production and R&D fabs to print on wafer using photolithography as intended by the Designers. Your responsibilities will encompass a broad range of teams to ensure inputs and outputs to the tapeout process are accurate and of the highest quality. Interested candidates should be comfortable working across time-zones and interfacing with peers in US, Japan, and India to Passdown and maintain operations around the clock to help Micron improve our speed of development and response times to the needs of our Manufacturing and R&D Fabrication Facilities Responsibilities include, but are not limited to the following: Active participation in OPC production environment as an important part of reducing cycle time for each job requiring collaboration with the Mask and Litho Development teams to advocate the use of best-known methods (BKM) Watch notifications sent by the system, follow up with preliminary investigations, forward key information to appropriate team members and notifications when necessary to keep all aspects of day to day production running efficiently. Interact with a wide range of internal customers and collaborators and effectively communicate with the different groups in the tapeout flow in order to coordinate work load and field preliminary questions, Be able to provide information regarding sta

New College Grad - OPC Production Engineer Technician — Jalisco, Mexico. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we innovate to transform how the world uses information to enrich life. For more than 40 years, we have developed advanced memory and semiconductor technologies that power innovation across industries worldwide. As a DRAM Engineering Group (DEG) Layout Designer at Micron Technology, Inc. you will be responsible for translating schematics into layout used for the creation of fabrication reticules. You will be required to meet all engineering and process related criteria needed for an assigned Dram product. You will organize and prioritize logistics and resource allocations to meet scheduled deadlines and proactively develop methodologies for issue resolution. In this role you will work with Design and other engineering groups to apply multiple layout techniques for the design and verification of digital and analog circuits. You will be expected to understand various circuit design protocols, different fab processes, mask generation techniques, and tape out processes and procedures. Our team vision is a continuing desire to develop your skills working in a Team across worldwide geographies! Enabling the creative career path you deserve with a collaborative environment and groundbreaking technology and growing upon your imagination and creativity. Responsibilities: Develop and optimize IP layouts for DRAM products while ensuring compliance with design, process, and reliability requirements. Perform physical verification activities including DRC, LVS, EM, quality reviews, and documentation

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we are building innovative technology that transforms how the world uses information. As an Engineering Remote Operations Center (EROC) Engineer , you will make a meaningful impact by helping us maintain reliable, efficient, and scalable engineering operations across global environments. You will collaborate with teams worldwide, leverage Microsoft Copilot and AI-enabled technologies, and continuously develop your technical expertise while driving operational excellence. Join us and help build the future of engineering operations! Responsibilities: Monitor infrastructure, applications, and operational dashboards to maintain system health, improve availability, and quickly identify potential issues. Troubleshoot incidents, perform root cause analysis, and collaborate with global teams to drive timely resolution and continuous improvement. Support ticket triage, SLA compliance, workload management, and operational readiness across engineering environments. Leverage Microsoft Copilot, Generative AI, automation, analytics, and intelligent monitoring tools to improve efficiency and enhance knowledge management. Create, maintain, and continuously improve technical documentation, SOPs, and operational processes that enable consistent service delivery. Minimum Qualifications: Bachelor's degree in computer science, Information Technology, Engineering, or a related technical field. (No more than 2 years of graduated). Proficiency in Linux and

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. SUMMARY: At Micron , we are transforming how the world uses information to enrich life for all. As a Layout Design Engineering Intern, you will contribute to the development and verification of selected IP layout cells used in memory products. Working alongside experienced layout engineers, you will gain hands-on experience with industry-standard layout methodologies and participate in key activities such as floorplanning, placement, routing, and physical verification. You will also have the opportunity to develop automation solutions that improve engineering productivity, design quality, and efficiency through scripting and AI-supported development. Responsibilities: Develop the layout of selected analog and digital IP layout cells under the guidance of experienced layout engineers. Perform Design Rule Check (DRC) and Layout Versus Schematic (LVS) verification and document findings. Create and deliver technical reports summarizing design work, verification results, and key lessons learned. Design and implement a SKILL-based automation solution to improve layout design or verification processes, increasing engineering efficiency and quality. Support engineering activities through AI-assisted development methodologies and productivity tools. Minimum Qualifications: Student pursuing a Bachelor's degree in Electrical Engineering, Electronics Engineering, Mechatronics, Robotics, Nanotechnology, Computer Engineering, or a rela