Engineer Hbm Layout Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Specific Responsibilities: 1. Drive HBM process development and yield improvement in WSS process. 2. Assist advanced package technology (chip stacking, 2.5D or 3D) research and development 4. Support project on-site execution and make decisions as technical consultant 5. Troubleshoot a variety of complex problems. Perform root cause analysis and resolve process engineering issues 6. Generate internal and external documentation for presentations and technical reports Technology Development: 1. Understand department and organizational goals and objectives to ensure daily tasks align with Technology Development needs. 2. Project engagement with cross-team interaction, providing expert contribution in materials characterization. 3. Coordinate mechanical characterization for advanced packaging development efforts globally including US, Japan, and Singapore site. 4. Provide recommendations for test structure and test vehicle design for material property evaluation. 5. Review, summarize, and present data with recommendations of materials and lead discussions with packaging material suppliers to meet technology roadmaps. Qualifications: 1. Degree/Major: Master above (PhD. is plus) major in Chemistry, Physic, Material, engineering science related fields 2. Must be at least 2 years experience in BONDING related works 3. Solid understanding of WSS/BOND advanced technilogies, 1 or more in below fields: a) Temporary bonding/debon

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a HIG IE Engineer, your responsibilities encompass tactical execution and planning to support tactical pillar, CAPEX and OCAP budget management, material planning for wafer probe C1-C4 to Micron IQP, build Business Processes to enable wafer level activities. Also to work as a window for wafer PRIME, pWLR and DOE material acquisition, drive sample deliveries to execution for Wafer Reliability and IQP Reliability. You are also expected to understand procurement of items, inventory logistic management, audits, continual improvements, 6S housekeeping, and project management. It is a must for a HIG PSE IE Engineer to be familiar with Claude Code, AI apps and leveraging AI for work productivity and quality improvements. Responsibilities include, but are not limited to: Able to utilize Claude Code and AI apps in regular work. Proven creation of Claude Code apps (Advantageous with more than one creation) Have clear knowledge of HBM wafer probe operations starting from Assembly to post C4. Have clear knowledge of wafer material acquisition from FE processes. Liaison with NPO, SIC, NPI teams from F15 and OMT. Have knowledge in MES/MAM attributes, tagging of lots from AAA, DAA and NAA lots. Familiar with CBG setting to ensure engineering wafers are not mixed with MFG wafers. Able to track E2E DOEs requests from start to CRD/MAD. Work closely with requestors on process needs. Able to work as a team with fellow members in a safe, cohesive, and collabo

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. Role Overview We are seeking an experienced ASIC Package Signal Integrity / Power Integrity Engineer to drive electrical architecture, modeling, optimization, and validation for the most advanced AI/HPC silicon and package design. This role focuses on high-speed SerDes and memory channel architecture, advanced 2.5D/3D package SI/PI, substrate to package co-design, power-delivery-network optimization, electromagnetic modeling, and simulation-to-measurement correlation. The ideal candidate has strong hands-on experience with high-speed channel and PDN analysis across ASIC packages, interposers, substrates, and power-delivery structures, and can translate simulation results into practical design requirements for interposers and package substrate design optimization. The engineer will work closely with ASIC, package, system, mechanical, thermal, power, and silicon validation teams from early architecture and feasibility studies through production bring-up. In this role you will Own SI/PI architecture and analysis for advanced AI ASIC packages from early feasibility studies through production. Develop and optimize high-speed electrical channels for 200G/400G SerDes, PCIe, HBM, DDR, and chiplet/die-to-die interfaces. Perform package, interposer and substrate modeling using 2D/3D electromagnetic solvers. Define and optimize package stack-ups, transmission-line structures, via transitions, breakout structures, return paths, ground shielding, bump maps, and ball maps based on SI/PI re

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are the Customer Engineering team at Micron, where we partner directly with leading datacenter customers to solve complex challenges and bring cutting-edge memory solutions to life. Our work sits at the intersection of innovation and real-world impact—enabling faster computing, smarter systems, and breakthroughs across industries. This role is a key bridge between Micron and our customers. As a Datacenter DRAM Customer Engineer, you’ll act as a primary technical advisor, helping customers design, qualify, and deploy memory solutions that power next-generation compute platforms. You’ll collaborate across engineering, sales, and product teams while influencing both customer success and Micron’s product direction. Responsibilities: Drive design wins and product qualifications for DRAM, HBM, SSD, and compute-focused solutions Partner with sales and cross-functional teams to execute strategic customer plans and track progress Resolve system configuration, setup, and performance issues in customer environments Guide customers on memory architecture, system configuration, and optimization for cloud/datacenter workloads Support validation and deployment through lab activities, design reviews, and system-level testing utilize AI proficiency or AI‑enabled ways of working where applicable Minimum Qualifications: <s

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron combines the brightest minds in the business with the world’s broadest memory portfolio of memory and storage technology, creating technology that leading global brands use to make computing faster, travel safer, healthcare more effective, and much more, addressing the world most challenging needs. Micron’s Customer Engineering Department plays a critical role in the company’s worldwide operations. With a career at Micron, you’ll be contributing your expertise to connect our customers with the industry’s most forward-thinking team to help reshape information, communication, and innovation around the globe. As an High Bandwidth Memory (HBM) Field Applications Engineer at Micron, you will be part of a high integrity, best-in-class customer engineering team ​responsible for strengthening technical partnerships, ​inspiring Micron and our customers to deliver ​the best possible products, and maximizing revenue​​. Responsibilities will include, but not limited to, the following: High Bandwidth Memory (HBM) Program alignment/expansion with key Micron customers, assist with Micron’s HBM qualifications, and Technical Opportunity management with our HBM customer engagements Extend/grow technical relationship with key HBM customers as the local execution and escalation point of contact Work with the Micron and customer qualification labs to complete qualification and debug any iss

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a SoC Architecture and Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the architecture, design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, design, verification, physical design, firmware, and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area, and schedule targets. This is a hands-on technical role for candidates passionate about architecture, RTL build, IP integration, debugging, and pre/post-silicon support. Key Responsibilities Architect, design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die. Architect and design memory sub-systems including memory IP selection and integration, bus and protocol selection, and power/performance/area optimization. Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic). Trans

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description As a Senior/Staff Product Quality and Reliability Assurance Engineer (PQRA), you will support reliability qualification and quality monitoring of High Bandwidth Memory products (HBM), help develop product reliability methodologies, and respond to product deviations as they pertain to quality and reliability. You will establish and implement requirements, specifications and metrics such as Defects per Million (DPM), Failure in Time (FIT), and Lifetime. In this role, you will work with multi-functional Engineering teams to ensure product reliability methods are established and followed, perform risk assessments, and provide support for manufacturing teams regarding reliability issues. In this dynamic role, you will have opportunities to gain new product knowledge on an ongoing basis! You will: Conduct New Product Qualifications Define High Bandwidth Memory (HBM) qualification requirements Comprehend failures and failure rate within the scope of the qualification Perform risk assessment at all decision points within the qualification cycle Review qualification data and sign off that qualification requirements have been met Issue internal product release notifications for Qualification <

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description As a Senior/Staff Product Quality and Reliability Assurance Engineer (PQRA), you will support reliability qualification and quality monitoring of High Bandwidth Memory products (HBM), help develop product reliability methodologies, and respond to product deviations as they pertain to quality and reliability. You will establish and implement requirements, specifications and metrics such as Defects per Million (DPM), Failure in Time (FIT), and Lifetime. In this role, you will work with multi-functional Engineering teams to ensure product reliability methods are established and followed, perform risk assessments, and provide support for manufacturing teams regarding reliability issues. In this dynamic role, you will have opportunities to gain new product knowledge on an ongoing basis! You will: Conduct New Product Qualifications Define High Bandwidth Memory (HBM) qualification requirements Comprehend failures and failure rate within the scope of the qualification Perform risk assessment at all decision points within the qualification cycle Review qualification data and sign off that qualification requirements have been met Issue internal product release notifications for Qualification <

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a High Bandwidth Memory Test Engineer at Micron, you will develop, debug, and maintain code that enables the parallel testing of advanced memory devices. Micron Test Engineers support R&D, interacting closely with global teams, as well as taking part in the designing and debugging of test hardware. In this position, you will constantly learn new device specifications and operations in order to develop efficient and innovative solutions of production test flows thru test algo optimization. Additionally, you will take responsibility to gain a firm understanding of the functionality of advanced memory devices as defined in product data sheets. RESPONSIBILITIES AND TASKS: Independency of development of new tests and test algorithms for HBM, which covers test software and hardware requirements, defect coverage, characterization, trending, process flow, and test times. Experienced on test programs development for products using primarily Python and C coding on automated test equipment in the given area followed by test program release to manufacturing area. Be a lead to new product introduction (NPI) as well as pre/post silicon tasks management. Develop test Automation solutions as electrical validation and qualification of new test equipment and tools. Independently debug and identify root causes on test issues and provide solutions across internal/external groups. Provide meaningful statistical data analysis, analytics and justification on program v

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a highly skilled Physical Design Engineer to drive the critical Die-to-Die (D2D) Physical Implementation from RTL to GDSII. This role demands deep expertise in full physical design flow with a specific focus on closing high-speed D2D interfaces for multi-die/chiplet architectures. This role is remote role open to any location in the U.S. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A seasoned ASIC Physical Design Engineer with 5+ years at advanced nodes (7nm or below) and multiple successful tapeouts. Strong in full-chip implementation, comfortable owning blocks from RTL to GDSII across synthesis, floorplanning, place-and-route, CTS, and sign-off. Deeply familiar with high-speed interfaces (D2D, PCIe, HBM, SerDes) and the physical challenges that come with them (timing, signal integrity, power integrity). Detail-oriented and methodical with STA, constraints, and closure for complex, high-speed designs. A hands-on problem solver who enjoys collaborating across analog, digital, and full-chip teams to debug tough issues. What We Need Lead Die-to-Die (D2D) physical implementation and closure, taking high-spe

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. 職務概要 メトロロジー プロセス開発エンジニアは、次世代DRAMおよびHBM技術を支える先端計測技術の開発・導入を担当します。 測定レシピ開発、データ解析、計測装置の評価・立上げに加え、装置サプライヤーと連携した新規計測装置の開発にも携わります。 半導体業界での経験は必須ではなく、製造業で培った分析力や問題解決力を活かしながら、世界中のエンジニアと協働し、最先端メモリ技術の開発に挑戦できるポジションです。 職務内容 先端DRAM/HBM技術向けの新規計測手法および測定レシピの開発・認定 測定結果の解析および測定精度改善に向けた問題解決活動 新規計測装置および測定技術の評価・導入 計測装置の開発業務&#xff08;要求仕様の検討・策定、サプライヤーとの調整・開発推進、完成後の装置立ち上げ・導入までを一貫して担当&#xff09; プロセス管理戦略の策定およびモニタリング計画の構築 実験データおよび量産データを活用したプロセス改善・歩留まり改善支援 プロセスインテグレーション、製造、歩留まり改善、装置エンジニアリング部門との協業 計測装置サプライヤーとの技術レビューおよび開発推進 設備投資計画&#xff08;Capital Planning&#xff09;、設備設置、立ち上げ、認定活動の支援 AIツールを活用した業務効率改善およびデータ活用の推進 必須条件 学士卒以上&#xff08;電気・電子、材料、物理、化学、化学工学、機械工学などの理工系関連分野&#xff09; 製造業または技術系職種における業務経験 論理的思考力および問題解決能力 データを基に課題を分析し、改善策を検討できる能力 日本語による円滑なコミュニケーション能力&#xff08;目安&#xff1a;JLPT N2以上&#xff09; 英語によるコミュニケーションに抵抗がないこと AIツール&#xff08;Anthoropic Claude、Microsoft 365 Copilot等&#xff09;を活用しながら業務効率向上や課題解決に取り組めること 歓迎条件 半導体業界における実務経験 自動車、化学、精密機械、電子部品等の製造業での経験 計測機器、分析装置、生産設備に関する知識または経験 XRD、SIMS、OCD、Scatterometry、CD-SEM、Film Metrology等に関する知識 統計解析や工程管理手法に関する経験 DRAM、HBM、NANDなど先端メモリ技術への興味・関心 海外メンバーとのプロジェクト経験 求める人物像 論理的に物事を整理し、課題解決に取り組める方 指示待ちではなく、自ら考え行動できる方 多様なバックグラウンドを持つメンバーと協働できる方 新しい技術やAIツールの活用に前向きな方 グローバルな環境で成長したい方 <li

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. 職務概要 メトロロジー プロセス開発エンジニアは、次世代DRAMおよびHBM技術を支える先端計測技術の開発・導入を担当します。 測定レシピ開発、データ解析、計測装置の評価・立上げに加え、装置サプライヤーと連携した新規計測装置の開発にも携わります。 半導体業界での経験は必須ではなく、製造業で培った分析力や問題解決力を活かしながら、世界中のエンジニアと協働し、最先端メモリ技術の開発に挑戦できるポジションです。 職務内容 先端DRAM/HBM技術向けの新規計測手法および測定レシピの開発・認定 測定結果の解析および測定精度改善に向けた問題解決活動 新規計測装置および測定技術の評価・導入 計測装置の開発業務&#xff08;要求仕様の検討・策定、サプライヤーとの調整・開発推進、完成後の装置立ち上げ・導入までを一貫して担当&#xff09; プロセス管理戦略の策定およびモニタリング計画の構築 実験データおよび量産データを活用したプロセス改善・歩留まり改善支援 プロセスインテグレーション、製造、歩留まり改善、装置エンジニアリング部門との協業 計測装置サプライヤーとの技術レビューおよび開発推進 設備投資計画&#xff08;Capital Planning&#xff09;、設備設置、立ち上げ、認定活動の支援 AIツールを活用した業務効率改善およびデータ活用の推進 必須条件 学士卒以上&#xff08;電気・電子、材料、物理、化学、化学工学、機械工学などの理工系関連分野&#xff09; 製造業または技術系職種における業務経験 論理的思考力および問題解決能力 データを基に課題を分析し、改善策を検討できる能力 日本語による円滑なコミュニケーション能力&#xff08;目安&#xff1a;JLPT N2以上&#xff09; 英語によるコミュニケーションに抵抗がないこと AIツール&#xff08;Anthoropic Claude、Microsoft 365 Copilot等&#xff09;を活用しながら業務効率向上や課題解決に取り組めること 歓迎条件 半導体業界における実務経験 自動車、化学、精密機械、電子部品等の製造業での経験 計測機器、分析装置、生産設備に関する知識または経験 XRD、SIMS、OCD、Scatterometry、CD-SEM、Film Metrology等に関する知識 統計解析や工程管理手法に関する経験 DRAM、HBM、NANDなど先端メモリ技術への興味・関心 海外メンバーとのプロジェクト経験 求める人物像 論理的に物事を整理し、課題解決に取り組める方 指示待ちではなく、自ら考え行動できる方 多様なバックグラウンドを持つメンバーと協働できる方 新しい技術やAIツールの活用に前向きな方 グローバルな環境で成長したい方 <li

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The PDE API Process Integration (PI) Engineer is responsible for driving process integration excellence for Advanced Packaging products, including High Bandwidth Memory (HBM) products across sites during New Product Introduction (NPI) . This role ensures robust process readiness, yield ramp, and cross‑module integration across Front-end to Assembly interactions , PWF, Assembly, and Test , enabling successful execution of HBM technology roadmaps. The PI Engineer works cross‑functionally with different cross-functional teams including Fab, Assembly, Test, Yield, Quality, and central engineering teams to identify risks early, resolve complex integration issues, and deliver NPI milestones on time. Job Responsibilities Technical Leadership Serve as the Process Integration Subject Matter Expert, owning end‑to‑end integration across PWF, assembly, and test from NPI through sustained HVM Define PI technical direction, integration frameworks, and success criteria for HBM programs Lead process characterization strategy, window definition, and systemic yield improvement Resolve complex yield, reliability, and performance issues through deep technical analysis and integration expertise Drive resolution of high‑impact, ambiguous, cross‑site integration challenges affecting ramp, quality, or business commitments Anticipate risks early and define mitigation strategies across programs and sites

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Interested in changing the landscape of artificial intelligence workloads? Join our team where we are building next-generation, high-bandwidth memory products. In Micron's High Bandwidth Memory Architecture organization, we partner closely with customers to deliver memory solutions purpose-built for emerging AI systems and applications. As a Senior Engineer, Principal Engineer, or Member of Technical Staff, Design Architect in the Next-generation HBM Architecture Team, you will design, simulate, analyze, and optimize the architecture of 3D-stacked, high-performance memories. Apply your knowledge to explore trade-offs in 3D-stacked logic and memory designs in close collaboration with peer architecture and design teams. Your responsibilities will include definition of, evaluation of, and specification of circuit implementations, technology requirements, thermal performance improvements, power delivery architectures, and on- and off-chip interfaces. Responsibilities: Design, optimize, and simulate critical analog and/or mixed-signal circuits. Architect and design power delivery for high-performance, stacked memories. Analyze, specify, and prototype on-/off-chip interfaces. Perform timing, area, power, and complexity analysis for high-performance, low-power circuits. Define architectures for improved thermal management. Conduct pathfinding activities for future-generation stacked-memory products. Com

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Micron’s vision is to transform how the world uses information to enrich life for all . Join a world-class global team focused on one thing: using our expertise in the relentless pursuit of innovation to enable high value technology driven solutions for customers and partners. The solutions we create help make everything from virtual reality experiences to breakthroughs in supercomputing and artificial intelligence possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can spark the very innovation we are pursuing. We are currently experiencing a ground-breaking period in artificial intelligence (AI), where AI is anticipated to become an integral component of daily life. This proliferation is being fueled by advances in memory and compute technologies. High bandwidth memory (HBM) is at the forefront of these innovations. Micron’s Advanced Packaging Technology Development (APTD) is responsible to deliver package development for high performance memory products and transfer to manufacturing. Job Summary The Package Health Test Engineer will contribute to the development and execution of package health monitoring, simulation, and characterization activities. This role involves hands-on en