Engineer Hbm Layout Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. HBM Design Architecture — Principal Engineer Role Overview We are seeking a highly motivated HBM Design Architecture Engineer (Principal Engineer) to drive exploration and definition of next‑generation AI memory and system environments. In this role, you will analyze emerging infrastructure trends, build performance models, and develop/extend tooling that informs HBM architecture decisions and system‑level trade‑offs. You will work closely with architects and senior engineers across DTPCO, Design, and Product/System teams to translate AI workload requirements into actionable memory subsystem and architectural intercept strategies. Key Responsibilities You will own and contribute to projects such as: Research and synthesize emerging trends in compute, networking, and storage infrastructure to anticipate how future AI systems will evolve. Lead HBM architecture analysis by defining bandwidth/latency targets, identifying constraints, and translating workload and system data into actionable memory requirements. Develop and maintain simulation frameworks to model AI cluster performance and memory subsystem behavior; validate models against internal and external benchmarks. Build and apply first‑order performance models spanning HBM bandwidth/latency, GPU/CPU interactions, and memory hierarchy trade‑offs to guide architectural decisions. Create and curate trend dashboards using CSP benchmar

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. 【募集職種/Position Title】 Senior / Staff / Principal Process Development Engineer 【日本語】 MicronのDRAM Technology Development Process Development Teamは、MicronのDRAMおよびHBM (High Bandwidth Memory) 製品向けのプロセス技術、装置ソリューションを開発する、世界最高水準のエンジニアと技術専門家で構成された組織です。 当チームでは、先端DRAM、HBM、およびCMOS技術の開発を推進しており、リソグラフィ、CVD、ドライエッチ、ウェットプロセス、メタライゼーション、拡散、イオン注入、CMP、先端材料開発など、幅広いプロセス分野で経験豊富な人材を募集しています。 本ポジションでは、ユニットプロセス技術の探索、開発、最適化を担当し、プロセスインテグレーション、デバイス、設計エンジニアと連携しながら、装置メーカーや材料サプライヤーと協働して、次世代のDRAMおよびHBM向けの高性能かつコスト競争力のある技術開発を推進していただきます。 本ポジションでは、半導体プロセス開発、デバイス物理、CMOS技術に関する高度な知識が求められます。また、データ解析能力や材料分析、表面解析技術への理解も重要です。チームワークと高いコミュニケーション能力は、本職務で成功するための重要な要素となります。 歓迎する技術経験 以下の技術分野における実務経験をお持ちの方を歓迎します。 ・成膜技術 (CVD、ALD、PVD) ・エピタキシャル成長技術 (Si、SiGe、選択成長など) ・ゲートスタックおよび誘電体技術 ・先端パターニングおよびドライエッチ技術 ・ウェット洗浄および表面処理技術 ・イオン注入および熱処理技術 ・コンタクト形成、配線メタライゼーション技術 ・化学機械研磨技術 (CMP) ・ストレスエンジニアリングおよび先端材料統合技術 ・先端トランジスタ開発を含むロジック技術開発 ・メモリCMOSおよび周辺回路向けプロセスインテグレーション技術 主な職務内容 以下を含みますが、これらに限定されません。 ・デバイス、プロセスインテグレーション、および製品要求事項の理解 ・技術目標およびコスト目標達成に向けたプロセス技術ロードマップおよびサプライヤー戦略の策定 ・開発環境および量産環境におけるプロセスレシピの開発、最適化 ・構造解析、材料分析、および電気特性評価データの解析 ・デバイス性能、歩留まり、信頼性、およびコスト競争力向上に向けた技術革新の推進 ・AI（人工知能）を活用した開発業務の効率化、高度化の推進 ・社内関係部門および外部パートナーとの連携による複雑な技術課題の解決 ・技術戦略および開発方針に関する経営層への提言 ・エンジニアの育成、指導を通じた組織能力の向上 ・高い倫理観、オーナーシップ、および他者への敬意を持った業務遂行 応募資格（必須） ・電気工学、物理学、化学工

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. 【職務概要】 SIC(Site Inventory Control) Planning Engineerとして、Fab15の生産能力を最大化し、顧客へのオンタイムデリバリーを確実に達成する重要な役割を担います。 SIC Planningは、Fab15、Supply Chain、そしてグローバルなDRAM Networkを結ぶ極めて重要な「コントロールタワー」です。需要・供給・生産能力・在庫・技術移行に関する情報を統合し、Fab15の代表として、短期・中期の生産計画と実行方針を迅速かつ明確に示します。 近年、Max-out要求の拡大、HBMを含む製品構成の変化、Metallization・EUV・W2W・クロスFabプロセスなどOffloadの複雑化により、SICの活躍領域と事業上の重要性は一段と高まっています。本ポジションでは、Fab15と他サイトの制約・余力を俯瞰し、シナリオ分析、Die Mix、Wafer Start、Output Profile、Offload Loopを一体的に設計し、全体最適につながる判断軸を提供します。 単に計画数値を策定するだけではなく、変化を先読みして論点を提示し、Supply Chain、MCT、Manufacturing、Engineering、NPI、各Fabと連携しながら、計画を実行へつなげる仕事です。データに基づく意思決定、AI活用、迅速なリスク検知、標準化・自動化、継続的改善を通じて、顧客コミットメントとFab15の安定運営を支えます。 Fab15の代表として、多くのステークホルダーを巻き込みながらグローバルDRAM Network全体の最適化に貢献できる、影響力と裁量の大きなポジションです。工場の運営だけでなく、グローバルネットワーク全体を動かす視点で仕事に挑戦したい方を歓迎します。 【職務内容】 Fab15、Supply Chain、DRAM Networkを結ぶコントロールタワーとして、短期・中期の生産計画および実行方針を策定・推進する 需要、供給、在庫、キャパシティ、サイクルタイム、歩留まり、顧客納期を統合的に分析し、Fab15としての判断軸および対応方針を提示する Max-out、Pull-in、Die Mix、NPIサンプル、TD品、Wafer Start、Output Profileを最適化し、生産能力と顧客コミットメントの両立を実現する Metallization、EUV、W2W、Probeなど複雑化するOffload運営において、送受計画、Capacity、Loop CT、優先度、実績およびリスクを管理する 複数Fabの制約と余力を可視化し、シナリオ分析を通じて全体最適となるクロスサイトのLoading・Offload戦略を提案する KPI（Pace、Cycle Time、Wafer Out、Delivery Adherence、Inventory）をモニタリ

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. 【職務概要】 SIC(Site Inventory Control) Planning Engineerとして、Fab15の生産能力を最大化し、顧客へのオンタイムデリバリーを確実に達成する重要な役割を担います。 SIC Planningは、Fab15、Supply Chain、そしてグローバルなDRAM Networkを結ぶ極めて重要な「コントロールタワー」です。需要・供給・生産能力・在庫・技術移行に関する情報を統合し、Fab15の代表として、短期・中期の生産計画と実行方針を迅速かつ明確に示します。 近年、Max-out要求の拡大、HBMを含む製品構成の変化、Metallization・EUV・W2W・クロスFabプロセスなどOffloadの複雑化により、SICの活躍領域と事業上の重要性は一段と高まっています。本ポジションでは、Fab15と他サイトの制約・余力を俯瞰し、シナリオ分析、Die Mix、Wafer Start、Output Profile、Offload Loopを一体的に設計し、全体最適につながる判断軸を提供します。 単に計画数値を策定するだけではなく、変化を先読みして論点を提示し、Supply Chain、MCT、Manufacturing、Engineering、NPI、各Fabと連携しながら、計画を実行へつなげる仕事です。データに基づく意思決定、AI活用、迅速なリスク検知、標準化・自動化、継続的改善を通じて、顧客コミットメントとFab15の安定運営を支えます。 Fab15の代表として、多くのステークホルダーを巻き込みながらグローバルDRAM Network全体の最適化に貢献できる、影響力と裁量の大きなポジションです。工場の運営だけでなく、グローバルネットワーク全体を動かす視点で仕事に挑戦したい方を歓迎します。 【職務内容】 Fab15、Supply Chain、DRAM Networkを結ぶコントロールタワーとして、短期・中期の生産計画および実行方針を策定・推進する 需要、供給、在庫、キャパシティ、サイクルタイム、歩留まり、顧客納期を統合的に分析し、Fab15としての判断軸および対応方針を提示する Max-out、Pull-in、Die Mix、NPIサンプル、TD品、Wafer Start、Output Profileを最適化し、生産能力と顧客コミットメントの両立を実現する Metallization、EUV、W2W、Probeなど複雑化するOffload運営において、送受計画、Capacity、Loop CT、優先度、実績およびリスクを管理する 複数Fabの制約と余力を可視化し、シナリオ分析を通じて全体最適となるクロスサイトのLoading・Offload戦略を提案する KPI（Pace、Cycle Time、Wafer Out、Delivery Adherence、Inventory）をモニタリングし、逸脱の早期検知、影響評価、リカバリー方針の策定をリードする Supply Chain、MCT、Manufacturing、Engineering、NPI、IEおよび他Fabと連携し、計画と現場実行の整合を図る

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Sr Principal CAD & HPC Workflow Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate, and advance faster than ever. Position Overview Micron is seeking a Senior Principal CAD Engineer to help shape the engineering environment that powers Memory product development across DRAM, HBM, NAND, and custom memory programs. In this high-impact technical role, you will partner with Micron’s CAD Software and HPC teams to architect, modernize, and scale the platforms our worldwide design teams rely on every day, from CAD software infrastructure, project setup flows, and quality-gating solutions to engineering automation and compute workload scalability. You will also define how success is measured. By developing improvement and quality metrics for job management and workflow performance, you will establish customer-facing service levels that give design teams clear visibility into the performance of their environment and give engineering leaders a data-driven path to continuous improvement. Along the way, you will help bring next-generation AI and agentic software solutions into Design Automation, working closely with CAD, Design Engineering, HPC, and EDA vendors. Key Responsibilities Serve as a senior engineer partnering with the CAD Software and HPC team

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Micron Global Quality FE Central Wafer Quality (SNR) Engineer, you will be a member of the worldwide quality team, responsible for driving quality and reliability initiatives into FE MFG network for compute and mobile products, including LPDDR for critical customer AI applications and support fab expansion quality equivalency governance. You will work closely with DEG PE/PYE/GQ, FE fab teams and Central PIE to establish BKMs, set up program with line of sight metric, develop a strategy and closely work on execution to achieve program milestone. Key program activities include FE and supporting Time to Mature DPM program and Time to Mature Uncorrectable Error program execution for HBM product and improving customer field DPM excellence. Responsibilities and Tasks Provide Strategic Support in Quality Program/Project Management Develop, manage, and/or communicate quality strategy with line of sight metrics and goals to monitor execution health. Lead cross-functional initiatives or enabling projects that support FLT and companywide quality objectives. Develop and drive compliance in global business process related to product quality. Manage the projects to enable the implementation path for new initiatives. Support program expansion for ID1 including 170s DRAM Provide Tactical Support Work with cross-functional team

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. This job requisition is for a Photolithography Process Development Engineer at Micron Technology, Inc. Micron Technology Inc. is a Fortune 500 company and employs over 53,000 workers worldwide, with headquarters in Boise, ID. Micron offers the industry’s broadest portfolio of memory solutions—starting with foundational DRAM, NAND, and NOR Flash memory, extending to SSDs, MCPs, HBM and other memory-based systems. As the only memory fab in the western hemisphere, Micron has been in the industry for over forty -five years and continues to be the only U.S.-based DRAM manufacturer. Micron is one of the most prolific patent applicants in the world with over 60,000 patents granted and growing. As a Photo Process Development Engineer, you will be part of a revolutionary 3D DRAM Technology Development team. The position promises ample opportunity for innovation, collaboration and testing new dimensions in Advanced DRAM. You will work directly with Process Integration and other process areas including Dry Etch, Wet Process, Metals, CVD, Diffusion, and CMP. You will work on state of the art and best in class </sp

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Signal Integrity (SI) Research & Development team enables the electrical performance of Micron's industry-leading memory and storage products, including DRAM, LPDRAM, NAND, HBM, SSDs, and emerging memory technologies. The team works across silicon, package, PCB, and system-level designs to develop high-speed signaling and power delivery solutions that support next-generation computing, AI, networking, automotive, mobile, and data center applications. As a Signal Integrity Engineer, you will support the design, analysis, and validation of high-speed memory interfaces and power distribution networks across Micron's product portfolio. Working alongside experienced engineers, you will use modeling, simulation, measurements, and AI-enabled workflows to evaluate signal and power integrity performance, support product development, and contribute to future technology and industry standards initiatives. Responsibilities Support signal integrity and power integrity analysis for high-speed memory interfaces and power distribution networks through modeling, simulation, measurement, and correlation activities. Collaborate with silicon, package, product, validation, and system engineering teams to ensure product electrical performance across all stages of development. Develop and evaluate die, package, PCB, and system-level models to identify performance risks and optimization opportunities. Apply AI-enabled tools and agentic workflows to improve engineering efficiency, automate analysis, improve

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. High-bandwidth memory (HBM) is an innovative memory solution that uses 3D stacking of DRAM for fast speeds, expansive bandwidth and low power per transaction. HBM is primary solution for AI applications. As a Micron Global Quality FE Central (Senior) QE Product Engineer, you will be a member of the worldwide quality team, responsible for driving quality and reliability initiatives into FE MFG network for high bandwidth memory (HBM) product for critical customer AI applications. You will work closely with PE/GQ QRA/FE fab teams and Central PIE to establish BKMs, set up program with line of sight metric, develop a strategy and closely work on execution to achieve program milestones for customer field DPM excellence. You will also work with smart manufacturing AI team for automation and AI solution development and deployment to continue helping HBM quality management with AI transformation. Responsibilities and Tasks: <

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an SoC Physical Design Senior Manager, HBM in the Heterogeneous Integration Group (HIG), you will lead a team of physical design and physical verification engineers responsible for implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and manufacturing teams to deliver best‑in‑class PPA (performance, power, area) and robust signoff collateral for tapeout. This is a hands‑on role with opportunities to own blocks or top‑level integration across multiple product generations. Key Responsibilities Recruit, develop, and mentor a team of physical design engineers delivering HBM base die products. Plan project resourcing requirements and timelines. Prioritize resources across projects and individual assignments to meet aggressive product delivery schedules. Drive physical implementation for SoC blocks and/or top-level including floorplanning, placement, CTS, routing, and physical optimization to meet PPA targets. Drive timing closure (setup/hold) across multi-mode/multi-corner (MMMC) scenarios; partner with RTL, architecture, and STA/signoff to converge designs. Collaborate with design and integration teams to ensure clean implementation of clocking/reset strategy, power architecture, and SoC integration requirements. Integrate and implement complex IP (e.g., controllers, microcontrollers, NOC, interfaces, MBIST/DFT logic, buffers, PHY‑adjacent logic) with focus on robust

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a MTB Assembly ES Tech, you will be responsible for maintaining machine OEE and improving machine alarm CIP. Use mechanical and electronic skills to troubleshoot and repair down equipment. Assist with equipment installs and upgrades and create and modify equipment procedures. Requirements: Ability to handle the thinning or dicing tool -steal dicing, laser groove, NCF lamination Understand the tool installation, setup and buyoff Work experience: 3 years above Understand the tool signal is prefer, such as SVID, CEID, ECID...etc Understand to handle the FDC analysis and improve is prefer English: ability to communicate for discussion with supplier Responsibilities and Tasks: Support, repair and upgrade production equipment Perform PM (Preventive Maintenance) and Change Over on production equipment effectively and efficiently Assist Supervisors/Engineers in making quality and reliability improvements Troubleshoot and analyze machine failure mechanism or frequency Minimize equipment downtime through preventive maintenance / fixes Monitor and improve on repair cycle time through continuous improvement effort Involved in Empowerment & Autonomous Maintenance Team activities AI in Job Responsibilities: ​ •Integrates AI-assisted tools and insights into daily work to improve efficiency,

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Role Summary The Manufacturing Technician supports day-to-day manufacturing operations to ensure safe, stable, and efficient production execution in a high-volume manufacturing environment. This role focuses on executing production plans, monitoring process performance, supporting equipment and material readiness, and escalating issues that impact safety, quality, delivery and cost. Working closely with Manufacturing Engineers, Process Engineers, and cross-functional partners, the Manufacturing Technician plays a critical role in achieving production targets, maintaining operational discipline, and driving continuous improvement at the shop-floor level. Key Responsibilities 1) Safety & Quality Compliance Adhere strictly to safety policies, quality systems, and cleanroom protocols. Perform work area inspections and follow safe work practices to maintain a safe working environment. Ensure products are handled, processed, and documented in compliance with quality and 6S requirements. Support containment actions and follow-up activities when deviations are identified. 2) Production Execution & Operations Support Execute daily production

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Title: Technical Leadership Plrogram - Member Of Technical Staff – HBM Verification Location: Hyderabad, India Experience : 12&#43; years in Design Verification (experience with Pre-Silicon Verification OR DDR/GDDR/LPDDRmemory/SerDes PHY IP Verification is preferred) Role Description Join the Micron HBM team where you will drive verification architecture for next-generation HBM, ensuring robust methodologies and sign-off strategies. This role is perfect for a hands-on silicon verification expert who is passionate about developing best-in-class verification methodologies, testbench design, AI enabled verification and developing novel solutions to improve quality and efficiency of verification workflows. Key Responsibilities Define and drive verification architecture and methodology for next generation HBM designs. Develop verification plans, coverage strategies, and sign-off criteria. Architect and implement UVM-based testbenches and reusable verification components. Apply Formal Verification techniques for critical Collaborate strictly with build teams to ensure verification completeness and quality. Mentor and guide verification engineers on guidelines and advanced methodologies. Evaluate and integrate AMS Co-Simulation techniques for mixed-signal IP verification. Work closely with EDA vendors to adopt the l

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The HBM Design Architecture team drives exploration and analysis of next‑generation AI memory and system environments. The organization partners closely with DTPCO, Design, and Product/System teams to understand how evolving AI workloads shape memory system behavior and architectural strategies. The HBM Design Architecture Intern supports early‑stage research, performance modeling, and tool development that guide future HBM architectural decisions. This role provides hands‑on exposure to AI system trends and memory subsystem analysis while working closely with senior engineers and technical mentors. Responsibilities Research emerging trends in compute, networking, and storage infrastructure to understand how future AI workloads may evolve. Support HBM architecture analysis by gathering and synthesizing data related to bandwidth, latency, and system‑level memory requirements. Help develop or refine simulation frameworks used to model AI cluster performance and memory subsystem behavior. Participate in building trend dashboards using CSP benchmarks and industry datasets. Collaborate with DTPCO mentors to explore architectural intercept opportunities for next‑generation AI systems. </ul

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. About the Role As a Member of Technical Staff (MTS) in Micron’s HBM Product Engineering Component Validation team, you will serve as a technical leader and authority for the validation of advanced High Bandwidth Memory (HBM) products. You will apply deep DRAM and HBM architecture and design knowledge to define validation coverage strategy, lead complex product debug and failure analysis, and drive a zero-escape validation mindset across all test modes and product milestones. Operating within Micron’s global validation organization and partnering closely with teams across multiple sites, you will influence design-intent-to-coverage decisions, mentor engineers, and set the technical direction for current and next-generation HBM validation. Responsibilities and Tasks Technical Leadership & Validation Strategy Act as a technical authority for HBM Component Validation, translating DRAM/HBM design intent and architecture into comprehensive validation coverage and test strategy. Define and own validation methodologies and coverage plans across structural (black-box) and functional test flows, driving toward full validation coverage at each product milestone with zero validation escapes. Lead validation definition and closure for new and high-risk product