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Hardware Systems Architect Jobs

3,566 active opportunities · Updated for October 2026

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Explore current hardware systems architect jobs. Use filters to narrow by work mode, employment type, experience and date posted.

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Snowflake
📍 Bellevue• Full-time• Remote• $236K – $330K/yr
29 days ago

At Snowflake, we are powering the era of the agentic enterprise. To usher in this new era, we seek AI-native thinkers across every function who are energized by the opportunity to reinvent how they work. You don’t just use tools; you possess an innate curiosity, treating AI as a high-trust collaborator that is core to how you solve problems and accelerate your impact. We look for low-ego individuals who thrive in dynamic and fast-moving environments and move with an experimental mindset — who rapidly test emerging capabilities to discover simpler, more powerful ways to deliver results. At Snowflake, your role isn't just to execute a function, but to help redefine the future of how work gets done. We are looking for talented systems developers and researchers to join the Snowflake AI Research team and advance the state of the art in LLM inference systems and optimization . Our mission is to build the next generation of high-performance and intelligent inference systems. We optimize not only how fast and efficiently models run, but also how quickly inference systems can adapt to new models, architectures, hardware, and workloads. Our work spans the full inference stack—from distributed serving and runtime systems to GPU kernels and model-system co-design. We explore techniques such as adaptive parallelism, speculative and parallel decoding, disaggregated inference, scheduling and batching, KV-cache optimization, model swapping, quantization, and GPU kernel optimization to push the frontier of latency, throughput, scalability, and cost. Beyond optimizing individual models, we are building intelligent and adaptive inference systems that can automate performance optimization—rapidly profiling new models and workloads, identifying bottlenecks, selecting effective execution strategies, and adapting system configurations with minimal manual tuning. We embrace AI-native engineering , using AI not only as the workload we optimize, but also as a tool to accelerate system devel

REMOTEmachine learningai
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Senior Engineering Technician About Us: Samara Aerospace is revolutionizing satellite design by addressing the challenges of deploying and managing large satellite constellations. Our innovative Hummingbird spacecraft bus offers a modular and scalable platform that streamlines satellite production and deployment, significantly reducing launch costs. Hummingbird's compact architecture maximizes launch capacity, making it the most efficient and agile spacecraft in the industry. At the core of our technology is the patented Multifunctional Structures for Attitude Control (MSAC) system. Unlike traditional wheel-based pointing control systems, MSAC utilizes actuators embedded in the hinges of deployable solar panels to provide 3-axis attitude control and active jitter cancellation. This design eliminates the need for spinning wheels, reducing mass and potential points of failure, while enhancing pointing precision. Role: Samara Aerospace is looking for a Senior Lab Technician to join our team as we build our first Hummingbird satellite technology demonstrator. As a growing startup, there are opportunities to lead the organization and layout of the development lab, support PCB rework, harness builds, CNC fabrication, hardware assembly, and environmental testing. You'll work alongside engineers across mechanical and electrical disciplines while contributing directly to hardware that will fly in space. If you like learning new skills, taking ownership, and doing work that matters, you'll fit right here. Within your first three months, as you establish yourself and demonstrate ownership, this role can be formalized into a Senior Technician/Lab Manager position where you would take responsibility for coordinating and mentoring new technicians as we grow the team. If you're a hands-on, organi

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE As a Senior Technical Program Manager for Hyperscale Operations, you will serve as the primary technical coordination lead for integrating Everpure’s Direct Flash Modules (DFMs) into next generation hyperscale storage platforms. Working closely with hyperscale customers and ODM partners, Everpure’s hardware and firmware engineering, product engineering, quality, operations, you will drive the end-to-end technical execution required to ensure DFMs are seamlessly integrated into customer-designed storage servers and L10/L11 manufacturing. You will lead cross-functional program execution from architecture alignment and platform qualification through manufacturing ramp, driving issue resolution, root-cause analysis, and technical risk mitigation to deliver reliable, high-quality deployments that meet aggressive customer milestones. WHAT YOU'LL DO Orchestrate Hardware NPI Execution: Lead cross-functional engineering teams through EVT, DVT, and PVT milestone gates for complex storage server and L10/L11 rack systems, delivering scalable, high-yielding hardware platforms to high-volume manufacturing. Orchestrate Technical Issue Resolution: Lead cross-functional triage across hardware, firmware, product engineering, and quality teams to drive root-cause analysis and resolve system-level qualification issues and platform bottlenecks. Accelerate Strategic Partner Performance: Direct global contract manufacturers and sy

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OpenAI
📍 San Francisco• Full-time• Remote• $257K – $327K/yr
6mo ago

About the Team OpenAI is building the infrastructure foundation for the next generation of AI. The Data Center Engineering team defines the strategy, reference architectures, technical requirements, and delivery standards for the large-scale data centers that support OpenAI research, products, and infrastructure partners. As a Data Center Infrastructure Electrical Engineer, you will help define, validate, and scale the electrical power systems that support high-density AI compute. You will translate evolving compute requirements into practical facility and rack-power architectures, evaluate new technologies and vendor solutions, and drive technical decisions across design, manufacturing validation, construction, commissioning, deployment, and operations. This role is best suited for a senior hands-on engineer with deep experience in mission-critical power systems, strong judgment under ambiguity, and the ability to connect facility infrastructure, hardware requirements, controls, telemetry, reliability, and operations. About the Role We are seeking a senior electrical infrastructure engineer to lead the development of reliable, scalable, and efficient power architectures for high-density, liquid-cooled AI data centers. The ideal candidate has strong practical experience with critical electrical systems at data centers or comparable industrial scale, including medium-voltage and low-voltage distribution, utility interfaces, backup power, UPS and battery systems, rack power delivery, grounding, protection, controls, and monitoring systems. You should be comfortable moving between long-range architecture, detailed engineering review, lab validation, vendor qualification, field deployment, and operational troubleshooting. Key Responsibilities Design and optimize electrical topologies and equipment strategies that reduce cost, accelerate schedules, improve efficiency, increase scalability, and maintain high reliability and maintainability. Review and develop basis-of-des

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Graphcore is a globally recognized leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and datacentre hardware that provide the specialized processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, we are working to enable Artificial Super Intelligence and ensure that its benefits are accessible to everyone. We are developing the next generation of AI compute, a large-scale system-on-chip (SoC) designed to power future high-performance AI systems. As the Director of Post Silicon Validation, you will be responsible for leading the Bristol team, enabling pre-production software to run reliably on new silicon quickly and efficiently, before showing that the silicon meets the highest standards of quality, reliability and functionality, ready for production deployment. Reporting to the Senior Director of Post Silicon Validation, you will manage, develop and grow the Post Silicon Validation team in Bristol, delivering post-silicon validation across the full AI SoC, working across silicon, firmware, and platform levels. The role requires a deep technical understanding, strong hands-on debug experience, and the ability to collaborate effectively with hardware, software, and systems engineering teams. Responsibilities Manage, develop and grow the Post Silicon Validation team in Bristol: The Post Silicon Validation team is relatively new, with a strong remit and growing quickly to help Graphcore bring up new silicon quickly and effectively. Play a significant role in the definition, planning and execution of chip bringup activities: Develop and refine the overall post-silicon validation approach for our AI SoCs, ensuring reliable and timely delivery of validated silicon, architectural correctness, feature r

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DoorDash USA
📍 United States• Full-time• $170K – $250K/yr
7mo ago

About the Team DoorDash Labs, established in 2018, serves as the innovation hub for DoorDash, focusing on developing automation and robotics solutions to enhance last-mile logistics. The team's mission is to create technologies that support and augment human networks, aiming to improve efficiency for Dashers, merchants, and consumers alike. We’re ruthlessly focused on business impact. We are a highly senior team composed of former pioneers from a variety of different robotics industries. As of 2025, DoorDash has completed 10B lifetime deliveries. We’re focused on how to do the next 10B even better. About the Role We’re looking for a Senior/Staff electrical and firmware engineer who designs the board and writes the firmware for connected consumer and enterprise devices, including tablets, POS systems, peripherals, and emerging robotics applications. In this role, you will take connected devices from ambiguous user or business needs through system architecture, rapid prototyping, board design, firmware implementation, bring-up, field deployment, and production transition. The ideal candidate has a passion for building and shipping reliable hardware at scale and thrives in an environment that demands technical depth and high-quality execution across multiple concurrent programs. This is a build-heavy role on a small, senior team. You’re excited about this opportunity because you will… Own connected devices end to end, including: Own connected devices from an ambiguous product need through field deployment. Work across the hardware and firmware boundary instead of handing work between specialists. Explore uncertain product ideas through rapid prototypes and experiments. Make consequential tradeoffs on a small, senior team with direct exposure to users and field behavior. Key Responsibilities Translate user and business needs into an integrated electrical and firmware architecture. Design compute-based, mixed-signal boards incorporating processors

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MI
5 days ago

About Mach Industries Founded in 2023, Mach Industries is a rapidly growing defense technology company focused on developing next-generation autonomous defense platforms. At the core of our mission is the commitment to delivering scalable, decentralized defense systems that enhance the strategic capabilities of the United States and its allies. With a workforce of approximately 350 employees, we operate with startup agility and ambition. Our vision is to redefine the future of warfare through cutting-edge manufacturing, innovation at speed, and unwavering focus on national security. We are dedicated to solving the next generation of warfare with lethal systems that deter kinetic conflict and protect global security. The Role Mach Industries is seeking an Mechanical Engineer with Avionics Integration expertise to join our team in designing, integrating, and testing the electro-mechanical systems that support next-generation defense platforms. In this hands-on role, you’ll develop avionics mounting architectures, electronics enclosures, PCBA mounting, wire harness accommodation, connector interfaces, EMI/EMC accommodation, and thermal management solutions for reliable, flight-ready hardware. At Mach Industries, we are redefining the future of defense through advanced, scalable platforms. As a Mechanical Avionics engineer, you will play a key role in taking avionics systems from concept through hardware bring-up, environmental testing, and flight qualification. Collaborating with electrical, firmware, systems, manufacturing, and test teams, you’ll help create rugged, serviceable, and manufacturable hardware built to perform in demanding aerospace environments. Key Responsibilities Design and develop avionics or PCBA mounting architectures or enclosures via CAD design and engineering release including GD&T per AMSE Y14.5 Work cross-functionally with electrical engineering teams to develop and verify overall architecture, schematics, layout via ECAD/MCAD data exchang

MI
Mach Industries
📍 Huntington Beach• $105K – $140K/yr
5 days ago

About Mach Industries Founded in 2023, Mach Industries is a rapidly growing defense technology company focused on developing next-generation autonomous defense platforms. At the core of our mission is the commitment to delivering scalable, decentralized defense systems that enhance the strategic capabilities of the United States and its allies. With a workforce of approximately 350 employees, we operate with startup agility and ambition. Our vision is to redefine the future of warfare through cutting-edge manufacturing, innovation at speed, and unwavering focus on national security. We are dedicated to solving the next generation of warfare with lethal systems that deter kinetic conflict and protect global security. The Role Mach Industries is seeking an Mechanical Engineer with Avionics Integration expertise to join our team in designing, integrating, and testing the electro-mechanical systems that support next-generation defense platforms. In this hands-on role, you’ll develop avionics mounting architectures, electronics enclosures, PCBA mounting, wire harness accommodation, connector interfaces, EMI/EMC accommodation, and thermal management solutions for reliable, flight-ready hardware. At Mach Industries, we are redefining the future of defense through advanced, scalable platforms. As a Mechanical Avionics engineer, you will play a key role in taking avionics systems from concept through hardware bring-up, environmental testing, and flight qualification. Collaborating with electrical, firmware, systems, manufacturing, and test teams, you’ll help create rugged, serviceable, and manufacturable hardware built to perform in demanding aerospace environments. Key Responsibilities Design and develop avionics or PCBA mounting architectures or enclosures via CAD design and engineering release including GD&T per AMSE Y14.5 Work cross-functionally with electrical engineering teams to develop and verify overall architecture, schematics, layout via ECAD/MCAD data exchang

G
21 days ago

About the job Design the high-speed signal paths that let advanced AI compute systems perform at datacentre scale. As a Signal Integrity Engineer, you will shape the electrical performance of Graphcore hardware platforms. Your work will help 112Gbps and 224Gbps SERDES, DDR and processor interfaces operate within demanding system budgets. You will develop, extract and simulate PCB structures across production systems and test boards. You will define launches, via structures, transmission lines, stack-ups and low-loss materials for future designs. This role spans simulation, lab validation and practical design influence. You will work from concept through prototype bring-up, debug, validation and support for manufacture. The team and culture You will join the Hardware Engineering team, working closely with PCB, package substrate, system architecture and supplier teams. Work moves through simulation, design review, lab evidence and practical trade-offs. You will be expected to own signal integrity decisions across complex board and package interfaces. The team values careful analysis, pace and clear communication when problems need action. Decisions are made close to the engineering detail. You will challenge designs, guide constraints and help teams reach the best performance possible. What we’re looking for · Strong experience in high-speed digital circuit development, with deep signal and power integrity knowledge · Experience with high-frequency SERDES design and validation, including tens of GHz operation · Expertise using tools such as ANSYS SIWave, HFSS, Mentor HyperLynx or similar · Ability to design BGA and connector launches, via structures and transmission lines for GHz signals · Hands-on lab experience using VNAs, high-speed oscilloscopes and signal generators · Rigorous approach to design, debug and validation, with strong ownership and communication skills While we have outlined a set of requirements, we value transferable skills and diverse experiences.

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OpenAI
📍 San Francisco• Full-time• $347K – $445K/yr
1mo ago

We are hiring a Security Software Engineer to design and implement the hardware-backed security foundations used across OpenAI’s device ecosystem. A central focus of this role is hardening the boundary between our policy systems and the HSMs that protect sensitive cryptographic keys. This boundary determines which operations may be performed, what may be signed, which policies must be satisfied, and how changes to trusted software and policy are authorized. You will develop security-critical software and firmware within, or immediately adjacent to, an HSM trust boundary. Depending on your background, this may include HSM trusted applications, firmware services, cryptographic mechanisms, device drivers, PKCS#11 components, secure-provisioning protocols, or signing-policy enforcement systems. This is a hands-on software-engineering role. You will be expected to design systems, write and review production code, debug across hardware and software boundaries, and carry projects from initial requirements through deployment. It is not an HSM administration, PKI operations, compliance, or architecture-only position. In This Role, You Will Design and implement security-critical software and firmware for HSMs, secure elements, trusted execution environments, and hardware roots of trust. Build and harden the policy-to-HSM boundary responsible for authorizing certificate issuance and cryptographic signing operations. Develop HSM trusted applications, firmware components, host interfaces, device drivers, SDKs, or cryptographic service integrations. Implement or extend cryptographic interfaces such as PKCS#11, OpenSSL providers or engines, platform key-storage APIs, or comparable hardware-security interfaces. Build firmware and software that cryptographically enforces key generation, provisioning, usage, rotation, recovery, and destruction policies. Design and implement HSM-backed certificate authority, code-signing, key-management, and device-identity systems. Develop end-to-end

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Silicon Verification Engineer Multiple roles across different levels Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing. The verification team sits within the Silicon design team and is responsible for ensuring that the RTL created by the logical design team and used by the physical design team matches the architecture specification for Graphcore silicon. The silicon verification engineer is responsible for verification activities within Graphcore, helping the team meet the company objectives for quality silicon delivery. Responsibilities Verification planning, specification and closure of functional coverage Providing feedback to architects Test generation and failure diagnosis/triage Contributing to shared verification infrastructure Ensuring good communication between sites Essential skills: • Verification experience in relevant industry • Proven leadership and planning skills • Highly motivated, a self starter, and a team player • Ability to work across teams and programming languages to find root causes of deep and complex issues • Experience of the verification process applied in CPU and/or ASIC environments • System Verilog, Python, C++, Linux Desirable skills: • UVM • SVA • Assembly languages • LLVM, GCC • DVCS e.g. Git • SGE or other DRMS • XML and XPath/XSLT • Web programming – HTML/DOM, Javascript, SQL Benefits: In addition to a competitive salary, Graphcore offers a competitive benefit

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Silicon Verification Engineer Multiple roles across different levels Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing. The verification team sits within the Silicon design team and is responsible for ensuring that the RTL created by the logical design team and used by the physical design team matches the architecture specification for Graphcore silicon. The silicon verification engineer is responsible for verification activities within Graphcore, helping the team meet the company objectives for quality silicon delivery. Responsibilities Verification planning, specification and closure of functional coverage Providing feedback to architects Test generation and failure diagnosis/triage Contributing to shared verification infrastructure Ensuring good communication between sites Essential skills: • Verification experience in relevant industry • Proven leadership and planning skills • Highly motivated, a self starter, and a team player • Ability to work across teams and programming languages to find root causes of deep and complex issues • Experience of the verification process applied in CPU and/or ASIC environments • System Verilog, Python, C++, Linux Desirable skills: • UVM • SVA • Assembly languages • LLVM, GCC • DVCS e.g. Git • SGE or other DRMS • XML and XPath/XSLT • Web programming – HTML/DOM, Javascript, SQL Benefits: In addition to a competitive salary, Graphcore offers a competitive benefit

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Z
Zoox
📍 Foster City• Full-time• Hybrid• $206K – $240K/yr
1mo ago

As a Wireless Firmware Validation Engineer on the Firmware team, you will own the performance validation, optimization, and debugging of our TCU (Telematics Control Unit). Managing a complex architecture that integrates third-party hardware with our autonomous vehicle platform, you will analyze diagnostics and log outputs across cellular networks, 4G/5G modems, internal software layers, Wi-Fi, and Bluetooth. You will not only reactively troubleshoot complex field issues but also proactively design, facilitate, and evaluate advanced testing campaigns—utilizing industry-standard network emulation tools like the Keysight UXM—to identify cellular edge cases and vulnerabilities before they impact operations. Your work will directly safeguard the safety, reliability, and scaling of the Zoox autonomous fleet. Robust, low-latency connectivity is fundamental to autonomous vehicle deployment, powering essential real-time cloud services, fleet management pipelines, and teleoperation capabilities. By ensuring our vehicles maintain seamless, high-performance connections under the most demanding real-world conditions, you will bridge the gap between cutting-edge hardware, cloud infrastructure, and test systems to enable Zoox to deliver the future of autonomous mobility. You will leverage your substantial prior expertise in connectivity software and protocols (cellular modem cross-layers, Wi-Fi MAC/PHY) to provide critical insights and feedback, guaranteeing that our systems are rigorously tested and hardened for operational deployment. In this role, you will: Test Architecture & Strategy: Define component integration plans (from initial hardware bring-up to advanc

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Silicon Physical Design Engineer Multiple roles across different levels Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing. The physical design team sits within the wider silicon design team which includes RTL, verification and DFT. Our work also involves strong links with architecture, packaging and product engineering. We are responsible for working with those teams to create high-quality RTL and building the final chip layout (e.g. GDSII) ensuring a signoff-quality design is delivered to the Foundry (e.g. TSMC). We are looking to hire high-quality silicon physical design engineers to join our team. The successful candidate will support the team with achieving our goals and creating the right engineering solutions. We are a collaborative team and good communication is essential, as is the ability to adapt and learn. For the successful candidate we offer an open, honest and collaborative environment working on leading-edge designs at the most advanced nodes. Our engineers are not siloed, and they are trusted and encouraged to ta ke ownership of their designs and problem solutions. You will be part of a team that looks for improvements to everything we do: our designs, our flows, our methodologies, our infrastructure. Responsibilities and Duties Applicants will be expected to contribute technically to the development of Graphcore's next generation of AI superchips, fo

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About the job Design the high-speed signal paths that let advanced AI compute systems perform at datacentre scale. As a Signal Integrity Engineer, you will shape the electrical performance of Graphcore hardware platforms. Your work will help 112Gbps and 224Gbps SERDES, DDR and processor interfaces operate within demanding system budgets. You will develop, extract and simulate PCB structures across production systems and test boards. You will define launches, via structures, transmission lines, stack-ups and low-loss materials for future designs. This role spans simulation, lab validation and practical design influence. You will work from concept through prototype bring-up, debug, validation and support for manufacture. The team and culture You will join the Hardware Engineering team, working closely with PCB, package substrate, system architecture and supplier teams. Work moves through simulation, design review, lab evidence and practical trade-offs. You will be expected to own signal integrity decisions across complex board and package interfaces. The team values careful analysis, pace and clear communication when problems need action. Decisions are made close to the engineering detail. You will challenge designs, guide constraints and help teams reach the best performance possible. What we’re looking for · Strong experience in high-speed digital circuit development, with deep signal and power integrity knowledge · Experience with high-frequency SERDES design and validation, including tens of GHz operation · Expertise using tools such as ANSYS SIWave, HFSS, Mentor HyperLynx or similar · Ability to design BGA and connector launches, via structures and transmission lines for GHz signals · Hands-on lab experience using VNAs, high-speed oscilloscopes and signal generators · Rigorous approach to design, debug and validation, with strong ownership and communication skills While we have outlined a set of requirements, we value transferable skills and diverse experiences.

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