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Hardware Systems Architect Jobs

3,565 active opportunities · Updated for October 2026

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Explore current hardware systems architect jobs. Use filters to narrow by work mode, employment type, experience and date posted.

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Zoox
📍 Foster City• Full-time• Hybrid• $209K – $285K/yr
3mo ago

Zoox’s Robot Software Infrastructure Deployment team builds the critical systems that flash and update software and firmware across our vehicles and test fixtures—spanning development, manufacturing, and fleet operations. Our deployment system orchestrates updates across a massive ecosystem: advanced sensors, high-performance compute platforms, automotive ECUs, network switches, and user interface devices. Because of the sheer breadth of this domain, this role offers a unique vantage point. You will maintain a high-level view of our entire architecture while possessing the sharp technical acumen to dive deep into specific components when solving complex engineering challenges. If you thrive on variety, collaboration, and high-impact infrastructure, this team is for you. In this role, you will: Expand Capability: Design and integrate deployment support for next-generation vehicle components and subsystems. Architect Infrastructure: Enhance the core deployment framework, developer tools, instrumentation, and integrations with broader engineering systems. Optimize Performance: Drive systemic improvements in deployment speed, efficiency, and mission-critical reliability. Root-Cause Failures: Triage, debug, and resolve complex deployment failures across hardware and software boundaries. Collaborate Cross-Functionally: Partner closely with Firmware, QA, Systems, Manufacturing, and Fleet Operations teams to ensure seamless end-to-end execution. Qualificat

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OpenAI
📍 Seattle• Full-time• $347K – $445K/yr
Just now

We are hiring a Security Software Engineer to design and implement the hardware-backed security foundations used across OpenAI’s device ecosystem. A central focus of this role is hardening the boundary between our policy systems and the HSMs that protect sensitive cryptographic keys. This boundary determines which operations may be performed, what may be signed, which policies must be satisfied, and how changes to trusted software and policy are authorized. You will develop security-critical software and firmware within, or immediately adjacent to, an HSM trust boundary. Depending on your background, this may include HSM trusted applications, firmware services, cryptographic mechanisms, device drivers, PKCS#11 components, secure-provisioning protocols, or signing-policy enforcement systems. This is a hands-on software-engineering role. You will be expected to design systems, write and review production code, debug across hardware and software boundaries, and carry projects from initial requirements through deployment. It is not an HSM administration, PKI operations, compliance, or architecture-only position. In This Role, You Will Design and implement security-critical software and firmware for HSMs, secure elements, trusted execution environments, and hardware roots of trust. Build and harden the policy-to-HSM boundary responsible for authorizing certificate issuance and cryptographic signing operations. Develop HSM trusted applications, firmware components, host interfaces, device drivers, SDKs, or cryptographic service integrations. Implement or extend cryptographic interfaces such as PKCS#11, OpenSSL providers or engines, platform key-storage APIs, or comparable hardware-security interfaces. Build firmware and software that cryptographically enforces key generation, provisioning, usage, rotation, recovery, and destruction policies. Design and implement HSM-backed certificate authority, code-signing, key-management, and device-identity systems. Develop end-to-end

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8 days ago

NVIDIA is seeking a Senior Technical Program Manager to join the CSP Engagements team, focused on deep technical engagement with hyperscale cloud service providers for NVIDIA’s next‑generation datacenter systems such as Vera Rubin NVL72. This role is intended for experienced systems and embedded software leaders—including software engineering managers, technical leads, or senior architects—who have led datacenter server and platform software programs and can operate as a trusted technical partner to hyperscale CSP engineering teams. As a member of the CSP Engagements team, you will act as the primary technical engagement leader between NVIDIA’s system software organizations and CSP platform, system software, and AI teams, ensuring alignment, readiness, and successful large‑scale deployment of NVIDIA‑based datacenter solutions. What you will be doing: Lead deep technical engagements with hyperscale CSPs as the primary NVIDIA point of contact for system software, firmware, and platform readiness for NVIDIA datacenter products. Partner directly with CSP system software, firmware, and infrastructure engineering leaders to align on software architecture, bring‑up plans, deployment readiness, and production requirements for NVIDIA‑based server and rack‑scale platforms. Represent CSP technical priorities internally, advocating for customer requirements and tradeoffs across NVIDIA’s system software, firmware, hardware, silicon, and product teams are aligned to customer needs, timelines, and constraints. Own the end‑to‑end CSP engagement lifecycle, from early technical alignment and pre‑production readiness through large‑scale deployment, escalation management, and sustained production support. Drive bi‑directional technical communication: translating CSP system‑level requirements into actionable focus areas for NVIDIA engineering teams, while clearly communicating N

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About the Job Lead performance work that turns large-scale AI workloads into faster, more efficient systems. As a Staff AI Performance Engineer, you will analyze and optimize AI training and inference workloads across distributed systems. Your work will connect compute, memory, networking and software behavior. You will lead complex performance workstreams across hardware and software. You will find bottlenecks, validate improvements and turn performance evidence into practical engineering decisions. You will build benchmarks, profile demanding workloads and develop C++ and Python tools for analysis and optimization. Your recommendations will help teams improve efficiency, scalability and reliability. This role gives you broad technical scope across AI infrastructure at data center scale. It is based in Milpitas, California. The team and culture The System Engineering Performance team architects, evaluates and optimizes high-performance infrastructure for large-scale data center deployments. The team works across the computing stack to understand real system behavior. Work moves through evidence, ownership and clear technical judgment. You will lead investigations, coordinate across teams and validate impact with reliable performance data. Decisions are shaped through benchmarks, models, simulations and practical engineering tradeoffs. The team values engineers who think big, act fast, take responsibility, speak up and lead beyond their own area. What we’re looking for · Strong experience profiling and optimizing AI, machine learning or high-performance computing workloads. · Experience with distributed systems and communication libraries such as MPI, NCCL, UCX or libfabric. · Strong C++ and Python skills, including reliable tools or performance-sensitive software. · Deep understanding of compute, memory and communication behavior in large-scale systems. · Ability to lead technically complex work and coordinate improvements across teams. · Familiarity with MLPerf, a

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About the Job Turn complex AI workload signals into faster, more efficient systems at data center scale. As a Senior AI Performance Engineer, you will analyze and optimize AI training and inference workloads across large-scale distributed systems. Your work will connect compute, memory, communication and software behavior. You will own complex performance investigations from problem definition through validation. You will turn profiling, benchmarking and modeling results into improvements engineers can build from. You will design benchmarks, investigate system bottlenecks and optimize distributed communication software across technologies such as MPI, NCCL, UCX and RDMA. Your work will help Graphcore deliver efficient, reliable AI systems for large-scale deployment. This role gives you rare scope across hardware, software, networking and system architecture. It is based in Austin, Texas. The team and culture The System Engineering Performance team architects, evaluates and optimizes high-performance infrastructure for large-scale data center deployments. The team works across the computing stack to understand real system behavior. Work moves through evidence, ownership and clear technical judgment. You will define investigations, coordinate across teams and validate impact with reliable performance data. Decisions are shaped through benchmarks, models, simulations and practical engineering tradeoffs. The team values engineers who think big, act fast, take responsibility, speak up and lead beyond their own area. What we’re looking for · Strong experience profiling and optimizing AI, machine learning or high-performance computing workloads. · Experience with distributed systems and communication libraries such as MPI, NCCL, UCX or libfabric. · Strong C++ and Python skills, including reliable tools or performance-sensitive software. · Deep understanding of compute, memory and communication behavior in large-scale systems. · Ability to own complex technical work and coo

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Graphcore Director-Post Silicon Validation (Functional) Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Austin, Texas which will play a central role in Graphcore's work building the future of AI computing. We are developing the next generation of AI compute, a large-scale system-on-chip (SoC) designed to power future high-performance AI systems. Job Summary We have an exciting opportunity to be part of a collaborative, cross-functional development team validating cutting-edge, high-performance AI chips and platforms. You will play a key role in supporting new product introductions and validation. You will lead a team delivering post-silicon validation across the full AI SoC, working across silicon, firmware, and platform levels. The role requires a deep technical understanding, strong hands-on debug experience, and the ability to collaborate effectively with hardware, software, and systems engineering teams. Working within the Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to provide technical guidance to other engineering team members. In this role, you can leverage our experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes. Th

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H
Hp
📍 Texas• $105.1K – $161.8K/yr
28 days ago

Embedded Firmware and Software Engineer Description - This role is responsible for driving design, development, and debugging of embedded software/firmware for hardware, ensuring efficient and reliable operation. The role collaborates with hardware engineers to integrate software and firmware with hardware components, ensuring seamless communication and functionality. The role works closely with software developers, hardware engineers, quality assurance, and product managers to deliver high-quality products. Responsibilities Owns the preparation and creation of instructional technical manuscripts for firmware operation. Allocates resources to complete programming projects, and designing detailed plans to ensure firmware is functioning properly. Designs enhancements, updates, and programming changes for portions and subsystems of firmware, including DSP, embedded code, EFI drivers, EFI applications and BIOS/UEFI. Analyzes design and determines coding, programming, and integration activities required based on general objectives and knowledge of overall architecture of product or solution. Writes and executes complete testing plans, protocols, and documentation for assigned portion of application; creates solutions for issues with code and integrates into application architecture. Leads a project team of other software firmware engineers and internal and outsourced development partners to develop reliable, cost effective and high quality solutions for assigned systems portion or subsystem. Collaborates and communicates with management, internal, and outsourced development partners regarding firmware design status, project progress, and issue resolution. Represents the software firmware engineering team for all phases of larger and more-complex development projects, from microarchitecture design thro

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Z
Zoox
📍 Foster City• Hybrid• $186K – $255K/yr
2mo ago

Zoox has embarked on a highly ambitious journey to develop a full-stack autonomous mobility solution for our cities. We’re looking for a technical program manager to drive cross-functional programs delivering our next-generation compute platform and sensor architecture — the hardware and software backbone of our autonomous vehicle stack. You'll own program strategy, execution, and risk management across hardware, embedded software, and systems integration teams, working closely with hardware engineering, perception, and platform software groups to ship on schedule. In this role, you will: Own the end-to-end program plan for next-gen compute and sensor software workstreams, from architecture definition through bring-up, validation, and production readiness. Partner with hardware, firmware, perception, and systems engineering leads to align on requirements, interfaces, and milestones across the compute/sensor stack. Identify and drive resolution of cross-team dependencies, technical risks, and schedule conflicts before they become blockers. Build and maintain program schedules, tracking mechanisms, and executive-level status reporting. Facilitate technical trade-off discussions (performance, power, cost, timeline) and drive decisions to closure with engineering leadership. Establish and evolve program management processes (planning cadences, milestone reviews, launch readiness criteria) for a fast-moving hardware-software program. Qualifications BS or MS degree in computer science, engineering or equivalent job experience 8+ years of technical program management experience, with a track record on programs spanning embedded software and hardware (compute platforms, SoCs, sensors, or similar) Strong track record of managing complex, long-running, cross-functional projects Deep familiarity with software, hardware, or automotive development processes An ability to keep the big

Graphcore Director-Post Silicon Validation (Functional) Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Austin, Texas which will play a central role in Graphcore's work building the future of AI computing. We are developing the next generation of AI compute, a large-scale system-on-chip (SoC) designed to power future high-performance AI systems. Job Summary We have an exciting opportunity to be part of a collaborative, cross-functional development team validating cutting-edge, high-performance AI chips and platforms. You will play a key role in supporting new product introductions and validation. You will lead a team delivering post-silicon validation across the full AI SoC, working across silicon, firmware, and platform levels. The role requires a deep technical understanding, strong hands-on debug experience, and the ability to collaborate effectively with hardware, software, and systems engineering teams. Working within the Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to provide technical guidance to other engineering team members. In this role, you can leverage our experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes. Th

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DU
10mo ago

About the Role We are seeking a Staff Quality Engineer to establish and lead the quality program for our prototype assembly line supporting next-generation autonomous food-delivery robots. Reporting directly to the Head of Manufacturing, you will architect the quality systems, processes, and supplier partnerships required to transition our platform from prototype to scalable production. This role demands deep experience in supplier quality, manufacturing process development, and translating system-level requirements into robust controls on the factory floor. The ideal candidate thrives in a fast-paced, hardware-driven environment, is passionate about building high-reliability products, and holds an uncompromising commitment to operational excellence. This role is based in Fremont, CA, with periodic travel to suppliers and manufacturing partners as needed. You're excited about this opportunity because you will… Build the end-to-end quality program for a prototype robotic assembly line, including process documentation, traceability requirements, and manufacturing control plans. Define quality standards and inspection criteria for our parts and sub-assemblies. Establish and manage the supplier quality function, including qualification, audits, PPAP/APQP alignment, and ongoing supplier performance monitoring. Collaborate with systems engineering to derive PFMEAs, connecting system-level risks to process-level controls, inspection steps, and mitigation strategies. Develop in-line quality control processes, including incoming inspection, in-process checks, and end-of-line validation for prototype builds. Lead the Material Review Board (MRB) to drive disposition of non-conformining material (NCM) Lead root-cause analysis (RCA) for build issues, field failures, and supplier-related nonconformances; drive corrective and preventive actions (CAPA). Partner closely with manufacturing, design, systems, and test teams to ensure that quality requirements are integrated from concep

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About us Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Job Summary Working within the Silicon verification team, the silicon verification engineer is responsible for a wide range of tasks within the silicon verification team. This person is responsible for verification activities within Graphcore, helping the silicon team meet the company objectives for quality silicon delivery. The Team The verification team sits within the Silicon design team. We are responsible for ensuring that the RTL created by the logical design team and used by the physical design team matches the architecture specification for Graphcore silicon. Responsibilities and Duties V erification activit i es within the verification team Ensuring good communication between sites Verification planning, specification and closure of functional coverage Providing feedback to architects Test generation and failure diagnosis/triage Contributing to shared verification infrastructure Candidate Profile Essential: verification experience in relevant industry Proven leadership and planning skills Be highly motivated, a self starter, and a team player Ability to work across teams and programming languages to find root causes of deep and complex issues Ability to research along with the knowledge to solve complex problems Presents technical and functional knowledge to design experiments/ projects that contribute to overall

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NVIDIA seeks an exceptional Network Engineer to join the Vertical Verification Group. As a senior engineer, you will contribute to the Vertical Verification work, concentrating on validating and improving complex Ethernet and InfiniBand systems within NVIDIA’s Data Center and HPC environments. You will play a key role in testing advanced networking features, building complex customer-like topologies, and ensuring NVIDIA products meet industry-leading benchmarks of performance, efficiency, and quality. You will collaborate closely with architects, software engineers, and hardware teams across NIC, HCA, switches, CPUs, and GPUs in a fast-paced and highly technical environment. This is an outstanding opportunity to join a highly skilled team and contribute significantly to groundbreaking technology! What you’ll be doing: Review architecture, build, and requirements for new networking features across Ethernet and InfiniBand portfolios Compose and build complex testbed topologies that emulate customer environments Implement, run and optimize integration test plans including functional, regression, and performance testing Identify, reproduce, and debug issues; work closely with R&D to drive root cause analysis and resolution Collaborate with automation teams Analyze and optimize network performance, latency, and efficiency Provide clear status updates, reports, and insights on system quality and performance What we need to see: B.Sc. in Computer Science, Electrical Engineering, or related field (or equivalent experience) 8&#43; years of experience in networking, system validation, or related engineering roles Strong hands-on experience with Linux-based systems Deep understanding of networking protocols (TCP/IP, UDP, Ethernet, VLANs, L2/L3) Experience with routing, switching, and modern data center network architectures<

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About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Responsibilities and Duties We are seeking a highly skilled System Tests & Diagnostics Engineer to develop, extend, and integrate specialized silicon validation and diagnostics tools for next-generation AI SoCs. Unlike traditional validation roles focused on executing test plans, this position is responsible for developing the diagnostic software and stress tools that expose hardware failures, characterize silicon behavior, and improve platform observability throughout bring-up and validation. You will work closely with Arm engineers to understand and extend existing diagnostics technologies while developing Graphcore-specific capabilities for future AI hardware. Role Summary You will work with existing Arm-developed diagnostics technologies and extend them to support Graphcore's next-generation AI silicon. You will be responsible for developing system-level diagnostics and stress tools that integrate with an existing framework to detect data integrity, computational correctness, performance, and reliability issues across CPUs, AI accelerators, memory, storage, PCIe, firmware, BMC, and other platform components. Examples include silent data corruption (SDC) tests, power transient stress tools, and platform diagnostics, with opportunities to develop new diagnostics as future hardware capabilities evolve. This role requires close collaboration with hardware architects, firmware enginee

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DU
DoorDash USA
📍 Minnesota, United States• Remote• $193.8K – $285K/yr
6 days ago

About the Role Global Safety and Security (GSS) protects our people, our sites, and the physical and logical systems that keep the business running. Our security and protection programs are never single-team efforts: one rollout can touch physical security operations, customer experiences, site readiness, hardware provisioning, networking, cloud infrastructure, identity, and the data platforms above them — spanning many countries, on timelines tied to leases, permits, and vendors. About the Team We are hiring a Staff Security Engineer to help design and deliver strategic and durable security services. You own the technical and architectural plan, strategic partner engagement with technology providers, the delivery sequence, the dependencies, and the program status leadership relies on. You are accountable for outcomes influencing teams that you don’t manage. You will collaborate with software engineers, third-party providers, physical security operations, project managers running site readiness and provisioning, and networking and cloud infrastructure partners, and you will keep managers, directors, and senior leaders informed. Security Enablement Engineering delivers security paved paths and capabilities that address systemic security issues through well-designed customer experiences, easy-to-adopt and robust, well-architected security solutions, systematically reducing organizational risk. You’re excited about this opportunity because you will… Own the design of our physical security systems integration layer — such as access control (PACS) and video management (VMS) platforms, the APIs they expose, and the connectors that carry their data into our systems of record. Own end-to-end design and delivery of multi-domain security services spanning physical security systems, hardware provisioning and site readiness, cloud and network infrastructure, identity and access management, key management, and the reporting/observability layers on top. You’ll bring experti

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Nvidia
📍 Santa Clara, United States
9 days ago

NVIDIA Research is seeking extraordinary networking innovators to join our NVResearch team. As a research intern on this team, you will contribute to the development of future high-performance networking and computing systems. We are seeking a balanced background of research excellence in building systems and a deep understanding and broad perspective across the fields of computer architecture and communication systems for distributed computation. NVIDIA has pioneered programmable GPUs and the CUDA language, and this visionary Research team will take those technologies to the next level with its creative ideas and new inventions. This position offers you the opportunity to have a real impact while working with some of the most creative and forward-thinking people in the world who are here at this dynamic, technology-focused company. What you'll be doing: Develop algorithms and design hardware and software, extending the state of the art in computing, networking, and other technology areas surrounding NVIDIA's business. Invent new techniques, technologies, methodologies, processes, and devices, to enable new products or types of products. Deliverable results include prototypes, patents, and publications. Contribute to research that informs NVIDIA's technology direction 5-10 years out. Work focuses on long-horizon problems rather than products currently shipping or in development, except as to how they can be extended and improved. Projects can include but are not limited to: optimizing communication stacks for AI training and inference, designing network protocols and congestion control, co-designing AI systems across software and hardware, developing circuits and microarchitecture for network controllers and switches, and architecting networks built on optical switching and silicon photonics. What we need to see: Pursuing a

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