Hbm Mrda Shift Process Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s growth depends heavily on the Global Procurement team, which delivers powerful cost management and supply chain resiliency. We apply pioneering predictive capabilities and risk assessment with a strong focus on sustainability and diversity. Our business goals align with the importance we place on our team members – our greatest asset. We invest in people through a skill-based learning and development model to establish clear career paths. We also promote an engaging and inclusive culture by building camaraderie and recognizing diverse perspectives among all our distributed team members. Join us to discover why Micron’s Global Procurement team is the preferred place to advance your talent! Serving as Senior Category Supplier Manager for Advanced Packaging Material at Micron, you will gain a remarkable chance to lead a major strategic supplier or group of suppliers. You will contribute to Micron’s outstanding data retention and data management offerings. Your role includes collaborating with colleagues from multiple categories to maintain outstanding supplier support for goods and services. You will also partner internally to define and track crucial performance metrics. Your expertise will play a key role in directing supplier approaches to optimize cost, supply, and quality. Responsibilities Global Category Strategy & Market Leadership: Own and establish global category strategies for Advanced Packaging Material to foster innovation in solutions for HBM and wafer-level packaging technology. L

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. As a Principal/MTS Engineer, you will be an integral part of our HIG HBM Team in Hyderabad, India, responsible for designing and developing complex Application-Specific Integrated Circuits to meet our product's specifications and requirements for High Bandwidth Memories, working for intensive applications such as artificial intelligence and high performance computing solution. Your expertise will contribute to the successful realization of pioneering semiconductor products, enabling our company to maintain its competitive edge in the industry. Role and Responsibilities Must have a solid understanding of die design . This includes knowledge of various die components, their functions, and how they interact within the overall tool. Familiarity with the principles of die design is essential to create effective and efficient layouts. Industry Involvement : You actively participate in standards committees, representing Micron and staying informed about industry developments. Leading Project Layout Team : You lead the establishment and growth of a layout team to meet Micron’s global HBM layout requirements. Technical Expertis

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Title: Technical Leadership Plrogram - Member Of Technical Staff – HBM Verification Location: Hyderabad, India Experience : 12+ years in Design Verification (experience with Pre-Silicon Verification OR DDR/GDDR/LPDDRmemory/SerDes PHY IP Verification is preferred) Role Description Join the Micron HBM team where you will drive verification architecture for next-generation HBM, ensuring robust methodologies and sign-off strategies. This role is perfect for a hands-on silicon verification expert who is passionate about developing best-in-class verification methodologies, testbench design, AI enabled verification and developing novel solutions to improve quality and efficiency of verification workflows. Key Responsibilities Define and drive verification architecture and methodology for next generation HBM designs. Develop verification plans, coverage strategies, and sign-off criteria. Architect and implement UVM-based testbenches and reusable verification components. Apply Formal Verification techniques for critical Collaborate strictly with build teams to ensure verification completeness and quality. Mentor and guide verification engineers on guidelines and advanced methodologies. Evaluate and integrate AMS Co-Simulation techniques for mixed-signal IP verification. Work closely with EDA vendors to adopt the l

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s HBM Design Architecture organization, where we push the limits of memory technology every day. Our team works across global, multicultural engineering groups to build next-generation HBM solutions that power AI and machine learning. We believe the best ideas come from collaboration, curiosity, and a shared drive to innovate! This role plays a critical part in ensuring the reliability of Micron’s most advanced DRAM and HBM products. As an ESD & Latch Up Engineer, you will shape protection strategies from early design through high-volume manufacturing, working hands-on with silicon, layout, and foundry partners. If you enjoy solving deep technical problems and influencing product robustness at scale, this role offers both impact and growth. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities: Define and own chip-level and IP-level ESD and latch up strategies for HBM DRAM, base die, I/O, TSVs, and die-to-die interfaces Establish ESD and latch up requirements, targets, and sign-off criteria aligned with JEDEC/ESDA standards Enable ESD protection circuits and latch up safe layout practices across designs and technologies Lead silicon validation, failure analysis, and correlation of pre-silicon assumptions to silicon results Act as the technical interface to

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. The PSE Strategy Program Manager drives strategic initiatives that directly enable high‑quality, scalable engineering execution in alignment with the product roadmap . This role focuses on ensuring that Product & Systems Engineering (PSE) has the right strategic clarity, domain enablement, and execution frameworks to deliver against increasingly complex and fast‑moving product priorities. A key aspect of the role is owning and driving the AI strategy within PSE , leveraging AI and aligning engineering use cases and delivery with the broader TPG AI strategy. The Program Manager identifies where AI and emerging tools can meaningfully accelerate engineering workflows, decision‑making, and product delivery, and drives disciplined execution across multiple initiatives to maximize impact on roadmap outcomes. Operating at the intersection of engineering strategy and execution , this role translates product and technology direction into structured programs, clear priorities, and measurable success indicators. The ideal candidate partners closely with engineering leaders to enable improved execution at scale and provide executive‑level insight that helps leadership make informed tradeoffs, ultimately strengthening PSE’s ability to deliver on the roadmap with

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s HBM Design Architecture organization, where we push the limits of memory technology every day. Our team works across global, multicultural engineering groups to build next-generation HBM solutions that power AI and machine learning. We believe the best ideas come from collaboration, curiosity, and a shared drive to innovate! This role plays a critical part in ensuring the reliability of Micron’s most advanced DRAM and HBM products. As an ESD & Latch Up Engineer, you will shape protection strategies from early design through high-volume manufacturing, working hands-on with silicon, layout, and foundry partners. If you enjoy solving deep technical problems and influencing product robustness at scale, this role offers both impact and growth. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities: Define and own chip-level and IP-level ESD and latch up strategies for HBM DRAM, base die, I/O, TSVs, and die-to-die interfaces Establish ESD and latch up requirements, targets, and sign-off criteria aligned with JEDEC/ESDA standards Enable ESD protection circuits and latch up safe layout practices across designs and technologies Lead silicon validation, failure analysis, and correlation of pre-silicon assumptions to silicon results Act as the technical interface to foundries and partner closely wit

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. About the Role As a Member of Technical Staff (MTS) in Micron’s HBM Product Engineering Component Validation team, you will serve as a technical leader and authority for the validation of advanced High Bandwidth Memory (HBM) products. You will apply deep DRAM and HBM architecture and design knowledge to define validation coverage strategy, lead complex product debug and failure analysis, and drive a zero-escape validation mindset across all test modes and product milestones. Operating within Micron’s global validation organization and partnering closely with teams across multiple sites, you will influence design-intent-to-coverage decisions, mentor engineers, and set the technical direction for current and next-generation HBM validation. Responsibilities and Tasks Technical Leadership & Validation Strategy Act as a technical authority for HBM Component Validation, translating DRAM/HBM design intent and architecture into comprehensive validation coverage and test strategy. Define and own validation methodologies and coverage plans across structural (black-box) and functional test flows, driving toward full validation coverage at each product milestone with zero validation escapes. Lead validation definition and closure for new and high-risk product

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) within Micron's Technology and Products Group (TPG) leads the development of High Bandwidth Memory (HBM) solutions for AI and ML applications. Our modern builds use Through Silicon Via (TSV) technology. We stack multiple DRAM chips on a high-speed memory controller with a coordinated logic chip in one package. This new way improves memory density and bandwidth through parallelization. It aims to deliver the lowest power per bit solutions in the industry. As a Design Engineer at Micron Technology, Inc., you will be responsible for designing and analyzing digital and analog circuits used in the development of memory products. We are engaged in developing groundbreaking silicon-to-systems solutions – right from technology development and advanced memory designs to product development, systems design and validation resulting in world class memory solutions. In this position, you will collaborate with Micron’s various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction. You will contribute to the design and delivery of next‑generation memory products by working across circuit design, layout, and validation. You will apply simulation, modeling, and verification skills to improve

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) within Micron's Technology and Products Group (TPG) leads the development of High Bandwidth Memory (HBM) solutions for AI and ML applications. Our modern builds use Through Silicon Via (TSV) technology. We stack multiple DRAM chips on a high-speed memory controller with a coordinated logic chip in one package. This new way improves memory density and bandwidth through parallelization. It aims to deliver the lowest power per bit solutions in the industry. Micron is seeking a Design Infrastructure Engineer to build, enable, and scale characterization infrastructure and deliver generated IP to multiple advanced memory and logic developments. This position includes characterizing both standard and custom cells across various process technologies. These encompass Micron internal nodes as well as external foundries, such as TSMC. The position supports multiple HBM product lines, including HBM DRAM dies, Logic dies (JEDEC and custom variants), and advanced 3D HBM architectures. You will work where circuit build, EDA infrastructure, and silicon validation readiness meet. You will develop robust, scalable, and high-quality characterization flows. These flows directly affect timing closure, power modeling, and product quality for next-generation HBM programs. Responsibilities: Develop and sustain scalable infrastructure for standard cell and custom cell characterization, encompassing timing, power, noise, and signal integrity modeling. Build reusable, a

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. 1. Global Category Strategy & Market Leadership - Own and define global category strategies for Advanced Packaging Material to drive innovation in solutions for HBM and wafer-level packaging technology. - Lead market intelligence, including: Supplier landscape & capability mapping, Technology roadmaps & inflection points, Pricing models and long ‑ term cost curves. - Shape dual ‑ source / alternate ‑ source strategies and supply base optimization to mitigate concentration and continuity risks. 2. Executive ‑ Level Supplier Relationship Management - Act as Micron’s primary commercial lead for strategic material suppliers, executive reviews, and escalation governance with supplier executives. - Drive alignment on Capacity commitments, Technology enablement and Long ‑ term partnership frameworks. 3. Commercial Negotiation & Contracting - Lead sourcing events/RFQ process into bundled negotiation - Lead negotiations for contract extensions and renewals, renegotiation of prices, transfers, etc - Apply should ‑ cost, total cost of ownership (TCO), and global benchmarking models to negotiations. - Own strategy, governance, and renegotiations as market or capacity conditions shift. 4. Cost,

Principal HIG ESD and Latch-up Engineer- HBM - TPG — 2 Locations. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Develop test plans at SOC Level and analyze Coverage. Build verification environments to verify complex SOCs. Develop Random/Directed test in RTL and GLS environments. Review architectural specifications to ensure high quality. Work with customers to understand their verification and validation requirements and provide the necessary collateral. Engage with customers to support issues with current HBM architectures and find opportunities to innovate on future HBM solutions. Work with IP suppliers to ensure that proper verification and validation collaterals are provided. Identify and flag quality issues, performance problems, and opportunities to reduce power consumption. Debug and identify root causes and solutions for pre-silicon and post-silicon issues encountered in current HBM products and architectures. Employer will accept a Bachelor’s degree in Electrical and Computer Engineering, or related field and 3 years of experience in the job offered or in a related occupation. Position requires: 1. SoC or IP verification; 2. Writing tests and developing verification environments using System Verilog and UVM; 3. Building verification environments or validating complex SOCs; 4. Working with IP vendors and verifying IP integration; 5. Gate-level simulation (GLS); 6. Python; 7. UCIE, memory controller, NOCs, MBIST, or ATPG scan controllers; and 8. DRAM operation and JEDEC specifications such as HBM product family. <p

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description At Micron, we are transforming how the world uses information to enrich life. The High Bandwidth Memory (HBM) Design team develops industry-leading memory solutions that power Artificial Intelligence (AI), high-performance computing, graphics, and data center applications. Our team collaborates across Design, Verification, Physical Design, Product Engineering, and CAD organizations to deliver next-generation memory technologies. As an HBM Design Engineer Intern, you will work alongside experienced engineers on the design, development, and validation of advanced HBM products. This internship provides hands-on experience with semiconductor design methodologies, industry-standard EDA tools, and AI-assisted engineering workflows while contributing to real-world memory design projects in a collaborative global environment. Responsibilities Assist with HBM memory and logic design activities, including RTL development, circuit implementation, simulation, verification, and functional analysis. Deve

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s Heterogeneous Integration Group (HIG) is shaping the future of AI and accelerated computing by developing advanced memory solutions! The team focuses on designing and optimizing High Bandwidth Memory (HBM) products for AI/ML, high-performance computing (HPC), and data-centric systems, collaborating across global engineering and product teams to deliver industry-leading performance, power efficiency, and reliability! HBM product family is growing due to high demand from industry-leading semiconductor companies. As an HBM Memory Design Engineer you will work closely with cross-functional teams including Design Engineering (DE), Product Engineering (PE), Process Integration, Packaging, and Technology Development (TD) to analyze and resolve silicon issues across HBM products . You will collaborate with architecture to understand new or updated specification requirements and contribute to the implementation, verification, and maintenance of design updates , supporting both silicon release and ongoing product lifecycle needs. This role requires strong AI driven technical execution and the ability to independently drive complex issues to closure. Responsibilities Design Support: Work on HBM product design and support sustaining design maintenance (ECOs/spec changes). Silicon Debug: Own end-to-end debug of silicon, system, and customer issues, driving root-cause analysis and resolution. Cross-Functional Collaboration: Work closely with DE, PE, TD,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are looking for experienced EDA/CAD engineer with hands-on AI, ML, or LLM experience who is excited to shape the next generation of AI-assisted workflows for custom memory development. In this role, you will apply your expertise in IC design, layout, verification, simulation, and design automation to identify and deliver high-value solutions that improve engineering productivity, quality, and cycle time. This position offers the opportunity to build on a strong CAD foundation while growing into a broader AI-focused role over time. Responsibilities Design, develop, and deploy software, automation, and AI-assisted solutions that improve IC design workflows across layout, verification, simulation, and tape-out activities Develop and enhance AI-assisted tools, agents, and automation that improve engineering productivity and design team efficiency Collaborate with worldwide design, layout, verification, and CAD teams to identify high-impact use cases for automation and AI enablement Build and maintain CAD tools, workflow integrations, and supporting technical content for design teams Support evaluation, qualification, deployment, and integration of EDA tools and AI-enhanced workflows Explore and apply generative AI and machine learning techniques to practical custom IC design and design enablement challenges Contribute to scalable software development practices, including code quality, testing, maintainability, and documentation Required Qualific