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Micron Memory Japan にて、最先端の NANDフラッシュメモリ技術の開発を担う不揮発性メモリ設計エンジニア（NAND Designer）を募集しています 。 本ポジションでは、次世代NANDフラッシュメモリの中核となる回路設計・最適化に携わり、 業界の新たな標準を築く高性能NAND製品の実現に直接貢献していただきます。 意欲的で卓越したエンジニアが集うチームの一員として、最先端技術の創出に挑戦できる環境です。 職務内容（Responsibilities） NANDフラッシュメモリのベースダイ（Base Die）設計…

Key Responsibilities Lead verification strategy, architecture, and execution across RTL, AMS (Analog Mixed-Signal), and Transistor-Level Verification (TAV) domains, driving key technical decisions throughout the product lifecycle. Define and implement verification methodologies,…

Job Description: As a Design Engineer for Non-Volatile Memory Datapath Functional Group at Micron, you will support design and validation activities of Datapath and DDR high-speed interfaces of Flash Memory (non-volatile memory) products. Prior experience in Plane Datapath…

Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon IP designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Develop and maintain test benches and test…

Responsibilities and Duties include, but not limited to: Chipping in to the development of new NAND Flash Memory by assisting with the overall design, layout, and optimization of Memory/Logic circuits Supervising and own the full chip verification activities including planning,…

The Senior Design Engineer is responsible for designing, simulating, and optimizing DRAM circuits while supporting the development of digital and analog circuitry used in advanced memory products. This role collaborates globally across design, verification, product engineering,…

Micron's Design-Technology Co-Optimization (DTCO) team plays a critical role in bridging semiconductor device technology and circuit design to enable next-generation DRAM products. The team evaluates emerging technologies, develops methodologies for performance assessment, and…

Responsibilities Design and maintain standard cells for new DRAM products on new technology Closely collaborate with DTCO team to develop stdcells architecture for emerging technologies Characterization and modeling of Standard cells to provide timing/power model Quality…

As a Principal Design Engineer, you will build the future of memory by architecting and delivering high‑performance DRAM circuit compositions for advanced technology nodes. In this highly visible technical leadership role, you’ll develop innovation across building, layout,…

Job Summary As an MTS Design Verification Engineer, you will serve as a technical leader driving innovation in DRAM verification for advanced memory products. This role focuses on leading design and verification strategy, influencing key technical decisions, and ensuring…

Roles and Responsibilities Verification of Analog and mixed signal circuits. Generation of a Full chip mixed signal simulation environment where analog, digital and FW co-exist. Schematic/behavioral model generation of certain blocks to make FC simulation feasible/efficient…

NAND Designer / Layout at Micron in Tokyo, Japan, Japan. Full-time · On-site.

Job Description: As a Mixed-Signal Design Engineer in Micron’s Pathfinding Design Team, you will play a key role in crafting next-generation memory technologies. This position involves contributing to defining, developing, and analyzing high-speed logics to operate the memory.…

Senior Engineer - Standard Cell Design at Micron in Hyderabad, Phoenix Aquila, India. Full-time · On-site.

Staff Engineer - Standard Cell Design at Micron in Hyderabad, Phoenix Aquila, India. Full-time · On-site.