Methodology Jobs

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role As a software engineer on the Scaling team, you’ll help build and optimize the low-level stack that orchestrates computation and data movement across OpenAI’s supercomputing clusters. Your work will involve designing high-performance runtimes, building custom kernels, contributing to compiler infrastructure, and developing scalable simulation systems to validate and optimize distributed training workloads. You will work at the intersection of systems programming, ML infrastructure, and high-performance computing, helping to create both ergonomic developer APIs and highly efficient runtime systems. This means balancing ease of use and introspection with the need for stability and performance on our evolving hardware fleet. This role is based in San Francisco, CA, with a hybrid work model (3 days/week in-office). Relocation assistance is available. In this role, you will: Design and build APIs and runtime components to orchestrate computation and data movement across heterogeneous ML workloads. Contribute to compiler infrastructure, including the development of optimizations and compiler passes to support evolving hardware. Engineer and optimize compute and data kernels, ensuring correctness, high performance, and portability across simulation and production environments. Profile and optimize system bottlenecks, especially around I/O, memory hierarchy, and interconnects, at both local and distributed scales. Develop simulation infrastructure to validate runtime b

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role As a Hardware Chips Programs Manager at OpenAI, you will help bring our chips hardware roadmap to life, navigating an array of technical and partnership challenges. We’re looking for people excited to push the frontiers of computing by navigating technical explorations and are passionate about building. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Manage the design and implementation planning of our ML acceleration hardware, working across technical, cross-functional and external stakeholders Lead planning and scheduling of chip hardware designs with our strategic partners and vendors Coordinate and marshal internal resources and communication for efficient interaction with partners and vendors. You might thrive in this role if you: Have experience as a technical program manager for data center hardware products (server, GPU, TPU, networking, storage and so on) Know the whole end-to-end system program management from concept, design, production, deployment into the data center Have some experience with System SW programs through NPI Want to help design some of the world’s largest supercomputing systems, working at the edge of complex hardware challenges Enjoy working with and enabling world-class AI Researchers and Engineers Are passionate about the technical program function, and enjoy independently owning and delivering on your tea

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role You will develop and evolve the tooling ecosystem that hardware engineers rely on every day — from hardware compilers and IR transformations to simulation, debugging, and automation infrastructure. The work spans software engineering, compiler concepts, and practical hardware workflows, with direct impact on how quickly and effectively we design next-generation AI systems. You’ll collaborate closely with architects, RTL designers, and verification engineers to translate real engineering friction into durable, scalable tooling solutions. In this role you will: Build and improve the software tooling that makes hardware teams faster: compilation, IR transforms, RTL generation, simulation, debug, and automation. Extend and integrate hardware compiler stacks (frontends, IR passes, lowering, scheduling, codegen to Verilog/SystemVerilog) and connect them to real design workflows. Improve developer experience and reliability: reproducible builds, better error messages, faster iteration loops, and dependable CI and regression infrastructure. Work closely with designers and verification engineers to turn real pain points into durable tools. Dive into RTL when needed: read and reason about Verilog/SystemVerilog to debug issues, validate tool output, and improve debuggability. Be willing to go all the way down the stack when necessary, including gate-level views, synthesis results, and implementation artifacts. Help enable PPA optimization loops by building analysis and au

About the team: OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the role: We are seeking an experienced Optical Network Engineer to lead Laser related work within our optical interconnect efforts for large-scale compute systems. The role also requires broad, hands-on optical validation experience across IM/DD-based interconnects, working from lab characterization through production readiness and scaled deployment. In this role you will: Drive laser-focused requirements and technical direction within the broader optical interconnect roadmap. Lead evaluation and validation of optical components and subsystems, including laser-based elements, in lab and production-representative environments. Support end-to-end optical testing for IM/DD interconnects (e.g., module/system bring-up, characterization, debug, and readiness for scale). Work with external partners to align on development milestones, performance targets, and quality expectations. Own technical issue triage and resolution across performance, reliability, and manufacturability topics. Collaborate across internal teams to support integration, rollout, and operational success at scale. You might thrive in this role if you have: Strong experience in laser-focused optical engineering (development, validation, manufacturing readiness, or field support). Broad hands-on background with IM/DD optical technologies and optical test/debug workflows. Experience working with external suppliers/manufacturing partners and production-oriented execution. Demonstrated ability to debug complex t

Technical Project Manager Location: Noida Experience: 5–8 Years About the Role We are looking for a proactive Project Manager to drive end-to-end delivery of engineering programs across the Software Development Life Cycle (SDLC). The ideal candidate should have hands-on experience managing technical projects, strong knowledge of Agile methodologies, expertise in Jira and Confluence, and the ability to collaborate effectively with Product, Engineering, and Leadership teams. Key Responsibilities Manage end-to-end technical project delivery across the SDLC. Drive sprint planning, backlog grooming, release planning, and cross-team coordination. Configure and manage Jira, Confluence, dashboards, and project documentation. Track project progress, dependencies, risks, and delivery milestones. Monitor engineering metrics such as velocity, cycle time, throughput, and sprint predictability. Partner with Product, Engineering, and Leadership to ensure timely execution and alignment. Maintain RAID logs, project reports, and status updates. Continuously improve project management processes and delivery efficiency. Requirements 4–5 years of Project/Program Management experience in engineering or product organizations. Strong understanding of Agile, Scrum, Kanban, and SDLC. Hands-on experience with Jira and Confluence. Proven stakeholder management and cross-functional coordination skills. Experience tracking engineering delivery metrics and managing project risks. Excellent communication, problem-solving, and organizational skills. Bachelor's degree in Engineering, Computer Science, Business, or a related field.

The Lead Process Excellence will drive the adoption and execution of Business Excellence initiatives across Adani Group businesses by conducting maturity assessments, building organizational excellence capabilities, developing and certifying Subject Matter Experts (SMEs), and enabling continuous improvement programs. The role is responsible for strengthening process excellence practices, driving operational improvements, enhancing organizational capability, and ensuring sustainable business impact through structured excellence frameworks and methodologies. Source: Adani Group | Job ID: 56684

About the Team OpenAI’s Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team is responsible for building the next generation of AI-native silicon while working closely with software and research partners to co-design hardware tightly integrated with AI models. In addition to delivering production-grade silicon for OpenAI’s supercomputing infrastructure, the team also creates custom design tools and methodologies that accelerate innovation and enable hardware optimized specifically for AI. About the Role We're looking for an Optical Interconnect System Engineer to design, qualify, and deploy scalable optical connectivity for large-scale AI infrastructure. This role spans fiber-system architecture, optical-mechanical integration, validation, reliability, deployment, and serviceability. You will work with optical, mechanical, electrical, networking, manufacturing, reliability, and data-center teams to translate system needs into practical interconnect solutions. This is a hands-on role for someone who can connect design decisions with installation, qualification, troubleshooting, and long-term operational performance. In this role, you will: Define optical interconnect architectures and requirements across hardware platforms and rack-level systems. Design high-density fiber systems for performance, density, reliability, installation, and serviceability. Lead optical-mechanical integration and cross-functional design reviews. Develop test and qualification plans for optical components, modules, switching platforms, and integrated systems. Own optical loss budgets, routing guidelines, handling requirements, and serviceability criteria. Support system bring-up, deployment, troubleshooting, failure analysis, and reliability improvement. Create reusable design guidelines, interface requirements, and qualification methods. You might thrive in this role if you have: Core experience Experience desi

Secure Every Identity, from AI to Human Identity is the key to unlocking the potential of AI. Okta secures AI by building the trusted, neutral infrastructure that enables organizations to safely embrace this new era. This work requires a relentless drive to solve complex challenges with real-world stakes. We are looking for builders and owners who operate with speed and urgency and execute with excellence. This is an opportunity to do career-defining work. We're all in on this mission. If you are too, let's talk. You will proactively construct and own an AI-forward research roadmap for key product pillars at Okta, operating at the intersection of Identity, Security, and Artificial Intelligence. As a Staff-level individual contributor, you will drive both qualitative and quantitative methodologies to define user experiences for non-deterministic AI agents, automated workflows, and developer platforms. Additionally, you leverage agentic tools and AI workflows internally to scale qualitative coding, synthesis, and research operations across the organization. In this role, you’ll get to: Drive AI Agent Research: Lead foundational and evaluative research on autonomous AI agents and the security thereof. Execute Balanced Mixed-Methods: Drive qualitative depth (contextual inquiry, cognitive walkthroughs) and quantitative rigor (large-scale surveys, behavioral telemetry, statistical modeling) to evaluate AI products. Pioneer AI Research Operations: Integrate AI tools, prompt engineering, and agentic research workflows into your daily practice to accelerate quality research outputs. Lead Cross-Discipline Collaboration: Facilitate research to drive cross-discipline clarity, executive alignment, and decision-making across complex security and admin workflows. Solve Complex Problems: Bring stakeholders together across multiple teams to scope problems and collaborate on research in ways that nurture a culture of curiosity and learning. Cultivate Empathy: Design mechanisms to bui

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an Analog Verification Engineer at Micron Technology, Inc., you will help shape advanced analog verification methodologies for next-generation DRAM products. In this role, you will develop scalable verification solutions, improve coverage and efficiency, and contribute to high-quality silicon through innovation, automation , and close collaboration with design teams. Experience with reliability verification methodologies is a strong plus, but not a requirement; candidates with solid analog verification expertise and a willingness to grow in reliability-focused verification are encouraged to apply. Our team vision is a continuing desire to develop your skills working in an inclusive diverse environment of multicultural Teams across worldwide geographies! Enabling the creative career path, you deserve with a collaborative environment and groundbreaking technology and growing upon your imagination and creativity. Responsibilities Define and drive DRAM analog verifi

A Career with Point72's Technology Team As Point72 reimagines the future of investing, our Technology team is constantly evolving our firm’s IT infrastructure and engineering capabilities, positioning us at the forefront of a rapidly evolving technology landscape. We’re a team of experts who experiment and work to discover new ways to harness open-source solutions, modern cloud architectures, and sophisticated Artificial Intelligence (AI) solutions, while embracing enterprise agile methodologies. Our commitment to building and innovating in the AI space provides the framework intended to drive smarter decision making and enhance how we build and operate our platforms and applications. As a member of Point72’s Technology team, we encourage and support your professional development from day one—helping you advance your technical skills, contribute innovative ideas, and satisfy your own intellectual curiosity—all while delivering real business impact for our multi-billion-dollar global business. WHAT YOU’LL DO Lead the implementation, adoption, and continuous improvement of our enterprise privileged access management program to protect critical systems and sensitive access paths Develop and maintain privileged access policies, standards, governance processes, and operating procedures aligned with industry best practices and regulatory expectations Partner with infrastructure, security, cloud, application, and engineering teams to onboard applications, privileged accounts, service accounts, and systems into the platform Apply least privilege, segregation of duties, and risk-based access principles across privileged access workflows and control remediation efforts Lead privileged access certification campaigns and audit responses by validating access rights, producing evidence, and remediating findings Monitor operational health, security posture, and program effectiveness through performance indicators, risk indicators, dashboards, trend analysis, and management reporti

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As part of Micron's DRAM Verification organization, you will work within a highly innovative engineering team responsible for verifying advanced memory products that power next-generation computing systems. The team develops and validates sophisticated DRAM technologies that require complex functionality verification, ultra-high-speed operation, advanced low-power capabilities, and power management features. As a DRAM Verification Engineering Intern, you will collaborate with global design and verification teams to ensure the quality and functionality of future DRAM products. You will gain hands-on experience using industry-standard verification tools, simulation environments, debugging methodologies, and advanced verification techniques while contributing to real product development efforts. This role also provides opportunities to employ Artificial Intelligence and AI Assisted tools to improve verification efficiency, analysis, and workflow automation. Responsibilities Perform verification activities including datasheet analysis, verification planning, simulation execution, coverage analysis, debugging, and results review. Support modeling and simulation efforts using industry-standard verification and circuit simulation tools. Collaborate with global design, verification, and multi-functional engineering teams to drive standardization, improve design quality, and support successful product development. Contribute to innovation in future memory technologies by applying adva

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Summary Micron's Firmware & Product Test (FPT) team is hiring a Principal Test Development Engineer to lead front-end firmware validation for enterprise SSDs. In this role, you'll own verification strategy for NVMe front-end features, drive automation framework development, and serve as a technical authority for failure analysis and debug methodologies. You'll leverage AI-enabled tools and workflows to accelerate validation efficiency. You'll mentor engineers, define test coverage standards, and collaborate with firmware architects to influence testability decisions. The FPT team builds verification plans in Python, enforces NVMe and security protocol compliance, and executes white-box, grey-box, and black-box testing across simulation, FPGA, and prototype hardware environments. Responsibilities Lead design and execution of firmware verification strategies for NVMe front-end features (SMART, Trim, Get Log Page, OCP, Identify, Namespace Management) across multiple product lines. Own end-to-end test development lifecycle — from spec analysis and test planning through automation, execution, and coverage closure. Drive root-cause analysis for critical field and regression failures; establish systematic debug methodologies using coyote logs, protocol analyzers, and firmware traces. Architect and maintain scalable test automation frameworks that become organizational standards for firmware quality. Lead failure analysis efforts, correla

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. You will drive measurable outcomes in labor productivity and annualized hour savings by implementing strategies focused on standardization, simplification, automation, and leveraging generative AI methodologies. These approaches will enable reductions in labor hours, enhance labor efficiency, shorten cycle times, and improve overall operating cadence. Responsibilities Program Management and Delivery Drive year over year improvement in Frontend (FE) labor productivity VAM/HC in support of the 5MORE productivity roadmap. Lead E2E execution and governance of FE labor productivity programs to ensure on time delivery and measurable outcomes. Standardize tools, methods, and processes across sites to enable scalable and repeatable execution aligned with enterprise goals. Integrate labor initiatives across AI, automation, robotics, DREAM team, and innovation programs into a coh

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Technical Execution & PI Ownership Lead day‑to‑day Process Integration execution for assigned DRAM modules within the Advanced Technology & Engineering (ATE) organization. Own yield ramp, stability, and integration readiness for assigned scope during technology transfer, pilot, and early HVM phases. Drive root cause investigations for top yield detractors using DOE, SPC/FDC, FMEA, 8D, and structured problem‑solving methodologies. Ensure process window margin, manufacturability, and reliability requirements are met and sustained. Champion adoption of Best‑Known Methods (BKM) and site‑to‑site learning to reduce variability and accelerate learning cycles. Technology Transfer & Ramp Support Execute DRAM technology transfer activities from TD or donor fabs to ID1 under guidance from M2/M3 leadership. Support new product introduction (NPI), process qualification, and customer ramp readiness. Coordinate inter‑fab learning reviews, gap assessments, and corrective action follow‑through. Support extended international assignments (3+ months) for training and technology transfer as required. People Leadership & Coaching Manage and develop a team of Process Integration engineers (NCG and experienced). Provide technical guidance, mentoring, and coaching on PI fundamentals, module ownership, and execution rigor. Set clear priorities, expectations, and deliverables aligned with ramp milestones and fab n

This role is responsible for driving business excellence and organization transformation through continuous improvement initiatives, while ensuring compliance with IMS, DISHA, ABEM, and other quality frameworks through regular audits, training, and process management. Additionally, this role will also oversee equipment management strategies, optimize resource allocation, and maintain high standards of operational excellence in line with Six Sigma methodologies. Source: Adani Group | Job ID: 56039