Package Assembler Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key responsibilities and task:- To lead and manage the NPI activities as a Product Owner, working together with cross functional teams to accomplish organizational and business objectives by: Driving New Product Introduction process through NPI Phase Gate Review. Coordinating new product start-up and to achieve first pass qualification. Understand new product start-up datelines, product applications and customer requirements; and communicate this information to the new product start-up team Working with process / equipment / manufacturing / planning area owners to bring new product and package into volume production; Providing timely support of First silicon, Engineering samples, Qual samples and meeting expectation on Engineering Hot lots cycle time as per PDT schedule. Regular monitoring the product yield trend; QDR and reliability to ensure that assembly operation is in control and initiate early attention if necessary; Owning the entire Product Life Cycle, from NPI to EOL. Understanding new product challenges and collaborate with Process / Equipment/Development owners to develop new technology capabilities ahead of market Acting as a point of contact to TPM on product related matters. Requirements: Bachelor's degree in an Engineering (Mechanical, Material, Chemical, Electrical ). Passionate in backend engineering process or package development. Eager to learn technical knowledge in com

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. The PDE Process Integration (PI) Engineer is responsible for driving process integration excellence for High Bandwidth (HBM) products during New Product Introduction (NPI) . This role ensures robust process readiness, yield ramp, and cross‑module integration across Post Wafer Finishing PWF, assembly, and test , enabling successful execution of HBM technology roadmaps. The PI Engineer works cross‑functionally with Fab, Assembly, Test, Yield, Quality, and central engineering teams to identify risks early, resolve complex integration issues, and deliver NPI milestones on time. Job Responsibilities Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements. Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work. NPI Execution & Support Execute assigned HBM NPI PI tasks following defined procedures and phase‑gate requirements Support NPI builds through lot tracking, data collection, and

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities and Tasks -Facilitate GMRB for all Micron induced quality events -Facilitate rescreen meeting -Ensure proper containment and disposition of materials -Propose appropriate risk assessment and align with stakeholders (including and not limited to Packrel and QRA teams) for MRB disposition -Drive effectiveness for MRB metrics -Provide input and guide LMRB team to make disposition -Present GMRB issue to GQ management -Work with supply chain on the business risk and recovery update for GMRB issue -Drive recovery activities at AT sites (including and not limited to FG) Assist Package Reliability Engineers by Collecting and Analyzing Data, and Developing Analysis Tools -Consult with internal customers to understand needs -Develop tools for extracting and formatting data -Extract, organize, and analyze data for internal customers -Analyze and report data Collaborate with AT Operations and network on getting GMRB & recovery activities key action item closed -Getting correct action owner for action item -Facilitate and host meetings -Document and publish data and meeting minutes -Communicate with appropriate AT Operations and network -Monitor progress on

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities Own package architecture and execution from feasibility through tape-out, qualification, and production readiness, ensuring design intent is translated into manufacturable, reliable, and scalable solutions. Serve as the technical authority for complex package issues, leading cross-functional reviews, trade-off decisions, and risk closure across product, silicon, technology, assembly, quality, supplier, and OSAT teams. Balance performance, reliability, manufacturability, cost, quality, and schedule to deliver production-ready solutions while mentoring engineers through difficult technical decisions. Advance design rules, methodologies, automation workflows, and technology roadmaps for future products. Represent the packaging team in Silicon–package–board co-design by integrating floorplan, interface, interconnect, power, signal, thermal, and mechanical requirements, and resolve cost and manufacturing trade-offs to achieve a balanced package solution. Ability to apply baseline digital fluency and role-approp

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As an PDE Yield Enhancement (YE) Engineer within Package Development Engineering (PDE), you will be responsible for yield monitoring, excursion management, and yield stabilization during High Bandwidth Memory (HBM) New Product Introduction (NPI) . This role is critical to ensuring robust yield performance from first silicon through NPI ramp and early HVM , working closely with Process Integration (PI), MRDA, Process Engineering (PE), Assembly/Test Manufacturing, and Quality teams. You will act as a hands‑on yield owner during NPI builds, driving fast learning cycles, early risk detection, and disciplined yield recovery. Job Responsibilities: Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness,exercising sound judgment and complying with organizational standards and legal requirements. Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work. Yield Loss Accounted For Account for HBM NPI builds across Post Wafer Finishing (PWF), Assembly, and

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Manages production support engineering for a specific product or group of products after transfer from design to high volume production. Interfaces with design, process, test and reliability engineering to solve problems. Sustains products with cost reduction and yield improvements. 其他職務說明 As the member of HIG HBM Package PE, you will lead and develop a high-performing team to driving Package PE activities within the HBM Systems and Product Engineering Team. You will lead a Global team of professional Product Engineers leading a portfolio of Best-In-Class Next Generation HBM Product focused on the critical KPI’s Quality, Cost, Cycle Time and Scale. You will collaborate across functions within and outside of HBM to meet both strategic and tactical objectives while continually maximizing the effectiveness of the HIG HBM PE organization. Key Responsibilities Accountable for improving assembly related coverage within the manufacturing flows to improve the Time 0 and Field DPM and reduce/prevent inline fallout within the assembly process. Accountable for driving down the HBM Cube on Wafer Assembly Yield Loss which is seen as part of the Manufacturing Line Yield Pareto through optimized test coverage and collaborating with the Technology Development and Packaging organizations. Driving Cumulative Yield Ownership wit

About the Team: OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. Role Overview We are seeking a Package Reliability Engineer to lead reliability engineering for advanced packages used in high-performance AI and computing systems. The primary focus of this role is to assess package level mechanical and thermal reliability risks and apply thermal and mechanical modeling to optimize package design, material selection, and assembly processes. The engineer will also develop reliability test plans with external partners, identify failure mechanisms, perform root-cause analysis, and recommend practical corrective actions. In this role, you will assess package reliability risks from early architecture development through product qualification and high-volume manufacturing. You will work closely with package design, silicon design, system engineering, manufacturing, and ASIC partners to predict package behavior, develop qualification strategies, resolve reliability issues, and improve overall package robustness and lifetime. In this role you will: Lead reliability test plan and assessments for advanced HPC packages, including risk identification, potential failure-mechanism analysis, root-cause investigation, mitigation planning, and corrective-action development. Drive reliability-focused package design optimization based on thermo-mechanical modeling to improve package reliability, power integrity, thermal performance, mechanical robustness, and platform scalability. Develop, validate, and apply package reliability models and lifetime-prediction

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is looking for a hands-on Manufacturing Engineer to own the manufacturing interface between package design, semiconductor assembly, package test, board assembly, and final product integration. This role is focused on making advanced packages manufacturable and transferable from design engineering into qualified OSAT processes and downstream board/system assembly. You will work closely with Packaging Engineering, Silicon Manufacturing and Test, Quality, Supply Chain, PCB/board design, and external partners such as substrate suppliers, OSATs, test houses, and contract manufacturers. The ideal candidate understands how package decisions—such as package size, substrate construction, bump and ball design, warpage, underfill, materials, and assembly location—affect package yield, package test, PCB footprint and stencil design, SMT assembly, and final product readiness. This role is remote based out of Taiwan but requires close engagement with regional OSATs, foundry/test partners, contract manufacturers, and Tenstorrent engineering teams across multiple time zones. Regular on-site presence at partner factories is expected during qualification, commissioning, build, and ramp activities. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and of

What We’re Looking For: We’re looking for PCB design engineers to design and own various PCB boards that are components in the A-0 and A-1 system assemblies. Ideal Background: Experience with high power density PCB design, validation and bringup Experience with chip package and PCB board interactions and design for manufacturing Experience with designing and validating high layer count and large format board designs Nice to Have: Experience with very high density (eg HDI PCBs) boards Experience with PCBs with unique materials and unique thermal or mechanical properties Experience with emerging PCB board technology, eg mSAP or other additive methods

We’re looking for a hands-on process and materials engineer to own wafer level molding and underfill processes, material qualification, and assembly integration across development and manufacturing. Summary: Seeking an experienced engineer to lead wafer level mold and underfill process development for advanced semiconductor packages (fan-out wafer level packaging, 2.5D/3D, chiplet). This role spans mold compound and underfill material selection and qualification, wafer level molding and encapsulation processes, underfill dispense and cure, reliability, failure analysis, and cross-functional support through package and system productization. Core Responsibilities: Develop and optimize wafer level molding processes including compression molding, transfer molding, and mold underfill (MUF) for fan-out and advanced heterogeneous packages. Own mold compound and underfill material selection and qualification, including evaluation of filler content, CTE, modulus, Tg, viscosity, and moisture uptake to meet thermo-mechanical and reliability requirements. Drive underfill process development including capillary underfill (CUF) dispense strategies, flow and void optimization, and cure profile development for high-density flip chip and chiplet assemblies. Evaluate and mitigate assembly risks including warpage, delamination, void formation, bleed-out, mold flash, and filler settling; define process windows and controls to ensure repeatable yield across wafer and panel formats. Collaborate with OSATs and material suppliers to qualify mold and underfill materials, define dispense and cure equipment requirements, and manage process transfers into production. Lead characterization of mold and underfill material properties (viscosity, gel time, cure kinetics, adhesion, CTE, modulus) and correlate material behavior to process outcomes and package reliability. Work closely with thermal mechanical modeling teams to model solder joint reliability of bump interconnects with va

About the Role You will contribute to and own aspects of the Volantis A-0 and A-1 package. We are interested in both people with package design as well as package process development backgrounds Our end goal has challenges to overcome in warpage, CTE mismatch, thermomechanical aspects, assembly speed and more. We're building a wafer-scale package with both silicon and compound semiconductor dies sitting together at very high TDP. This creates both unique challenges and opportunities. The end result is breaking the memory wall, enabling a new era of AI, and a platform that scales another 1-3 orders of magnitude. What We Look For Ability to think from first principles about novel problems- not just applying existing solutions outside of their range of application. What works for 5x reticle platforms may not work for 56x reticle platforms Design or process development of complex packages Nice to Have: Experience with heterogeneous material assemblies Experience with high-TDP packages Experience with compound semiconductor assemblies Experience with co-packaged optics Ability to work with architects to co-design system architecture and package design Experience with interposer platforms such as CoWoS, CoWoS-L, CoWoS-R, EMIB, FoCoS, FoCoS-Bridge, etc Experience with flip-chip integration, especially mass reflow, TCB & LAB Experience with large scale (>50x50mm) substrates Compensation Package: Competitive Base salary + Significant Equity Stake. You'll be well compensated while also owning a piece of the outcome. California Pay Range: $250K-$400K

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) sits within the Technology and Products Group (TPG) and develops industry-leading High Bandwidth Memory (HBM) solutions for next-generation AI and high-performance computing systems. Micron is seeking an experienced MTS - HBM Thermal Integration Engineer to drive thermal performance optimization for next-generation High Bandwidth Memory products. This role sits at the intersection of thermal simulation, silicon characterization, process technology, package development, manufacturing, test engineering, and product integration. Key Responsibilities Drive thermal performance optimization across HBM products through design, process, packaging, assembly, and test improvements Develop and implement thermal learning plans, characterization strategies, and design-of-experiments (DOE) to accelerate technology understanding Analyze silicon characterization, inline metrology, manufacturing, and test data to identify key drivers of thermal behavior and variation Partner with thermal simulation teams to improve understanding and correlation between predictive models and measured silicon performance. Work closely with wafer fabrication, package development, assembly, product engineering, and reliability teams to resolve thermal challenges and enable product improvements. Identify and implement opportunities to reduce thermal resistance, improve thermal consistency, and enhance product performance. Drive cross-functional technical investigations and

Responsibilities: Annotate Case Report Form (acrf.pdf) following FDA/CDISC or sponsor guidelines. Develop SDTM specifications and generate SDTM datasets using SAS. Develop ADaM specifications and generate ADaM datasets using SAS based on Statistical Analysis Plan. Develop Tables, Listings, Graphs, Patient Profile in support of the Clinical Study Report, Posters, Manuscripts. Develop ADaM data, Tables, Listings, Figures for Integrated Summary of Safety (ISS) and Integrated Summary of Efficacy (ISE). Create electronic submission package to FDA, e.g., define.xml or define.pdf following FDA guidelines with minimum supervision. Proficient in analyze information and develop innovative solutions to programming and data analysis challenges; Support the point of contact (POC) of programming with statisticians for statistical input and analysis interpretation Follow and reinforce regulatory agency requirements during daily job. Serve as a programming team lead and contribute to department initiative. Provide guidance, mentoring, training for team members and help solve issues from cross-functional teams. Review draft and final production deliverables for project to ensure quality and consistency. Skills and Qualifications: Bachelor’s/Master’s degree in Statistics, Mathematics, Computer Science, Electrical Engineering, Biotechnology or related scientific disciplines. Minimum of 4+ years of clinical programming experience, along with 1+ year of project management and 1+ year of people management experience. Proven knowledge and training in high level computing languages such as. SAS, C/C++, Java, R, Python, MATLAB and SQL. Database programming experience is a plus. Proficient in decoding programming logic and assembling programming code based on logic provided and be able to explain to team members. Proficient in applying concepts in Artificial Intelligence and Machine Learning in the real world. In-depth knowledge of ICH, Good Clinical Practices, Clinical research, Clini

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As the member of HIG HBM Package Product Engineering, you will be part of a high-performing team to driving Package and HBM Product engineering activities within the HBM Systems and Product Engineering Team. You will be part of a Global team of professional Product Engineers leading a portfolio of Best-In-Class Next Generation HBM Product focused on the critical KPI’s Quality, Cost, Cycle Time and Scale. You will collaborate across functions within and outside of HBM to meet both strategic and tactical objectives while continually maximizing the effectiveness of the HIG HBM PE organization. Key Responsibilities ASM Yield and DPM Improvement: Accountable for improving assembly related coverage within the manufacturing flows to improve the Time 0 and Field DPM and reduce/prevent inline fallout within the assembly process. HBM Cube Yield Improvement: Improving HBM Cube yield through test optimizati

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As the member of HIG HBM Package Product Engineering, you will be part of a high-performing team to driving Package and HBM Product engineering activities within the HBM Systems and Product Engineering Team. You will be part of a Global team of professional Product Engineers leading a portfolio of Best-In-Class Next Generation HBM Product focused on the critical KPI’s Quality, Cost, Cycle Time and Scale. You will collaborate across functions within and outside of HBM to meet both strategic and tactical objectives while continually maximizing the effectiveness of the HIG HBM PE organization. Key Responsibilities ASM Yield and DPM Improvement: Accountable for improving assembly related coverage within the manufacturing flows to improve the Time 0 and Field DPM and reduce/prevent inline fallout within the assembly process. HBM Cube Yield Improvement: Improving HBM Cube yield through test optimization