Verification Director Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Summary Micron's Firmware & Product Test (FPT) team is hiring a Principal Test Development Engineer to lead front-end firmware validation for enterprise SSDs. In this role, you'll own verification strategy for NVMe front-end features, drive automation framework development, and serve as a technical authority for failure analysis and debug methodologies. You'll leverage AI-enabled tools and workflows to accelerate validation efficiency. You'll mentor engineers, define test coverage standards, and collaborate with firmware architects to influence testability decisions. The FPT team builds verification plans in Python, enforces NVMe and security protocol compliance, and executes white-box, grey-box, and black-box testing across simulation, FPGA, and prototype hardware environments. Responsibilities Lead design and execution of firmware verification strategies for NVMe front-end features (SMART, Trim, Get Log Page, OCP, Identify, Namespace Management) across multiple product lines. Own end-to-end test development lifecycle — from spec analysis and test planning through automation, execution, and coverage closure. Drive root-cause analysis for critical field and regression failures; establish systematic debug methodologies using coyote logs, protocol analyzers, and firmware traces. Architect and maintain scalable test automation frameworks that become organizational standards for firmware quality. Lead failure analysis efforts, correla

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a member of the ASIC Design team, you will work on design tasks for Micron's next generation of solid-state drive controllers. You will be involved in various phases of the ASIC design process, from concept to production silicon. This includes writing micro-architecture specifications, implementing RTL design, collaborating with the verification team to fully validate the design, delivering a gate netlist to the back-end implementation team to meet timing and physical constraints, and developing scripts to improve the design process. The ideal candidate is highly motivated, detail-oriented, and possesses excellent documentation and communication skills. Strong collaboration skills and a commitment to completing tasks with high quality are essential. This role additionally expects familiarity with AI assisted engineering tools to improve productivity, accelerate debugging, and enhance documentation quality, while ensuring responsible and secure usage. Responsibilities: Design, implement, and debug complex logic designs. Integrate your IP into larger and more complex IPs. Support front-end integration activities such as Lint, CDC, Synthesis, and ECO. Implement design automation using Python or other programming languages. Collaborate with SOC Design, SOC Design Verification, Emulation, STA, and Physical Design teams. Work closely with software and systems teams to ensure high-quality system integration.<

The Product Security team is responsible for conducting structured security analyses of Zoox products and applying security standards judiciously throughout the System Development Life Cycle at Zoox. The ideal candidate for this team will have a robust background in systems engineering, coupled with a demonstrated passion and expertise in cybersecurity. In this role, you will: Perform Risk Assessment by quantifying security related safety risks, collaborating with cross functional teams particularly safety teams to ensure alignment with safety and security objectives while supporting risk-informed engineering decisions. Drive verification of quantified risks by fuzzing real world scenarios in simulator environments. Write design proposals and drive execution while proactively communicating risks to partner teams. Proactively identify opportunities to roll up risk metrics into various company wide frameworks. Interface with a multitude of engineering teams within Product Security as well as across software and hardware engineering. Build and maintain a strong understanding of the underlying engineering constraints and factor that understanding into the analysis and recommendations.

ThermalWorks is seeking a Heavy Haul Logistics Lead to own the movement of ThermalWorks equipment from the point of manufacture to the point of customer delivery. This role manages the full transportation lifecycle of chillers, cooling distribution units, coolant control units, and related heavy equipment, including carrier sourcing, schedule coordination, rigging verification, insurance adequacy, and permit management. The Heavy Haul Logistics Lead owns each shipment from factory pickup through customer receipt, at which point responsibility transfers to the ThermalWorks Project Management team for on-site coordination. This role is the operational connective tissue between manufacturing partners, transportation providers, and the customer-facing delivery function. Reliable and well-coordinated equipment delivery is essential to ThermalWorks' ability to meet customer commitments, and this role owns the accountability for that delivery. Key Responsibilities Carrier Sourcing and Management Identify, qualify, and maintain relationships with heavy haul carriers appropriate for the size, weight, and geographic requirements of ThermalWorks equipment shipments. Source competitive freight quotes for each shipment; balance cost, timing, carrier capability, and reliability in carrier selection. Verify carrier operating authority, safety ratings, and insurance coverage prior to engagement; maintain an active pool of qualified carriers for domestic and international shipments as required. Negotiate freight rates, terms, and service-level expectations with carriers; manage carrier performance and hold carriers accountable to committed schedules and service standards. Schedule Coordination and Delivery Management Coordinate pickup schedules with manufacturing partners (currently including Jabil and NPSG in the United States, and multiple manufacturing partners in Europe and Asia) based on production completion dates and customer required delivery dates. Build and maintain delive

About Anthropic Anthropic’s mission is to create reliable, interpretable, and steerable AI systems. We want AI to be safe and beneficial for our users and for society as a whole. Our team is a quickly growing group of committed researchers, engineers, policy experts, and business leaders working together to build beneficial AI systems. About the role Anthropic runs some of the largest AI training and inference workloads in the world, across multiple hardware platforms. We work from the chip level up with our silicon partners, and we are now deepening that investment by building a custom silicon team. You will be one of a small number of people covering a large surface. We are opening searches across the key domains below, and we are interested in candidates whose center of gravity sits in any of them: Front-end design Pre-silicon verification Physical design Design for test Analog and mixed-signal Technology and foundry CAD and design infrastructure Packaging, signal integrity, and power integrity This is a role for someone who has shipped silicon, has a realistic relationship with schedules, and is comfortable making consequential calls without a large organization behind them. Key responsibilities Take part in end to end activities for the program: strategy, specification, execution and the technical bar. Write the specifications and interface definitions that others design against and keep them coherent as the architecture converges Make and own directional calls: technology and IP selection, where we build versus buy versus license, and where we take design authority versus rely on partners Build and share AI-assisted approaches to the code-like parts of your domain, and help the team learn what Claude can genuinely accelerate Contribute to the architecture and micro-architecture discussion from your domain's perspective, including the tradeoffs your area imposes on the rest of the chip Partner with Anthropic's inference, performance, kernels, and infrastr

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Senior Firmware and Product Test Engineer in the Solid State Drive (SSD) group at Micron Technology, you will help ensure our SSD products have world-class performance and reliability. This outstanding opportunity allows you to collaborate with skilled experts to build flawless SSD firmware for enterprise and automotive markets. Your ambition and proven expertise will help us develop innovative solutions and advance technology. Responsibilities Build comprehensive firmware verification plans for various firmware features. Develop white/ grey-box, known, and closed system testing methods to verify and validate firmware features. Analyze failures from weekly regressions and perform root-cause analysis, requiring deep SSD domain expertise. Manage test development, test deployment, test automation, and reporting activities. Communicate challenges, solutions, and mitigation plans to cross-functional teams and management with clear and effective communication of both technical and non-technical topics. Participate in code reviews and guide the team to ensure comprehensive coverage and accurate architectural build. Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exerc

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Senior Firmware and Product Test Engineer in the Solid State Drive (SSD) group at Micron Technology, you will help ensure our SSD products have world-class performance and reliability. This outstanding opportunity allows you to collaborate with skilled experts to build flawless SSD firmware for enterprise and automotive markets. Your ambition and proven expertise will help us develop innovative solutions and advance technology. Responsibilities Build comprehensive firmware verification plans for various firmware features. Develop white/ grey-box, known, and closed system testing methods to verify and validate firmware features. Analyze failures from weekly regressions and perform root-cause analysis, requiring deep SSD domain expertise. Manage test development, test deployment, test automation, and reporting activities. Communicate challenges, solutions, and mitigation plans to cross-functional teams and management with clear and effective communication of both technical and non-technical topics. Participate in code reviews and guide the team to ensure comprehensive coverage and accurate architectural build. Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exerc

This role is responsible for managing and optimizing inventory levels for operational efficiency, managing procurement processes, and ensuring uninterrupted O&M activities. Additionally, this role involves financial oversight, including budget preparation, asset verification, and expenditure tracking to align with the company's financial strategy and operational needs. Source: Adani Group | Job ID: 56052

What We’re Looking For: We’re looking for architects to own key blocks on the A-0 and A-1 systems. This is a role with ownership of an entire sub-block, and you will need to understand how it fits into the entire system and work with other architects and architecture leaders to integrate it into the broader system. Ideal Background: Hands-on experience in owning and delivering the architecture of a block that was part of a larger chip/system. Understanding and hands-on experience in the design of AI accelerators Experience working with microarchitects in the implementation and verification of said block Nice to Have: Experience with the physical design process of the block you owned Experience with large die area chips Experience with multi-die and multi-package chips and systems

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and manufacturing teams to deliver best‑in‑class PPA (performance, power, area) and robust signoff collateral for tape-out. This is a hands‑on role with opportunities to own blocks or top‑level integration across multiple product generations. You will also work on efforts to enable and integrate AI-driven tools and AI-enabled workflows into the team's methodologies. Key Responsibilities Own physical implementation for SoC blocks and/or top-level, including floor-planning, placement, CTS, routing, and physical optimization to meet PPA targets. Drive timing closure (setup/hold) across multi-mode/multi-corner (MMMC) scenarios; partner with RTL, architecture, and STA/signoff to converge designs. Integrate and implement complex IP (e.g., controllers, microcontrollers, NOC, interfaces, MBIST/DFT logic, buffers, PHY‑adjacent logic) with focus on robust physical integration and timing/power integrity. Perform and/or coordinate physical signoff, including DRC/LVS, IR drop/EM, and timing signoff, addressing violations efficiently. Partner with DFT teams to ensure scan/MBIST requirements are physically realizable and do not compromise PPA or schedule. Work with packaging, assembly, test, probe, and manufacturing coll

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, verification, physical design, firmware, and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area, and schedule targets. You will also work to enable and integrate AI-driven tools and AI-enabled workflows into the team's methodologies. Key Responsibilities Design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die. Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic). Collaborate with SoC architects to translate architectural and micro‑architectural specifications into high‑quality RTL implementations. Participate in SoC‑level integration activities, including clocking, reset, power intent, and configuration infrastructure. Assist with pre‑silicon validation and post‑silicon bring‑up, including root‑cause analysis of silicon issues. Contribute to design documentation, block specifications, and design reviews. Collaborate multi-functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure robust and manufacturable builds. Minimum Qualifications Bachelor’s or master’s degree in electrical engineering,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we build the memory and storage that powers everything from massive data centers to the devices people carry every day. Our DRAM IP Design team shapes the circuits at the heart of these products, carrying innovative designs from concept all the way to silicon. We work across global design, verification, and product teams, and the work we do here helps define where the semiconductor industry goes next! As a Principal Analog Design Engineer, you'll help shape the next generation of Micron's memory products, bringing circuit designs to life and directly influencing their performance, quality, and reliability. You'll partner with design, verification, and product teams around the world, operating with the independence and technical depth expected of a principal engineer. It's a role where your circuit decisions show up in silicon that ships at scale. Responsibilities: Design, optimize, and verify block-level analog and mixed-signal circuits for DRAM Propose, evaluate, and implement new or improved circuit topologies to enhance block PPAC Work with the internal data science team and EDA vendors to leverage agentic AI and AI-assisted design flows for circuit optimization Expand verification coverage to strengthen robustness and mass-production yield Partner with global design groups, guide layout through post-layout simulation, support silicon-to-simulation correlation, and operate independently to define solutions and methods Minimum Qualifications:

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a Principal IO/Clocking Design Engineer to be a part of our design team working on critical high-speed circuits common to all DRAM related memory products! In this position, you will be responsible for the development, design, optimization, verification, and fan out of these high-speed circuits to all DRAM related projects at Micron. You will work on equalization and bandwidth extension to push the speed limits of the circuit and process technology, analyze resulting IO impairments, clock jitter and duty error impact to DRAM system and timing budget, and develop effective engineering solutions. Responsibilities: Innovate, design, optimize and verify high-speed IO and clocking circuits used in new DRAM products. Apply proven high-speed circuit design techniques and enhance critical performance evaluation of the IO data path and clocking path at circuit level. Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full-chip and system level. Work with Product Engineering and SI team to compare silicon performance with simulation results and support correlation activities. Collaborate with process integration and transistor modeling teams on Micron's next groundbreaking process node. Minimum Qualifications: Minimum MSEE &#43; 10 years or BSEE &#43; 12 years of industry experience in analog and mixed-signal circuit design. Proficiency w

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Role and Responsibilities Responsible for layout design and development of critical analog, mixed-signal, custom digital block, standard cells and full chip level. Perform layout verification like LVS, DRC, Antenna, Shield, Matching, Latch up, EM IR Totem checks, quality check and documentation. Responsible for development of digital block layouts using auto placement and route tools Responsible for basic understanding of skill coding and automation Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/achievements in multiple project environment. Guide developing team members in their execution of Sub block-level layouts & review their work Contribute to effective project-management. Effectively communicating with Global engineering teams to assure the success of layout project. Responsible for the reducing the layout effort by using AI tools Qualification/Requirements 5 to 8-year experience in analog/custom layout design in advanced CMOS process. Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must. Should have hands on experience in creating layout of cr

We believe that the way people interact with their finances will drastically improve in the next few years. We’re dedicated to empowering this transformation by building the tools and experiences that thousands of developers use to create their own products. Plaid powers the tools millions of people rely on to live a healthier financial life. We work with thousands of companies like Venmo, SoFi, several of the Fortune 500, and many of the largest banks to make it easy for people to connect their financial accounts to the apps and services they want to use. Plaid’s network covers 12,000 financial institutions across the US, Canada, UK and Europe. Founded in 2013, the company is headquartered in San Francisco with offices in New York, Washington D.C., London and Amsterdam. The Credit team at Plaid builds lending solutions across the full lender lifecycle — including underwriting, verification, and servicing. We help lenders make faster, more informed decisions using consumer-permissioned financial data. Within Credit, the Insights team develops data-driven products including LendScore, Income Insights, CashFlow Insights, and Network Insights. These products power smarter credit decisioning for lenders of all sizes. As a Product Manager on the Insights team, you will drive execution across our portfolio of credit decisioning products. You’ll work closely with engineering and data science teams to ship high-quality product experiences, and partner with sales and marketing on go-to-market motions. You’ll report to the Insights product lead and play a critical role in ensuring we deliver on our roadmap commitments while maintaining the flexibility to pursue new product opportunities as they emerge. Responsibilities Own end-to-end execution of the product roadmap for LendScore, Income Insights, CashFlow Insights, Network Insights, and new Insights products Write product specs, define requirements, and work with engineering and data science to deliver features on schedule R