Design Engineers in United States

What you’ll do Act as the in-house electrical lead for Midjourney Medical: own the electrical architecture of the scanner and the technical direction for all board-level design. Own complex board design end-to-end: architecture, schematic capture, layout (high-speed digital, analog/mixed-signal, power), DFM/DFT, fabrication and assembly vendor management, bring-up, and revision control. Write firmware for embedded targets (MCU/SoC): drivers, real-time control loops, safety-relevant logic, bootloaders, and field update paths. Audit and update HDL (FPGA) code for high-throughput data acquisition, timing/synchronization, triggering, and pre-processing of ultrasound and sensor data streams. Define electrical interfaces and data contracts with software, recon/ML and mechanical teams: timing budgets, clocking/sync, signal integrity, connectors/harnessing, and failure modes. Establish electrical engineering rigor: design reviews, schematic/layout review checklists, bring-up procedures, test fixtures, and documentation suitable for a regulated medical device program (DHF, traceability, change control). Mentor and grow the electrical function; select and manage external design partners where leverage is high. What we’re looking for Deep experience designing complex boards from blank page to stable revision, including high-speed digital and analog/mixed-signal domains. Strong schematic and layout skills (Altium/KiCad or equivalent) with real signal integrity, power integrity, grounding, and EMI/EMC instincts. Solid embedded firmware background in C/C++ (and Python for tooling): peripherals, DMA, interrupts, real-time constraints, and debugging on hardware. Practical HDL experience (VHDL/Verilog/SystemVerilog) for data acquisition, timing, and streaming interfaces. Track record of owning bring-up and debug on real hardware: scopes, logic analyzers, and disciplined root-cause analysis. Technical leadership: clear trade-offs, strong written documentation, and the ability to set

Job Details: Job Description: Do Something Wonderful At Intel, we put silicon at the center of the world’s most meaningful innovations. From personal computing and AI to cloud-scale data centers and edge platforms, our processors power technologies that touch billions of lives. If you’re passionate about building world-class silicon at massive scale, we want to build the future with you. The Team You’ll join Intel’s All Cores Engineering (ACE) organization, the team responsible for designing and delivering Intel’s industry‑leading CPU cores. Within ACE, the Atom group focuses on high‑efficiency, performance‑per‑watt optimized cores that enable everything from client platforms to emerging edge and scalable solutions. This is a hands‑on senior engineering role with direct impact on next‑generation CPU silicon. What You’ll Do As a Senior CPU Design Verification Engineer you will play a critical role in ensuring architectural correctness, functional robustness, and power‑efficient performance of Intel’s Atom CPU designs before first silicon. Key responsibilities include but not limited to the following: Lead pre‑silicon functional verification of complex CPU and SoC logic to ensure full compliance with architectural and microarchitectural specifications. Develop and execute verification plans, testbenches, and SystemVerilog/UVM environments, ensuring comprehensive functional and coverage closure. Define, run, and analyze system‑level simulations to uncover functional, performance, power, and corner‑case issues. Debug and root‑cause complex RTL, microarchitecture, and integration issues; drive issues to resolution with design teams. Collaborate cross‑functionally with CPU architects, RTL de

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a SoC Physical Design Verification Engineer to drive full-chip signoff and ensure manufacturable, high-quality silicon across advanced technology nodes. You’ll lead physical verification closure (DRC, LVS, ERC, etc.), debug issues using standard industry PV tools, and collaborate across RTL, PD, CAD, and packaging teams to achieve successful tapeouts. If you thrive in a fast-paced environment and enjoy solving complex challenges in cutting-edge silicon, we’d love to hear from you. This role is hybrid , based out of Santa Clara, CA or Austin, TX or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A seasoned engineer with a strong background in CPU/IP/SoC physical verification and tapeout closure. A hands-on problem solver who excels at debugging and driving signoff through complex verification flows. A collaborative team player who works effectively across RTL, PD, CAD, and foundry interfaces. A mentor and technical leader passionate about building efficient, manufacturable silicon. What We Need BS/MS in Electrical/Electronics Engineering (or related) with 7–14 years of hands-on CPU/IP/SoC physical verif

Lead Electrical System Design & Analysis Engineer — USA - Tukwila, WA. Apply via Workday.

Mechanical Systems Design & Analysis Engineer (Experienced or Lead) — USA - Oklahoma City, OK. Apply via Workday.

Build the infrastructure that keeps every NVIDIA chip aligned from first spec to final shipment. NVIDIA's Silicon Co-Design Group sits at the convergence of architecture, silicon, systems, and manufacturing. The System–Manufacturing Architecture (SMAC) team coordinates between system specifications and manufacturing test specifications from pre-silicon POR through production release across GPU, SoC, and CPU programs. When that alignment drifts, silicon faces the consequences: escapes, yield loss, and performance loss. We're hiring a Senior Manufacturing & System Co-Design Workflow Engineer to lead the methodology and infrastructure that maintains holistic, systematic alignment, at scale across the full portfolio. The strongest candidates in this role design the workflow before being asked to fix a program, and build the checks and automation that confirm alignment holds long after they've moved on to the next problem. What you’ll be doing: SMAC Workflow Methodology: Define manufacturing spec types, including schema and semantics, derived from system PORs and features. Own the methodology that governs how specification work gets structured, versioned, and validated across the program lifecycle. Production Python Pipelines & Automated Checks: Develop production-grade Python pipelines and automated checks that catch specification drift between system POR and manufacturing test programs ,ATE, SLT, BLT, L10+, before silicon exposes the discrepancy. The goal is that misalignments surface in the workflow, not on the tester. E2E Program Integration & TPM Attestation: Wire SMAC work into the end-to-end program spine, milestones, gates, and artifacts, and define explicit TPM-driven attestation when checks lag. Alignment can't be assumed; it must be proven at every stage. Agent-Ready Tooling & CI Infrastructure: Integrate tooling into an agent-ready

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a SoC Design Verification Engineer to lead pre-silicon verification of the Beowulf SoC, with focus on the Compute Subsystem (CSS), DDR memory subsystem, and Fabric NoC. This role will drive coverage, coherency, memory traffic, connectivity, error handling, and bring-up features critical to silicon success. This role is hybrid, based out of Boston, MA; Toronto, ON; or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Deeply curious about SoC architecture, compute systems, DDR behavior, and Fabric NoC/interconnect verification. Expert in UVM, SystemVerilog, coverage-driven verification, assertions, and subsystem-level debug. Experienced in verifying compute subsystems, DDR controllers and PHY-facing logic, NoC/interconnect protocols, coherency, ordering, and data movement. Comfortable with reset, power management, error handling, performance, and high-concurrency system scenarios. Proactive, detail-oriented, and effective in cross-functional technical discussions. Familiar with Python, C/C++, Tcl, CocoTB, or similar verification automation tools. What We Need Develop and own scalable verification environmen

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a SoC Design Verification Engineer to validate the System Management Controller (SMC) and enable seamless multi-chip integration. In this role, you will design and execute tests, build infrastructure, and debug issues across chiplet-based SoCs. You’ll have the opportunity to work with remote mentorship while contributing to the foundation of scalable multi-die systems. This role is hybrid, based out of Toronto, Ontario, Boston, MA or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Proficient in SystemVerilog, SV-UVM, Python, and C/C++ with strong verification skills. Experienced in writing test plans, building infrastructure, and debugging hardware/software flows. Comfortable working with remote mentorship and distributed teams. Familiar with AI-assisted tools like Copilot, Cursor, and Claude to accelerate verification. What We Need Develop and maintain SMC tests and supporting DV infrastructure. Write, execute, and track test plans for chiplet and multi-chip SoC designs. Use C/C++ to develop tests compiled, loaded, and executed directly on the DUT. Triage, analyze, and debug issues in clos

We are seeking a Salesforce Engineer III to design, build, and support secure, scalable Salesforce solutions that support critical business operations. This is a senior individual contributor role requiring strong hands-on technical expertise, sound engineering judgment, and experience working in regulated environments. This position supports systems and data subject to FedRAMP and other U.S. government compliance requirements. Due to the nature of the work, U.S. citizenship is required. This role will be based remotely in the United States. What You’ll Do Design, build, and maintain Salesforce solutions across sales, service, customer, and operational workflows Implement functionality using Salesforce configuration, Flows, Apex, Lightning Web Components (LWC), SOQL, and platform automation Develop and support integrations between Salesforce and external enterprise systems Translate business requirements into secure, scalable, and maintainable technical solutions Participate in technical design reviews, sprint planning, code reviews, testing, deployments, and production support Troubleshoot and resolve issues related to automation, integrations, data integrity, and system performance Create and maintain technical documentation, support UAT and regression testing, and assist with user enablement Ensure all solutions comply with Salesforce best practices, internal security standards, and regulatory requirements Leverage AI-powered development tools to improve productivity and analysis, while adhering to security and compliance guidelines Responsibilities Technical Delivery: Own end-to-end delivery of Salesforce features using a mix of declarative and programmatic solutions Secure Engineering: Design and implement solutions that meet FedRAMP, security, and compliance requirements, including least-privilege access and auditability Integration Design: Build and maintain secure integrations between Salesforce and downstream systems Engineering Excellence: Maintain high st

Job Details: Job Description: The Role and Impact As a SoC Design Verification Engineer, you will play a pivotal role in ensuring that Intel's complex System-on-Chip (SoC) designs meet functional specifications and deliver high-quality performance. You will design scalable and reusable verification plans, develop test environments, and execute tests to uncover issues and improve functionality. Your contributions will directly enhance Intel's product quality and ensure optimal performance in presilicon development. Business Group You will be joining Intel's cutting-edge product development group, a team focused on designing and verifying advanced semiconductor solutions. This group is at the forefront of innovation, delivering high-quality, scalable products that drive Intel's leadership in technology and performance. By contributing your skills here, you will help shape the future of computing and enable groundbreaking advancements in the industry. Key Responsibilities - Define and develop scalable and reusable block, subsystem, and SoC verification plans. - Create test benches and verification environments that align with microarchitecture specifications. - Execute verification plans, including emulation and system simulation models, to ensure design functionality and uncover bugs. - Debug and root cause issues in presilicon environments, implementing corrective measures to address failures. - Collaborate with architects, RTL developers, postsilicon teams, and physical design teams to improve verification of complex architectural features. - Document and maintain test plans, driving technical reviews with design and architecture teams. - Integrate security coverage activities within test plans, including regression and debug tests. - Maintain and improve

Abbott is a global healthcare leader that helps people live more fully at all stages of life. Our portfolio of life-changing technologies spans the spectrum of healthcare, with leading businesses and products in diagnostics, medical devices, nutritionals and branded generic medicines. Our 122,000 colleagues serve people in more than 160 countries. JOB DESCRIPTION: A senior engineering professional who independently applies advanced knowledge to complete complex assignments, who leads the design and development of complex software code, unit tests and integration tests for a subsystem. MAIN RESPONSIBILITIES • Leads, is accountable for, and serves as the technical subject matter expert for the engineering design and implementation for one or more software features, identifying process issues and recommending corrective measures. • Defines feature evolution, branching, integration and deployment strategy. • Defines structure of the source code files. • Ensures successful integration. • Implements hardware/interface simulation. • Analyzes user needs, product requirements, software requirements and provides input to stakeholders Education Level Major/Field of Study or Equivalent: Bachelors Degree (± 16 years) Experience/Background Minimum 6 years Minimum 6 - 12 Years of experience The base pay for this position is $99,300.00 – $198,700.00 In specific locations, the pay range may vary from the range posted. JOB FAMILY: Product Development DIVISION: ONCO Cancer Diagnostics LOCATION:<

Work Flexibility: Hybrid or Onsite Stryker is hiring a Senior Quality Engineer to join our Neurovascular division. This is a hybrid r ole based in Fremont, CA . As the Senior Design Quality Engineer , you will be actively involved in Product Risk Management, Post Market Surveillance, Design Control and Product Quality Improvement. You will be involved in a fast-paced mix of short design change efforts and will be responsible for product risk management and adherence to design control requirements throughout the product lifecycle. You will be responsible for ensuring that post market data and feedback is channeled into the risk management system throughout the product lifecycle. You will make regular use of problem-solving tools and statistical analysis to analyze and trend data and provide quality input into technical investigations, perform test method development and validation, design verification, risk assessment and design reviews. You will be responsible for supporting product testing and failure analysis, writing protocols and reports, creating and maintaining risk files and assessing the impact of necessary changes to our products. You will lead initiatives to increase sales and improve the customer experience of our devices. Neurovascular (NV) products push the boundaries of technology to meet ever increasing product performance requirements, making the goal of assessing and demonstrating, safety, performance and compliance an exciting challenge. What You Will Do Develop qualification plans, protocols, and reports for new products, existing products, components, and subassemblies. Execute product testing, inspection, verification, and validation activities to suppor

Every day, tens of millions of people come to Roblox to explore, create, play, learn, and connect with friends in 3D immersive digital experiences– all created by our global community of developers and creators. At Roblox, we’re building the tools and platform that empower our community to bring any experience that they can imagine to life. Our vision is to reimagine the way people come together, from anywhere in the world, and on any device. We’re on a mission to connect a billion people with optimism and civility, and looking for amazing talent to help us get there. A career at Roblox means you’ll be working to shape the future of human interaction, solving unique technical challenges at scale, and helping to create safer, more civil shared experiences for everyone. As a Software Engineer on the User Frameworks team, you will help create the reusable UI components and systems that many Roblox teams rely on to create engaging and intuitive product experiences. You Have: 1–3 years of experience building software systems (industry experience) Strong coding fundamentals in one or more languages such as Javascript, TypeScript, Lua, or similar Experience building frontend systems, reusable UI components, or design systems Familiarity with modern UI frameworks such as React, and an interest in building practical, maintainable abstractions that can scale An understanding of software quality fundamentals such as performance, accessibility, responsiveness, maintainability, and thoughtful API or component design. A growth mindset and curiosity about automation and AI-assisted development You Will: Build and improve reusable UI components, and libraries that many Roblox teams rely on to create consistent, polished, and accessible user experiences Contribute to the Foundation Design System by working closely with design and engineering to define and implement shared building blocks for Roblox Write clean, maintainable, and well-tested code, while contributing to en

Associate Configuration Management Engineer Company: The Boeing Company The Boeing Global Services (BGS) Government Training Engineering organization is seeking an Associate Configuration Management Engineer for the Product Lifecycle Management (PLM) team in Hazelwood, MO . As part of our team, you will be focused on configuration management ensuring engineering changes are documented and managed throughout the development lifecycle. You will be a part of an organization that provides industry leadership in commercial and defense aviation training and capabilities, including custom software development, engineering and technical services, and a range of services to support training centers and pilot provisioning worldwide. Position Responsibilities: Participates in the development and management, and performs limited analysis of process and product baselines Works under general direction to coordinate and conduct product and subsystem level technical design reviews and audits for new and derivative products Performs routine analysis of product trades and/or changes and assists in the development of change proposals Participates in the development and implementation of Configuration and Data Management standards, processes, systems and tools Utilizes data gathered from customers to assist in the definition of Configuration and Data Management requirements for product hardware, software and engineering design data systems Assists in the integration, routine analysis and resolution of issues with engineering product structure Assists with the development and implementation of engineering technical program plans of limited scope including impacts, risks and incorporation of lesso

At Vanta, our mission is to help businesses earn and prove trust. We believe that security should be monitored and verified continuously, and we empower companies to practice better security and prove it with ease. Vanta has a kind and talented team, and while some have prior security experience, many have been successful at Vanta without it. As the Senior Product Manager, Design Systems at Vanta, you'll own the product strategy and roadmap for how every team builds Vanta's interface. Your mission is to build the horizontal tooling that lets product, engineering, and design teams create consistent, high-quality user experiences faster, so they can spend more of their time on their customers. To be successful, you’ll need to have a high level of product taste and be able to set and hold the line for high quality and easy to use products. All while working closely with your engineering and design manager partners. You'll be part of Vanta's Platform organization, which builds the foundational primitives and craft layer the rest of the product is built on. This is the first dedicated Design Systems PM role at Vanta, so you'll help shape the function itself, not just the roadmap. It's a high-autonomy, highly cross-functional role at the center of how Vanta looks, feels, and scales. What you’ll do as a Senior Product Manager, Design Systems at Vanta: Own the vision and roadmap for the frontend, spanning the design system and the front-end platform, and ladder durable platform investments to company initiatives so design and engineering can focus on customers. Evolve our design system from a broad component library into smaller, composable building blocks with consistent APIs, including making components first-class for AI and LLM-driven experiences. Drive accessibility and internationalization programs to their committed milestones, including global-scale localization and meeting accessibility standards. Partner with our AI team to enable the agentic patterns product team