Advanced Development Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Technical Strategy & Innovation Define and execute the technical roadmap for Advanced DRAM Films development. Provide technical leadership across Epi, device films, hardmask technologies, HAR deposition, and diffusion processes. Drive innovative process solutions that enable future technology nodes while meeting manufacturability, yield, reliability, and cost objectives. Partner with Process Integration and cross-functional teams to resolve critical technology challenges. Leverage Artificial Intelligence to enhance problem solving across technical and logistical spaces. Organizational Leadership & Team Development Lead, coach, and develop a growing organization of engineers, technical leads, and future managers. Foster a culture of technical excellence, innovation, accountability, collaboration, and ownership. Develop talent through mentoring, succession planning, talent management, and strategic hiring. Create an environment that accelerates learning, encourages technical curiosity, and enables career growth for engineers at all levels. Drive high levels of team member engagement by cultivating an inclusive, supportive, and high-performing culture where employees feel valued, empowered, and connected to Micron's mission and business objectives. Champion employee development, recognition, feedback, and wellbeing

We’re seeking an experienced engineer to lead bump interconnect development for advanced semiconductor devices (2.5D/3D/chiplet/fan-out). This role spans ubump and C4 bump metallurgy, RDL design and plating, chip-side and interposer capture pad design rules, OSAT engagement, reliability, failure analysis, and cross-functional support through package and system productization. Core Responsibilities Own end-to-end bump interconnect development for both ubump (micro-bump) and C4 processes, including bump formation, and reflow for use with mass reflow, TCB, and LAB chip attach for high-performance semiconductor packages. Define and own bump metallurgy stacks for ubump (e.g., Cu pillar/SnAg) and C4 (e.g., SAC alloys) interconnects, including UBM selection and pad finish specifications for both chip-side and interposer capture pads. Develop and own design rules for bump interconnects including pitch, bump diameter, standoff height, keep-outs, and land pad geometry for both the chip side and interposer or substrate capture pads. Lead RDL (redistribution layer) process development including electroplating of Cu RDL traces, via fills, and pad finishes; define RDL design rules for line/space, via diameter, and layer stack-up to meet electrical and reliability requirements. Collaborate with OSATs and bumping foundries to qualify ubump and C4 bumping processes, drive design rule alignment, and manage process transfers into production. Evaluate and mitigate bump interconnect assembly risks including non-wet opens, voiding, head- in-pillow, intermetallic growth, and joint fatigue failures across both ubump and C4 interconnect types. Perform root cause analysis of assembly and reliability failures using cross-sectioning, SEM, CSAM, and other failure analysis techniques. Support reliability qualification including thermal cycling, drop, mechanical shock, and power cycling. Work cross-functionally with design, reliability, thermal, and manu

We’re looking for a hands-on process and materials engineer to own wafer level molding and underfill processes, material qualification, and assembly integration across development and manufacturing. Summary: Seeking an experienced engineer to lead wafer level mold and underfill process development for advanced semiconductor packages (fan-out wafer level packaging, 2.5D/3D, chiplet). This role spans mold compound and underfill material selection and qualification, wafer level molding and encapsulation processes, underfill dispense and cure, reliability, failure analysis, and cross-functional support through package and system productization. Core Responsibilities: Develop and optimize wafer level molding processes including compression molding, transfer molding, and mold underfill (MUF) for fan-out and advanced heterogeneous packages. Own mold compound and underfill material selection and qualification, including evaluation of filler content, CTE, modulus, Tg, viscosity, and moisture uptake to meet thermo-mechanical and reliability requirements. Drive underfill process development including capillary underfill (CUF) dispense strategies, flow and void optimization, and cure profile development for high-density flip chip and chiplet assemblies. Evaluate and mitigate assembly risks including warpage, delamination, void formation, bleed-out, mold flash, and filler settling; define process windows and controls to ensure repeatable yield across wafer and panel formats. Collaborate with OSATs and material suppliers to qualify mold and underfill materials, define dispense and cure equipment requirements, and manage process transfers into production. Lead characterization of mold and underfill material properties (viscosity, gel time, cure kinetics, adhesion, CTE, modulus) and correlate material behavior to process outcomes and package reliability. Work closely with thermal mechanical modeling teams to model solder joint reliability of bump interconnects with va

We are seeking a highly skilled and visionary Staff Signal and Power Integrity (SI/PI) Engineer to join our advanced hardware engineering team. In this role, you will be the definitive technical expert responsible for ensuring the signal quality, timing, and power delivery robustness of our most complex, next-generation robotaxi electronic systems. As a technical pillar within the organization, you will define overarching SI/PI architectures, establish company-wide simulation methodologies, guide electrical design and layout teams, and own the end-to-end sign-off for cutting-edge high-speed interfaces. In This Role, You Will Lead the SI/PI architecture and define constraints for next-generation, high-complexity, high-density printed circuit boards (PCBs) and overall system design. Collaborate at an architectural level with hardware design, silicon vendors, PCB layout, and mechanical engineering teams to define layer stack-ups, routing strategies, component placement, and power delivery architectures. Analyze, optimize, and sign off on advanced high-speed serial links (PCIe, Ethernet, MIPI, GMSL) and memory interfaces (LPDDR). Provide expert-level design guidance and validation for automotive-specific communication and audio protocols (A2B). Architect and conduct comprehensive Power Delivery Network (PDN) analysis, including DC IR drop, AC impedance modeling, and transient response analysis to ensure stable power delivery across complex multi-board systems. Drive the development of advanced SI/PI routing rules, simulation methodologies, automation scripts, and sign-off processes for the hardware engineering department. Tackle the most complex, unprecedented signal and power integrity challenges, performing hands-on root-cause analysis, lab measurements, and correlating simulation models with real-world testing. Act as a technical mentor and subject matter expert, elevating the SI/PI capabiliti

Job Details: Job Description: The Advanced Packaging Technology Development (APTD) Substrate and Wafer Assembly organization is responsible for developing cutting edge substrate packaging and wafer assembly solutions for our customers. As a member of the Substrate Technology and Manufacturing Group, you will play a critical role in enabling new manufacturing capacity across advanced packaging suppliers. In this position, you will lead substrate supplier development and qualification activities for advanced technologies such as high density FCBGA, EMIB-T and glass core substrate, ensuring suppliers achieve the required readiness to support growing customer demand. This includes driving technical enablement, managing readiness milestones, and collaborating closely with cross functional engineering teams and supplier partners. A combination of detail-oriented project management, strong technical risk assessment / problem solving skills, and effective supplier / stakeholder management will be needed to be successful. Please note: This role requires periodic evening meetings with suppliers in East Asia, as well as occasional travel to supplier sites to support essential program objectives. Key Responsibilities Define process integration roadmaps and establish manufacturing procedures to meet technology transfer milestones. Extract insights from structured and unstructured data, applying statistical analysis and coding techniques for yield improvement. Lead low yield analysis and corrective actions to address quality excursions in high-volume production environments. Drive continuous improvement initiatives to minimize defects and optimize process reliability. Assess quality and reliability risks for manufacturing material and process changes, ensuring sustained product performance. C

Data Science & Engineering Lead Lead the charge in AI and data innovation as our Data Science & Engineering Lead . Here, you’ll work hands-on with our talented team to build and deploy high-impact ML models, optimize our data systems, and drive actionable insights. If you’re skilled in advanced AI tools like Databricks, Spark, and Azure, and excited to push boundaries in machine learning and engineering, we want you on our team. Join us for meaningful work, a collaborative culture, and competitive benefits. In This Role, You Will: Design and implement supervised and unsupervised ML models (e.g., OLS, Logistic Regression, Ensemble Methods) to solve real-world business problems. Lead model development for advanced architectures in neural networks, such as ANN, CNN, RNN, GAN, Transformers, and RESNet. Drive NLP advancements with tools like NLTK and neural-based language models. Oversee the development of computer vision models, utilizing OpenCV for real-world applications. Lead time-series modeling projects for forecasting and anomaly detection. Utilize AI techniques like Retrieval-Augmented Generation (RAG), Chain of Thought (CoT), and Model of Alignment (MOA) to enhance model performance. Build and maintain scalable data pipelines for both streaming and batch processing. Architect and optimize lakehouse solutions using Delta/Iceberg and bronze-silver-gold architectures. Lead the development of ETL processes with tools like Airflow, DBT, and Airbyte to support data flow and transformation. Design and optimize database models for OLTP and OLAP systems using Snowflake, SQL Server, PostgreSQL, and MySQL. Develop NoSQL solutions, leveraging MongoDB, DynamoDB, and ElasticSearch for unstructured data. Lead efforts in building cloud infrastructure, particularly in AWS (preferred) or Azure, using services such as Lambda, API Gateway, Batch processing, Kinesis, and Kafka. Oversee MLOps pipelines for robust deployment of ML models in production with platforms like Sagem

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department overview The Advanced Packaging Technology Development (APTD) team at Micron leads the creation of cutting‑edge memory and storage solutions that power the AI era. We work hands-on with global R&D groups, suppliers, and manufacturing teams to turn breakthrough ideas into real, production-ready technologies. We thrive on innovation and collaboration! Job summary As a Principal Engineer within APTD, you will play a key role in driving innovation through strategic, industry‑informed leadership. Based at the Boise campus, you will shape advanced packaging technology roadmaps and investment priorities by applying deep technical expertise alongside rigorous cost and value analysis, enabling well‑balanced trade‑off decisions across performance, scalability, and total cost of ownership. Working in a highly collaborative, dynamic environment, you will influence solutions aligned with Micron’s business objectives, contributing directly to increased revenue, long‑term strategic success, and the development of leading‑edge packaging technologies. Responsibilities Deliver high-value, differentiated technology solutions by finding opportunities and driving technical innovation to provide business value. Collaborate continuously with internal and external partners to ensure seamless technology integ

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Advanced Packaging Technology Development (APTD) department at Micron Technology is at the forefront of innovation, driving the advancement of memory and storage Interconnects and Packaging solutions that transform how the world uses information. Micron is dedicated to developing innovative processes and technologies that enable the creation of next-generation semiconductor products which drive the AI revolution. By collaborating closely with our global R&D, equipment and materials suppliers, and manufacturing teams, we ensure the efficient development, transfer and implementation of new technology nodes, maintaining Micron's leadership in the industry. As a Principal Process Engineer in Hybrid and Fusion Die Bonding, you will provide technical leadership in the startup, development, qualification, and optimization of advanced die-bonding processes for next-generation semiconductor products. You will apply deep process expertise and data-driven problem solving to improve product quality and reliability, accelerate yield learning, reduce cost, increase productivity, mitigate technical and manufacturing risk, and resolve complex production-line challenges. Working across upstream and downstream process modules, you will lead cross-functional efforts to establish robust process windows, qualify new technologies, and enable scalable manufacturing integration. You will also collaborate with internal equipment-development teams and strategic suppliers to rapidly deploy new systems, shape equipment and process roadmaps, and drive hybrid-bondin

Job Details: Job Description: Position Overview: As a Platform Hardware Design Engineer, you will contribute to the end-to-end development of advanced platform hardware, translating platform level requirements into circuit and component level specifications and ultimately into high quality board designs. You will work across the hardware development lifecycle, including architecture and requirements definition, component selection, schematic design, PCB implementation, design reviews, board fabrication and assembly support, power-on, bring-up, debug, validation, and delivery. This is a hands-on engineering role for candidates who enjoy solving complex hardware problems and working across disciplines to turn system requirements into reliable, manufacturable hardware. Our Business Group You will be joining the Silicon and Platform Engineering Group (SPE), an organization at Intel committed to advancing Intel's mission of delivering world class silicon and platform solutions. The group focuses on developing integrated systems that align with customer needs and support Intel's broader goals of leadership in technology innovation. SPE collaborates across diverse domains to ensure Intel platforms meet performance, reliability, and scalability requirements. Our work sits at the intersection of silicon, board hardware, firmware, validation, signal and power integrity, mechanical and thermal engineering, PCB technology, manufacturing, and system integration. Our hardware engineers have a broader responsibility than executing an individual design. They help establish platform architecture, guide implementation, identify and qualify appropriate hardware solutions, provide technical leadership during board power-on and debug, and lead resolution of schematic, layout, SI/PI, and hardware issues. Key Responsibilities Platform and Board Design • Translate platform level requirement

About the Team The ChatGPT organization at OpenAI supports our mission by bringing advanced AI capabilities to hundreds of millions of users worldwide. The Image Generation team is responsible for one of the fastest-growing experiences in ChatGPT, enabling users to create, edit, and transform images through natural language. Recent breakthroughs in multimodal AI have dramatically improved image quality, instruction following, editing precision, consistency, and text rendering. We're building the systems and experiences that turn these research advances into products used daily by creators, professionals, businesses, and consumers around the world. Our team sits at the intersection of research, product, design, and infrastructure. We work closely with model researchers, mobile engineers, frontend engineers, and platform teams to build intuitive experiences and scalable systems that power image generation at global scale. Whether users are creating marketing assets, visualizing ideas, editing photos, designing products, or simply exploring their creativity, our goal is to make visual creation feel as natural as having a conversation. About the Role We are looking for an experienced Full Stack Engineer to join the Image Generation team and help shape the future of AI-powered visual creation. In this role, you'll own features end-to-end across both frontend and backend systems, building the experiences that enable users to generate, edit, organize, and interact with images inside ChatGPT. You'll work across the entire stack—from highly interactive user interfaces and real-time workflows to backend services, APIs, orchestration systems, and data infrastructure. This role is ideal for engineers who enjoy moving fluidly between product development and systems engineering, collaborating closely with design, product, and research teams to rapidly bring new AI capabilities to users. You'll help define entirely new interaction paradigms as multimodal AI continues to evolve. In

ASIC Subsystem Engineer (Mid-level or Lead) Company: The Boeing Company The Boeing Space & Missions Systems Division is seeking a Mid-level or Lead ASIC Subsystem Engineer to join the Space and Launch Engineering team in El Segundo, California. In this role, you will support the design and development of advanced ASICs and mixed-signal components for space-based digital communication systems supporting commercial, civil, and national security programs. You will work with a highly motivated, multidisciplinary team and collaborate with domestic and international customers, suppliers, program management, integration and test engineers, and senior technologists. Assignments may span the full unit life cycle, including architecture development, internal trade studies, concept studies, system definition, design development, verification, integration, qualification, and unit sell-off. This position is primarily focused on subsystem-level architecture, requirements, verification, integration, and technical coordination for ASICs, digital signal-processing functions, and mixed-signal ADC/DAC converters. This position is expected to be 100% onsite. The selected candidate will be required to work onsite at the El Segundo, CA, location. This worksite participates in Boeing’s optional 9/80 schedule rotation. 9/80 is a rotation in which employees can work 9 hour shifts, 8 days per pay period (bi-weekly) and receive every other Friday off. Position Responsibilities: Define, develop and validate next-generation multi-ASIC architectures incorporating digital signal-processing cores for digital communication subsystems. Architect, derive, allocate, and verify requirements for ASIC functions, interfaces, and su

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking experienced engineers for Principal, MTS, and SMTS roles. The level at which candidates are hired will be determined by their years of experience, demonstrated technical depth, and overall qualifications Principal Photonics Integration Engineer The Advanced Packaging Technology Development (APTD) team is shaping the future of memory, storage, and photonics technologies that power AI, high-performance computing, and next-generation data infrastructure. We collaborate across research, device, process, packaging, and manufacturing organizations to develop innovative solutions that move quickly from concept to production. Join a team where technical challenges are complex, innovation is constant, and your work will directly influence Micron's technology roadmap. As a Principal Photonics Integration Engineer, you will lead the development and integration of silicon photonics and heterogeneous integration technologies that enable high-performance optical connectivity solutions. This role combines process integration, advanced packaging, device development, and program leadership to bring new technologies from concept through manufacturing readiness. You will work across multidisciplinary teams to solve complex technical challenges while employing AI-enabled engineering tools to accelerate development and improve decision-making. Responsibilities: Develop and optimize end-to-end process integration flows for silicon photonics technologies from concept throug

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we are engaged in developing groundbreaking silicon-to-systems solutions – right from technology development and advanced memory designs to product development, systems design and validation resulting in world class memory solutions. Job Description As a DRAM Product Engineer (Intern) at Micron, you will immerse yourself in a dynamic team dedicated to tackling complex challenges head-on. Your primary responsibility will be to ensure Micron's products make it to market seamlessly. This encompasses evaluating initial silicon and validating design functionality at both the DRAM component and module levels, leveraging the latest technology from our customers. Additionally, you will collaborate closely with our manufacturing teams to optimize test flows, ensuring both yield and quality are maximized. As a Product Engineer, you will act as a crucial liaison between Technology Development, Design, Manufacturing, and Quality Assurance departments, facilitating smooth communication and coordination across these key areas. Responsibilities Support new product introduction by partnering with design, manufacturing, and yield teams to prepare for DRAM prod

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we are engaged in developing groundbreaking silicon-to-systems solutions – right from technology development and advanced memory designs to product development, systems design and validation resulting in world class memory solutions. Job Description As a DRAM Product Engineer Yield & Quality (Intern) at Micron, you will immerse yourself in a dynamic team dedicated to tackling complex challenges head-on. Your primary responsibility will be to ensure Micron's products make it to market seamlessly. This encompasses evaluating initial silicon and validating design functionality at both the DRAM component and module levels, leveraging the latest technology from our customers. Additionally, you will collaborate closely with our manufacturing teams to optimize test flows, ensuring both yield and quality are maximized. As a Product Engineer, you will act as a crucial liaison between Technology Development, Design, Manufacturing, and Quality Assurance departments, facilitating smooth communication and coordination across these key areas. Responsibilities Support new product introduction by partnering with design, manufacturing, and yield teams to p

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. SUMMARY: As a Design Engineer at Micron Technology, Inc., you will be responsible for designing and analyzing digital and analog circuits used in the development of memory products. We are engaged in developing groundbreaking silicon-to-systems solutions – right from technology development and advanced memory designs to product development, systems design and validation resulting in world class memory solutions. In this position, you will collaborate with Micron’s various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction. Responsibilities: Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits. Parasitic modeling and assisting in design validation, reticle experiments and required tape-out revisions. Overseeing and managing the layout process including floor-planning, placement, and routing. Performing verification processes with modeling and simulation using industry standard simulators. Contributing to cross group communication to work towards standardization and group success. Working with Marketing, Probe, Assembly, Test, Pro