Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits. Design, implementation, and improvement of Complex Analog Power Management IPs such as Bandgap reference, Voltage/Current reference, Regulators, Charge-pumps, CMOS Amplifiers, Comparators in advanced semiconductor process nodes for advanced DRAM products. Parasitic modeling and assisting in design validation, reticle experiments and required tape-out revisions. Being responsible for and managing the layout process including floor-planning, placement, and routing. Performing verification processes with modeling and simulation using industry standard simulators. Contributing to cross group communication to work towards standardization and group success. Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product. Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality. Driving innovation into the future Memory generations within a dynamic work environment. Leveraging AI About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Design and implement physical layouts for advanced digital, analog, and mixed-signal circuits used in the development of memory products. Responsible for translating schematics into high quality, manufacturable layouts that meet process rules, performance targets, and schedule commitments, while collaborating closely with cross functional engineering teams. Create physical layouts of transistors, resistors, capacitors, and interconnect structures for digital, analog, and mixed-signal circuits. Perform block-level floor planning, including layout area estimation and optimization. Develop IC top-level floorplans and provide accurate total die area estimates. Execute routing, power bus design, and creation of robust PDN (Power Domain Network) solutions to ensure optimal electrical performance, reliability, and scalability. Ensure layouts comply with foundry process design rules and verify layout-versus-schematic (LVS) and design rule checks (DRC). Apply recommended layout, verification techniques, tools, and design flows to deliver high-quality designs on schedule. Work closely with analog/mixed-signal and digital design engineers to ensure proper layout implementation, including critical matching and symmetry requirements. Collaborate with Design Engineering, Product Engineering, Process Integration, Probe, and Assembly teams to proactively optimize designs for manufacturability, cost, quality, reliability, and time-to-market. Create and maintain layout-related documentation and actively participate in layout and design reviews. Support continuous improvement of
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Principal ASIC Design Engineer About the Role At Micron, we transform how the world uses information to enrich life for all. As a global leader in memory and storage innovation, we develop technologies that accelerate intelligence and enable the next era of AI, ML, and advanced computing. Micron’s Interface Pathfinding team drives performance-scaling innovation across circuits, signaling, packaging, and interconnects with a 3–5 year technology horizon. A core part of that work is silicon-based validation of novel PHY solutions, and we are growing the team to execute. As the Principal ASIC Design Engineer , you will be the primary digital contributor on a deliberately small, senior team — united around the goal of carrying high-speed interface technologies from architecture to tape-out. The team’s analog and chip-level architecture is anchored by a deeply experienced analog custom design engineer; your role is to be the authoritative digital voice — owning RTL design and micro-architecture of the digital blocks, defining timing constraints, supporting verification, and serving as the key interface between the digital design and the analog and layout specialists who will carry the implementation through to silicon. On a test ASIC of this scope, the front-end digital work is the critical path, with contractor and layout support engaged as bandwidth demands warrant. What You’ll Own Digital Block Architecture & RTL Design Own the micro-architecture and RTL implement
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. In this position, you will be joining a brilliant team to collaborate with Micron’s various design and verification teams all over the world, support the efforts of design verification flow development, optimization, and implementation and work with cross-functional team to assure the best cost, quality, reliability, time-to-market, and customer satisfaction We are seeking a talented CAD senior engineer specialized in analog and digital simulations to join our high-achieving engineering team. As a CAD senior engineer, you will play a pivotal role in optimizing and simulating complex analog and digital circuits, contributing to the development of state-of-the-art products that shape our industry. You will get a chance to develop the industry's first and unique flows to enhance productivity and reduce pre-silicon failures. Responsibilities: Work closely with memory design teams and solve their daily challenges and provide complete solutions for the future. Proactively identify problem areas for improvement, propose, and develop innovative solutions. Develop highly scalable, and clean software systems. Continuously evaluate and implement new tools and technologies to improve the current software flows. Work with EDA vendors to evaluate and integrate E
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Design, implementation and integration of complex analog circuits such as CMOS Amplifiers, Comparators, Bandgap References, LDOs, Charge Pumps, Oscillators, DLL, IO Buffers, Analog Test Mux, Process Monitor, and Temperature sensors for advanced DRAM products. Design, implementation and integration of synchronous and asynchronous custom digital block Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Analog/Memory/Logic circuits. Parasitic modeling and design validation, reticle experiments and required tape-out revisions. Overseeing and managing the layout process including floor-planning, placement, and routing Performing verification processes with modeling and simulation using industry standard simulators Contributing to cross group communication to work towards standardization and group success. Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product. Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality. Mentor and lead young designers. Also, strong AI proficiency, a solid understanding of agentic AI models, a
InnoPhase Inc., DBA GreenWave Radios™, is at the forefront of innovation in Open RAN digital radios. Our cutting-edge solutions, powered by the Hermes64 RF SoC, are designed to enhance network energy efficiency while dramatically reducing operational expenses, with purpose-built silicon that is the heart of ORAN-based active antenna arrays. Headquartered in San Diego, California, GreenWave Radios™ has established itself as a pioneer in delivering power-efficient digital-to-RF solutions. The company is supported by a talented team of over 100 engineers spread across four global R&D facilities. With an extensive portfolio of more than 120 global patents, GreenWave Radios™ continues to push the boundaries of radio technology and innovation. To learn more about GreenWave Radios™ and hear what our employees have to say, visit the GreenWave™ certification profile at GreatPlacetoWork.com or explore our Home - GreenWave Radios website. About the Role We're looking for an experienced Principal Hardware Design Engineer/Manager to lead PCB design and development for next-generation, high-performance cellular base stations. You'll architect the board-level circuitry that complements our custom silicon — spanning digital processing, high-speed SerDes, power management, and RF transmission/reception — to deliver a solution that's both high-reliability and low-cost/power. This opportunity is a high-visibility technical leadership role based in San Diego, CA: you'll own PCB system architecture from concept through qualification, working shoulder-to-shoulder with various domain experts to ensure everything comes together. What You'll Do Own PCB development end-to-end, from concept through production Design and implement RF, analog, digital, and power circuits for high-performance base station products Partner with experts on floor planning and PCB constraints for seamless integration Lead and review schematic capture and PCB layout Optimize PCB stack-up for per
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Design/Senior Design Engineer – NAND digital (NVE Engineering) Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. department Introduction The Non-Volatile NAND Design Engineering group is responsible for the design and optimization of analog, digital and mixed-signal circuits enabling advanced NAND Flash memory products. Close collaboration with cross-functional teams ensures scalable, manufacturable, and reliable solutions across technology nodes. Position Overview As a Logic Design Engineer in the NVEG organization at Micron Semiconductor Italia, you will play a key role in the definition, implementation, verification, and silicon validation of NAND Flash logic features. In this role, you will act as a technical owner of complex logic functionalities, working at the intersection of architecture, firmware, datapath, analog, and test teams. You will contribute to new product pathfinding, ensure robust feature implementation across technology generations, and support silicon bring‑up, validation, and learning. Responsibilities Responsibilities include, but are not limited to: • Own end-to-end development of logic features, from architecture definition through RTL implementation, verification, and post-silicon validation. • Translate system and firmware requirements into micro-a
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Design/Senior Design Engineer – Auto Place & Route / Digital Implementation (NVE Engineering) Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Introduction The Non-Volatile NAND Design Engineering group is responsible for the design and optimization of analog, digital, and mixed-signal circuits enabling advanced NAND Flash memory products. Close collaboration with multi-functional teams ensures scalable, manufacturable, and reliable solutions across technology nodes. Position Overview As a Digital Implementation / Auto Place & Route Engineer in the NVEG organization at Micron Semiconductor Italia, you will drive the physical implementation of advanced NAND Flash digital designs from synthesized netlist through tape-out. In this role, you will own block- and subsystem-level implementation, including floorplanning, power planning, placement, clock tree synthesis, routing, optimization, and physical sign-off. You will partner with RTL, verification, DFT, analog, custom layout, CAD, and product teams to achieve performance, power, area, reliability, and schedule targets. Responsibilities Responsibilities include, but are not limited to: • Own end-to-end RTL-to-GDSII physical implementation for complex digital blocks and subsystems using automated
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Craft and analyze digital and analog circuits used in the development of memory products including simulating, optimizing, and floor planning DRAM circuits. Collaborate with various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly, and Marketing to proactively craft HBM products that optimize all manufacturing functions and assure the best performance, power, cost, quality, reliability, time-to-market, and customer happiness. Innovate and integrate end-toend groundbreaking front-end and backend processes with groundbreaking design, debugging various tests, and qualification techniques to develop the lowest power per bit solutions to improve customer experience in the field of ML (Machine Learning) and AI (Artificial Intelligence). Employer will accept a Master’s degree in Electrical Engineering, Physics, Computer Engineering, Semiconductor Engineering or a related field and 10 years of experience in the job offered or in a related field. Position requires: 1. High-speed memory design on data paths, from I/O interface to core array 2. 2. Power domain network analysis 3. Memory test architectures like MBIST and production silicon validation 4. Digital design methodologies experience including RTL design, synthesis, and physical implementation 5. ASIC design development using digital design 6. Memory core timing, latency control, and signal integrity consideration in advanced designs <p style="
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a NAND Reliability Product Engineer, you will be responsible for defining, evaluating, and safeguarding the Extrinsic/Intrinsic reliability of Micron’s NAND Flash products. You will work hands‑on with large‑scale data analysis, electrical failure analysis, and cross‑functional teams to ensure robust product reliability and prevent escapes to customers. This role offers deep technical ownership at the intersection of device physics, circuits, process technology, and product engineering, with strong visibility across development and manufacturing organizations. Key Responsibilities Define and implement NAND Flash reliability test flows to assess product reliability performance and prevent extrinsic/intrinsic reliability escapes. Perform high‑volume statistical data analysis to evaluate NAND DPM/ intrinsic reliability risks and trends. Drive electrical failure analysis, including advance characterization, to identify root causes and solution spaces. Develop short‑term countermeasures such as targeted stresses and screens, applying knowledge of digital/analog circuits, device physics, and process engineering. Qualify the product with innovative control measures to provide best in Class DPM and Cell reliability. Collaborat
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is looking for a Mixed Signal IC Layout Design Engineer role involves full-custom physical layout of analog and mixed-signal integrated circuits, turning schematics into manufacturable layouts that meet performance, power, area, and reliability targets in advanced FinFET processes. The role focuses on high quality, high-speed analog/mixed-signal blocks and their integration into larger SoCs. This role is remote, based out of any in the United States. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are An experienced analog/mixed-signal IC layout engineer with strong full-custom layout background on high-speed blocks (PLLs, VCOs, ADCs, DACs, LDOs, comparators, clock generators, high-speed I/Os). Proficient with Synopsys Custom Compiler or Cadence Virtuoso for custom layout, and Synopsys ICV or Siemens Calibre for physical verification (DRC, LVS, ERC, DFM, Antenna). Deep experience in CMOS/FinFET nodes (ideally TSMC or Samsung 12nm–2nm) with delivered silicon and a strong grasp of EM/IR, ESD, and latch-up in mixed-signal layouts. Detail-oriented and organized, able to own complex blocks independently and collaborate effectively with cir
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 43 years, Micron Technology has delivered world‑leading memory and semiconductor solutions. As an HBM Memory Design Engineer on the HBM Architecture Team, you will design, simulate, optimize, and floorplan advanced DRAM circuits for next‑generation High Bandwidth Memory products. You will work across digital, analog, and mixed-signal domains to ensure functional correctness, performance, and power efficiency. Your role includes collaborating with globally distributed teams developing modern HBM solutions for AI and ML applications. Responsibilities • Design, simulate, and optimize DRAM memory arrays, data paths, ECC, command/control logic, and high‑speed interface circuits • Evaluate block‑level and full‑chip functionality and propose solutions to ensure functional correctness • Analyze timing, area, power, and complexity trade‑offs in high‑speed DRAM and mixed‑signal designs • Perform pathfinding and feasibility studies for new architectures and future HBM products • Contribute to the design, layout, and optimization of memory, logic, and analog circuits • Support large‑scale verification, debug, and silicon validation activities • Collaborate across multi-functional teams involved in TSV‑based 3D stacking and vertical integration • Participate in design reviews and drive continuous improvement of design methodologies Minimum Qualifications • BSEE with 7+ years or MSEE with 5+ years of relevant engineering experience • Strong knowledge of
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Roles and Responsibilities Verification of Analog and mixed signal circuits. Generation of a Full chip mixed signal simulation environment where analog, digital and FW co-exist. Schematic/behavioral model generation of certain blocks to make FC simulation feasible/efficient Device level electrical rule checks – SOA, snapback, sfb etc Static and dynamic simulations to identify the leakage paths SPF extraction and fanout, coupling checks Power cycling simulations – PL and Brown out events Chip level user mode simulations correlating analog subsystems, logic and FW algorithms Design data sheet review and generation of verification plan You will also work and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products to optimize all manufacturing functions and assure the best cost, quality, root-cause analysis, reliability, time-to-market, and customer satisfaction. Requirements Understanding of MOS device physics mainly second order effects Basic knowledge of few analog circuits – CM, BGR, op-amp, regulators, ADC, DAC and charge pumps Familiarity with shell, Perl/python scripts Familiarity with virtuoso, hspice, xa and cosim Familiarity with HDLs – Verilog/SV and Verilog A/AMS Debug enthusiast with system level outlook Ability to grab complex workflows and constant drive to innovate
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Summary: As a NAND Reliability Product Engineer, you will be responsible for defining, evaluating, and safeguarding the Extrinsic/Intrinsic reliability of Micron’s NAND Flash products. You will work hands‑on with large‑scale data analysis, electrical failure analysis, and cross‑functional teams to ensure robust product reliability and prevent escapes to customers. Main Responsibilities: Define and implement NAND Flash reliability test flows to assess product reliability performance and prevent extrinsic/intrinsic reliability escapes. Perform high ‑ volume statistical data analysis to evaluate NAND DPM/ intrinsic reliability risks and trends. Drive electrical failure analysis , including advance characterization, to identify root causes and solution spaces. Develop short ‑ term countermeasures such as targeted stresses and screens, applying knowledge of digital/analog circuits, device physics, and process engineering. Qualify the product with innovative control measures to provide best in Class DPM and Cell reliability. Collaborate closely with Fab, NAND Technology, NAND Design, Product Development, System Development, and Quality/Reliability teams to d
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. MTS, Interface Pathfinding Hardware Development Engineer About the Role At Micron, our vision is to transform how the world uses information to enrich life for all. As a global leader in memory and storage innovation, we develop technologies that accelerate intelligence and enable the next generation of high-speed interfaces. Micron’s Interface Pathfinding team drives performance-scaling innovation across circuits, signaling, packaging, and interconnects with a 3–5 year technology horizon. As the Interface Pathfinding Hardware Development Engineer , you will own characterization for a high-speed interface test-chip program: the characterization plan and its success criteria, development of the characterization bench hardware and its automation, the measurement-uncertainty budget, and the correlation report proving the silicon matches the models. You will join a small, senior team spanning analog design, layout, digital design, and verification, working closely with the Chip Lead and the Signal Integrity and Physical Design engineers — driving decisions independently while consulting heavily with other experts across Micron. This is a foundational hire for a growing program. Strong execution early is expected to lead to follow-on projects of increasing scope, team size, and characterization complexity — including an expanding mandate for AI-enabled engineering leadership across the organization. What You’ll Own Characterization Planning • Derive the electr
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