Design Manager Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The HBM Design Technology Package Co-Optimization (DTPCO) organization is seeking a Staff Engineer! Lead the design and development of test vehicles that enable technology learning and risk reduction for future HBM products! This role serves as a key technical contributor within DTPCO, partnering closely with Architecture, Design, Layout, Product Engineering, Reliability, and Advanced Packaging teams to translate emerging product requirements and technology challenges into actionable test vehicle solutions. You will apply expertise in semiconductor design, physical implementation, silicon characterization, and advanced packaging technologies to define test structures, develop validation strategies, and generate data that drives product decisions across future HBM generations. Unlike a traditional product role centered on ownership of product blocks, this position emphasizes enabling learning in development and engineering. It does so by developing representative test vehicles and characterization structures. Key Responsibilities Serve as a technical lead for HBM test vehicle design and structure development within DTPCO. Partner with HBM product, technology and reliability team. Define and implement test structures targeting key learning areas such as package interaction and reliability Drive test vehicle content definition, structure specifications, measurement requirements, and validation objectives. Analyze silicon characterization and qualification results to identify optimization opportunit

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron's ASIC Logic Design team develops next-generation ASICs and controller IP that enable industry-leading memory solutions. Working across advanced process technologies, the team collaborates with architecture, analog, verification, physical design, and validation engineers to deliver high-performance, production-ready silicon for future DRAM products. As an ASIC Digital Design Engineer, you will contribute to the design and development of RTL for next-generation DRAM memory controllers and subsystems. You will work in a collaborative engineering environment supporting design implementation, simulation, validation, and chip bring-up activities while leveraging AI-enabled tools to improve productivity and design quality. Responsibilities Design and develop RTL for DRAM memory controllers and subsystem components using SystemVerilog. Collaborate with analog, verification, physical design, validation, and other cross-functional teams to support successful product development. Develop and validate HDL models, support simulation and co-simulation activities, and analyze design functionality and performance. Support chip bring-up, debugging, and validation activities to identify and resolve design issues. Use scripting, automation, and AI-enabled tools to improve design workflows, productivity, and engineering efficiency. Minimum Qualifications 0-2 years of relevant experience through intern

About the Team OpenAI develops models that can reason through complex problems and hardware designed for the demands of advanced AI. AI for Chips connects these efforts: applying increasingly capable AI systems to the work of semiconductor engineering. Our goal is to help engineers develop better chips and shorten design cycles. This work brings research, model training, and hardware expertise together to build tools that engineers can use on real designs, with correctness and measurable performance at the center. About the Role We’re hiring a Research Engineer to help OpenAI models solve chip-design problems through reinforcement learning, tool use, and evaluation. You’ll own experiments from the initial idea through implementation and analysis. That means building environments and evaluations, running training, investigating failures, and using the results to decide what to try next. You’ll also build the software needed to make those experiments reliable and reproducible. We value strong coding fundamentals, careful experimental judgment, and the ability to make progress independently. Prior chip-design experience is helpful, but you can learn the domain alongside the team’s hardware specialists. In this role, you will: Build RL environments and evaluations for tasks such as RTL generation, design verification, and physical design optimization. Develop and test approaches that help models use chip-design tools and improve power, performance, and area while preserving correctness. Design experiments, establish baselines, and measure whether improvements hold up on new tasks and designs. Investigate failures across model behavior, rewards, evaluation tools, and experiment infrastructure. Improve iteration speed through better tooling, faster evaluations, and proxy rewards that reflect the outcomes we care about. Turn successful experiments into reusable research code and training workflows, working closely with researchers and engineers. You might thrive in this ro

Principal Engineer, Global Environmental Compliance - Design — 2 Locations. Apply via Workday.

About the Team OpenAI develops models that can reason through complex problems and hardware designed for the demands of advanced AI. AI for Chips connects these efforts: applying increasingly capable AI systems to the work of semiconductor engineering. Our goal is to help engineers develop better chips and shorten design cycles. This work brings research, model training, and hardware expertise together to build tools that engineers can use on real designs, with correctness and measurable performance at the center. About the Role We’re hiring a Software Engineer to build the research infrastructure and tooling that help OpenAI models design silicon. You’ll turn chip-design workflows into reliable environments for reinforcement learning and evaluation, and make it easier for researchers to run experiments and iterate on new ideas. You’ll move between software engineering, tool integration, and open research problems. We value strong coding fundamentals, clear technical judgment, and independent execution. Prior chip-design experience is helpful, but you can learn the domain alongside the team’s hardware specialists. In this role, you will: Build and maintain infrastructure for reinforcement learning environments, evaluations, and long-running experiments. Integrate electronic design automation (EDA) tools into workflows for RTL generation, verification, and physical design optimization. Improve experiment reliability, reproducibility, observability, and performance; debug failures across tools, services, and infrastructure. Develop tooling and model harnesses that let researchers test ideas quickly and measure correctness and power, performance, and area (PPA). Collaborate with researchers and engineers to turn successful experiments into reusable systems and training workflows. Own ambiguous projects end to end, communicate progress, and use results to guide the next iteration. You might thrive in this role if you: Have strong software engineering fundamentals, with

Senior Scientist, AI/ML (Biologics Design) — United States - California - Foster City. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join Micron’s AI-Optimized Memory Architecture team, where we are shaping the future of artificial intelligence workloads through next-generation memory solutions. We partner closely with customers to architect and deliver high-performance memory systems that enable emerging AI platforms and applications. Our team values innovation, technical excellence, and collaboration as we bring advanced memory technologies from concept to silicon. As a Member of Technical Staff, you will play a key role in translating architectural vision into efficient, silicon-proven hardware implementations. This position offers the opportunity to work on tightly coupled, high-performance memory architectures for AI, balancing performance, power, area, and reliability while influencing critical design decisions across the development lifecycle. Responsibilities: Translate architecture requirements into scalable microarchitectures and drive implementation from concept through silicon Design, implement, and review SystemVerilog RTL for advanced memory system architectures Perform synthesis and early PPA analysis to optimize area, power, and timing Develop and maintain microarchitecture documentation that aligns design intent across teams Evaluate architectural and implementation tradeoffs to support technical decision-making Minimum Qualifications: Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical

About Anthropic Anthropic’s mission is to create reliable, interpretable, and steerable AI systems. We want AI to be safe and beneficial for our users and for society as a whole. Our team is a quickly growing group of committed researchers, engineers, policy experts, and business leaders working together to build beneficial AI systems. About the role As a Safeguards Enforcement Analyst on the user well-being team, you'll build and execute enforcement workflows that keep our products safe, with a focus on detecting and mitigating potential harm. Your initial focus will be on how Anthropic handles age. A core part of this work is making sure our consumer products reach the right audiences, including the detection signals, verification paths, and appeals workflows that keep underage users off surfaces not designed for them. Claude also reaches younger users through third-party developers building on our API, and you'll be the enforcement partner that sales and platform teams rely on when those customers need guidance on deploying age-appropriately. This position may expand into broader areas of user well-being enforcement over time. Safety is core to our mission, and you'll help shape policy enforcement so that our users can safely interact with and build on top of our products in a harmless, helpful, and honest way. Important context for this role: In this position you may be exposed to and engage with explicit content spanning a range of topics, including those of a sexual, violent, or psychologically disturbing nature. There is also an on-call responsibility across the Policy and Enforcement teams. Key responsibilities Design and architect automated enforcement systems and review workflows that scale effectively while maintaining high accuracy Partner with Engineering and Data Science teams to optimize detection models for policy violations and automated enforcement systems Review flagged content to drive enforcement and policy improvements Enforce usage policies wi

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a NAND Reliability Product Engineer, you will be responsible for defining, evaluating, and safeguarding the Extrinsic/Intrinsic reliability of Micron’s NAND Flash products. You will work hands‑on with large‑scale data analysis, electrical failure analysis, and cross‑functional teams to ensure robust product reliability and prevent escapes to customers. This role offers deep technical ownership at the intersection of device physics, circuits, process technology, and product engineering, with strong visibility across development and manufacturing organizations. Key Responsibilities Define and implement NAND Flash reliability test flows to assess product reliability performance and prevent extrinsic/intrinsic reliability escapes. Perform high‑volume statistical data analysis to evaluate NAND DPM/ intrinsic reliability risks and trends. Drive electrical failure analysis, including advance characterization, to identify root causes and solution spaces. Develop short‑term countermeasures such as targeted stresses and screens, applying knowledge of digital/analog circuits, device physics, and process engineering. Qualify the product with innovative control measures to provide best in Class DPM and Cell reliability. Collaborat

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Interested in changing the landscape of artificial intelligence workloads? Join our team where we are building next-generation, high-performance memory solutions for AI. In Micron's AI-optimized Memory Architecture organization, we partner closely with customers to design and deliver memory solutions purpose-built for emerging AI systems and applications. As a Member of Technical Staff in the AI-optimized Architecture team, you will contribute to the microarchitecture and design of tightly coupled, high‑performance memory for AI. Apply expert knowledge to realize architecture features into silicon, with a strong focus on performance, power, area, (PPA) and reliability. This role is ideal for an engineer who combines deep digital design experience with strong architecture intuition, motivated by turning architectural intent into efficient, silicon‑proven implementations. What you'll do Translate architecture requirements into efficient, scalable microarchitectures that optimize systems metrics with ownership from concept through implementation. Design, implement, and review SystemVerilog designs for memory systems architectures. Perform synthesis and early analysis to estimate and optimize area, power, and timing, and to guide architecture and microarchitecture tradeoffs. Compose and maintain clear microarchitecture documentation that aligns design intent across teams. Drive technical decisions by evaluating tradeoffs across microarchitecture and implementation constraints. Wha

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Staff Digital Design Engineer to help define, build, and optimize high-performance IP and SoC architectures for next-gen AI and compute workloads. This role is ideal for engineers who thrive at the intersection of microarchitecture, RTL implementation, and performance-aware design. This role is hybrid, based out of Toronto, Ottawa, Boston, or Austin. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A digital design expert with a deep understanding of computer architecture and IP microarchitecture. Skilled in RTL development (Verilog/VHDL) and familiar with full ASIC flows. Comfortable optimizing for power, performance, and area (PPA) under aggressive design goals. A naturally collaborative and technical engineer — you thrive in spec definition, peer reviews, and team-wide planning. What We Need Architecture and RTL implementation of Tenstorrent’s custom IP blocks and SoC components. Performance-aware design decisions for compute, interconnect, or memory-heavy blocks. Occasional contributions to validation using emulation, FPGA prototyping, or UVM flows. Strong synthesis and timing closure awareness to support backend

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. About profile – Embedded Software Engineer , System Software Development As an Embedded Software Engineer in the Systems Integration Group (SIG) , you will help create software for internal equipment used across Assembly & Test organization in one of the world’s largest semiconductor companies . Working in a multi-disciplin ary engineering environment you will work with a global team creating software for a variety of internal equipment . We are looking for engineers who are hands-on, self-motivated, excited to learn, and grow individually and as a team. You will create software that interfaces to various hardware in bare metal, and Linux environments . You will work with other software engineers and other engineering disciplines to create and support this custom equipment from the ground up. R esponsibilities: Our embedded software engineers are challenged daily with a wide range of challenges and res

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. As a PCB Power Design Engineer, you will design and optimize power distribution systems for Tenstorrent’s next-generation AI accelerator cards, balancing performance, area, cost, and reliability. You will contribute across the full power design lifecycle, from component selection and simulation through board bring-up, validation, debugging, and production readiness. Working closely with hardware, firmware/software, thermal, mechanical, and validation teams, you will help deliver robust power architectures for high-performance AI systems. This role is hybrid, based out of Toronto, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are An electrical engineer with experience designing, analyzing, and debugging power distribution systems for high-performance or high-power products. A hands-on engineer who enjoys moving from schematics and simulations into lab bring-up, testing, troubleshooting, and design validation. A systems-oriented collaborator who can work effectively across hardware design, firmware/software, thermal, mechanical, and validation teams. A detail-oriented problem solver who balances electrical performance, power integr

The pay range is $73,000.00 - $132,000.00 Pay is based on several factors which vary based on position. These include labor markets and in some instances may include education, work experience and certifications. In addition to your pay, Target cares about and invests in you as a team member, so that you can take care of yourself and your family. Target offers eligible team members and their dependents comprehensive health benefits and programs, which may include medical, vision, dental, life insurance and more, to help you and your family take care of your whole selves. Other benefits for eligible team members include 401(k), employee discount, short term disability, long term disability, paid sick leave, paid national holidays, and paid vacation. Find competitive benefits from financial and education to well-being and beyond at https://corporate.target.com/careers/benefits . About us: Working at Target means helping all families discover the joy of everyday life. We bring that vision to life through our values and culture. Learn more about Target here . Target’s physical stores are a critical expression of that promise—and a key focus in our next chapter. Guided by our commitment to style, design, and value, the A

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Design Engineer in the FLASH Group at Micron Technology, Inc., will be core technical individual contributor in design and validation of the on-chip controller and mixed signal circuitry in NAND FLASH chips. In this highly visible and challenging role, your responsibilities will include architecture development and product definition, detailed transistor level design, test plan, system integration and verification. Some RTL design and implementation of the controller hardware, design and development of firmware code for NAND internal operations and full-chip Verilog Validation. Successful candidates must have: Solid knowledge in Verilog language. Solid digital logic fundamentals. Basic understanding of analog circuits. An understanding and knowledge with mixed-mode design and validation. Through understanding of Design/Verification CAD tools such as ncsim, Design Compiler, Formality, PrimeTime, etc. Knowledge of TCL or PERL. Knowledge in non-volatile memory design (NAND in particular) is a strong plus. Using AI or AI proficiency is a plus About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performan