Design Manager Jobs

ENGINEER, DESIGN — Avezzano (AQ), Italy. Apply via Workday.

Engineer, SIG Electrical Design — San Jose, CA. Apply via Workday.

ENGINEER, DESIGN — Avezzano (AQ), Italy. Apply via Workday.

SR ENGINEER, DDEG Design Methodology — Hyderabad - Phoenix Aquila, India. Apply via Workday.

Director, Innovation Experience Design - Foundry — 2 Locations. Apply via Workday.

Senior Software Quality Engineer, Design Assurance — 2 Locations. Apply via Workday.

Sr. Logic Design Engineer — 3 Locations. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron is seeking a highly experienced Staff Engineer for Design Enablement and Layout in Advanced Packaging Technology Development. This role involves coordinating cross-functional engineering teams across geographies to develop and optimize design rules, requirements, design, and layout from early development through manufacturing! Job Description: Responsibilities will include, but are not limited to: Develop and refine Design Rules, Requirements, and Test Structures for advanced packaging. Create layout and DBR test vehicle and product designs to support technology development. Ensure robust Design Rule Checks (DRC) and appropriate responses to deviations. Analyze large datasets to extract meaningful insights and drive data-driven decision-making. Leverage of artificial intelligence to reduce development time. Manage structure evaluation to support development and quantify process margins. Strategically partner with teams to resolve process issues related to layout and prioritize solutions. Document and communicate complex problem resolutions and drive cross-node design rule alignment. Maintain effective communication across Process Integration, Product Engineering, Design, and Advanced Mask teams. Minimum Qualifications: BS/MS/PhD in Electrical Engineering, Microelectronics, Physics, or related field. 5+ years of experience in semiconductor industry in areas such as Process Integration, Yiel

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. If you want to challenge yourself and be a part of something great, join us today! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing! More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities which are hard to tackle, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human inventiveness and intelligence. We are now looking for a motivated Senior DTCO Engineer, CPU Physical Design to join our dynamic and growing team. As a Senior DTCO Engineer, you will evaluate advanced semiconductor foundry nodes to optimize next-generation CPU microarchitecture. You will coordinate between foundry partners, IP development, and hardware design teams to explore target technology nodes during early development phases. What you'll be doing: Evaluate advanced process technologies and help shape technology choices for next-generation CPUs. Run synthesis, place-and-route, and static timing analysis to assess how process features affect power,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Introduction The Systems Integration Group (SIG) develops advanced test solutions that support semiconductor manufacturing and product quality. The team partners across engineering, operations, procurement, and external suppliers to design, build, and deploy innovative hardware platforms that enable reliable testing and validation of semiconductor devices. Join the team building semiconductor memory test platforms for tomorrow’s AI infrastructure. Position Overview As an Electrical Design Engineer, you will design and develop electronic hardware used in advanced semiconductor test systems. You will apply electrical engineering principles to create analog, digital, and mixed-signal solutions that support manufacturing and product development. This role spans the full hardware development lifecycle, from concept and design through validation, deployment, and sustaining support. You will collaborate with cross-functional teams around the world to deliver reliable, high-quality test solutions. Responsibilities Design analog, digital, and mixed-signal electronic circuits from concept through implementation and validation Evaluate and select electronic components to meet system performance, reliability, and cost objectives Develop schematics and collaborate with PCB designers to create optimized board layouts Perform circuit simulation, analysis, and design verification using industry-standard tools Debug, test, and val

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s High Bandwidth Memory (HBM) Design Architecture organization, where we push the limits of memory technology every day. Our team works across global, multicultural engineering groups to build next-generation HBM solutions that power AI and machine learning. We believe the best ideas come from collaboration, curiosity, and a shared drive to innovate! This role plays a critical part in ensuring the reliability of Micron’s most advanced DRAM and HBM products. As an ESD & Latch Up Engineer, you will shape protection strategies from early design through high-volume manufacturing, working hands-on with silicon, layout, and foundry partners. If you enjoy solving deep technical problems and influencing product robustness at scale, this role offers both impact and growth. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities: Define and own chip-level and IP-level ESD and latch up strategies for HBM DRAM, base die, I/O, TSVs, and die-to-die interfaces Establish ESD and latch up requirements, targets, and sign-off criteria aligned with JEDEC/ESDA standards Enable ESD protection circuits and latch up safe layout practices across designs and technologies Lead silicon validation, failure analysis, and correlation of pre-silicon assumptions to silicon results Act as the technical interface to foundries and partner closely with design, packaging, reliability, and product teams<

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Summary Department Introduction: The Systems Integration Group (SIG) develops advanced test solutions that support semiconductor manufacturing and product quality. The team partners across engineering, operations, procurement, and external suppliers to design, build, and deploy innovative hardware platforms that enable reliable testing and validation of semiconductor devices. Position Overview: As an Electrical Design Engineer, you will design and develop electronic hardware used in advanced semiconductor test systems. You will apply electrical engineering principles to create analog, power, and mixed-signal solutions that support manufacturing and product development. This role spans the full hardware development lifecycle, from concept and design through validation, deployment, and sustaining support. You will collaborate with cross-functional teams around the world to deliver reliable, high-quality test solutions. Responsibilities Design analog, power, and mixed-signal electronic circuits from concept through implementation and validation Evaluate and select electronic components to meet system performance, reliability, and cost objectives Develop schematics and collaborate with PCB designers to create optimized board layouts Perform circuit simulation, analysis, and design verification using industry-standard tools Debug, test, and validate PCB assemblies using laboratory equipment such as oscilloscopes, power supplies, and electronic loads Create a

About Mach Industries Founded in 2023, Mach Industries is a rapidly growing defense technology company focused on developing next-generation autonomous defense platforms. At the core of our mission is the commitment to delivering scalable, decentralized defense systems that enhance the strategic capabilities of the United States and its allies. With a workforce of approximately 350 employees, we operate with startup agility and ambition. Our vision is to redefine the future of warfare through cutting-edge manufacturing, innovation at speed, and unwavering focus on national security. We are dedicated to solving the next generation of warfare with lethal systems that deter kinetic conflict and protect global security. The Role As Lead Manufacturing Engineer, Tooling Design, you'll be Mach's go-to expert on two things: how we design tooling, and how parts are designed so automation can handle, locate and assemble them. You'll push the field forward through research and development (R&D) on new materials, hardware and processes. You'll design experiments, build test articles, partner with suppliers and move what works into production. This is a hands-on technical leadership role with direct reports. Key Responsibilities Own the Tooling and Design-for-Automation guide Write, publish and maintain Mach's Tooling and Design-for-Automation guide. It should cover: design rules, with the reasoning and test data behind them preferred tooling components, materials and automation approaches standard locating features and tolerances worked examples and review checklists Write tooling standards: datum and locating strategy, modular fixture components, clamping, materials and documentation. Write design-for-automation rules for parts: gripping and locating features, part presentation and feeder compatibility, robot and tool access Set metrology and tooling verification standards (laser tracker, CMM, vision), and oversee checking fixtures and gauges. Define the DFMA sign-off crit

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities Own package architecture and execution from feasibility through tape-out, qualification, and production readiness, ensuring design intent is translated into manufacturable, reliable, and scalable solutions. Serve as the technical authority for complex package issues, leading cross-functional reviews, trade-off decisions, and risk closure across product, silicon, technology, assembly, quality, supplier, and OSAT teams. Balance performance, reliability, manufacturability, cost, quality, and schedule to deliver production-ready solutions while mentoring engineers through difficult technical decisions. Advance design rules, methodologies, automation workflows, and technology roadmaps for future products. Represent the packaging team in Silicon–package–board co-design by integrating floorplan, interface, interconnect, power, signal, thermal, and mechanical requirements, and resolve cost and manufacturing trade-offs to achieve a balanced package solution. Ability to apply baseline digital fluency and role-approp

Build the infrastructure that keeps every NVIDIA chip aligned from first spec to final shipment. NVIDIA's Silicon Co-Design Group sits at the convergence of architecture, silicon, systems, and manufacturing. The System–Manufacturing Architecture (SMAC) team coordinates between system specifications and manufacturing test specifications from pre-silicon POR through production release across GPU, SoC, and CPU programs. When that alignment drifts, silicon faces the consequences: escapes, yield loss, and performance loss. We're hiring a Senior Manufacturing & System Co-Design Workflow Engineer to lead the methodology and infrastructure that maintains holistic, systematic alignment, at scale across the full portfolio. The strongest candidates in this role design the workflow before being asked to fix a program, and build the checks and automation that confirm alignment holds long after they've moved on to the next problem. What you’ll be doing: SMAC Workflow Methodology: Define manufacturing spec types, including schema and semantics, derived from system PORs and features. Own the methodology that governs how specification work gets structured, versioned, and validated across the program lifecycle. Production Python Pipelines & Automated Checks: Develop production-grade Python pipelines and automated checks that catch specification drift between system POR and manufacturing test programs ,ATE, SLT, BLT, L10&#43;, before silicon exposes the discrepancy. The goal is that misalignments surface in the workflow, not on the tester. E2E Program Integration & TPM Attestation: Wire SMAC work into the end-to-end program spine, milestones, gates, and artifacts, and define explicit TPM-driven attestation when checks lag. Alignment can't be assumed; it must be proven at every stage. Agent-Ready Tooling & CI Infrastructure: Integrate tooling into an agent-ready