Dram Design Technology Layout Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsible for early validation of DRAM products with customers' newest technology. Involved in computer system-level failure analysis, characterization, and qualification of our products. Run and configure diagnostic software, craft experiments, analyze and interpret data, debug fails, develop custom tools, and communicate data to customers both inside and outside Micron. Work with other specialists within the Systems Compatibility Group as well as multi-functional teams including Application Engineering Groups, Product Engineering, Return Material Authorization (RMA), and throughout Micron. Lead Micron Product Qualifications with Internal and External customers. Build and develop validation strategies for new or existing technologies, which may include developing system test methodologies and system diagnostic tools. Design and implement automation for System Level testing. Define and execute system test methodologies. Employer will accept a Master’s degree in Electrical Engineering, Computer Engineering or related field. Position requires: 1. Utilizing Knowledge of computer architecture to perform system-level memory validation, system characterization and failure analysis, and developing system diagnostic tools. 2. Utilizing Python to evaluate and develop diagnostic software, system debug and test methodologies. 3. Designing experiments, analyzing and interpreting data, crafting custom tools and communicating data to customers. 4. Building and developing validation strategies for new technology inc

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Unique Opportunities Complete ownership of verification and end to end analysis of sophisticated full chip gate level custom designs with advanced low power and power management technologies spread across multiple categories such as DDR5,LPDDR5,DDR6 and LPDDR6 that can operate at high speeds of up to 9600MT/s. Collaborate closely with design and verification team members spread across the globe, many of whom have decades of experience in memory design. Work on multi-functional tasks that can widen your skills. Responsibilities: Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes. Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Participate in developing verification methodology and verification environments for sophisticated products. Co-work with international colleagues on developing new verification flows to take on the challenges in design. Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Ability to identify verification pain poin

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Understand the LPDRAM state machine and develop the hardware models for DRAM features and the related validation test bench. Develop memory controller models, including request scheduling and address mapping to enable new DRAM features. Develop the automation test scripts using Python to improve the overall simulation methodologies. Develop new DRAM technology changes per the spec and the state machine and the validation test bench. Develop system engineering, software engineering, system integration, or distributed system architectures. Identify system data, hardware, or software components required to meet user needs. Communicate with staff or clients to understand specific system requirements. Research, test, or verify proper functioning of software patches and fixes. Provide advice on project costs, design concepts, or design changes. Communicate project information through presentations, technical reports, or white papers. Design and conduct hardware or software tests. Establish functional or system standards to address operational requirements, quality requirements, and design constraints. Evaluate existing systems to determine effectiveness, and suggest changes to meet organizational requirements. Employer will accept a Master's degree in Electronics Engineering, Electrical Engineering, Computer Engineering, Computer Science, or related field. Position requires: 1. C/C++ or Python; 2. Debugging interfaces, including GDB and PDB; 3. LPDRAM technology; 4. Computer Architecture; 5. Memory controller

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. In the Technology Development — Advanced Modeling & AI Solutions (AMAIS) organization, you will be part of a multidisciplinary team developing next-generation Digital Twins, predictive modeling solutions, and AI-driven technologies that accelerate advanced memory development and manufacturing excellence. You will create predictive digital representations of semiconductor processes, materials, structures, equipment, and products across DRAM, NAND, and advanced packaging technologies including HBM. Leveraging physics-based modeling, computational methods, machine learning, GenAI, large language models (LLMs), and agentic AI frameworks, you will enable technology co-optimization, design-space exploration, process optimization, yield improvement, and accelerated technology learning. Working at the intersection of engineering fundamentals, manufacturing data, and digital engineering, you will develop scalable predictive and prescriptive solutions that connect process, structure, performance, yield, reliability, and cost. This role offers the opportunity to influence critical technology decisions, drive fab-technology co-optimization , and advance Micron's leadership in data-driven semiconductor memory innovation. Qualifications: Independence – be comfortable executing activities and needs Experience in algorithm development, numerical methods, and scientific computing Solid experience with Plasma, FPM, HAR etching, and MC modeling Experience with Wet Pr

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever ! The Heterogeneous Integration Group (HIG) is a division within the Technology and Products Group (TPG). We are dedicated to developing and optimizing High Bandwidth Memory (HBM) solutions for AI and ML applications. Using Through Silicon Via (TSV) technology, we stack multiple DRAM chips with a high-speed interface die, significantly increasing memory density and bandwidth for next-generation AI/ML accelerators and high-performance computing platforms. Our designs target the industry's lowest power-per-bit and highest bandwidth, enabling the most demanding compute workloads. We are seeking a SI/PI Engineer in HBM Build Architecture to develop high-quality SI/PI analysis for interposers, packages, and silicon channels. This work contributes directly to HBM build sign-off and product success. You will be involved in complex, multi-disciplinary SI/PI initiatives spanning multiple HBM product generations — from early interposer channel analysis and equalization co-design, PDN architecture, and system PI analysis. You will ensure Micron's HBM SI/PI architecture remains the industry benchmark for signal quality, power delivery integrity, and interface reliability. This role supports the design and deployment of AI-enabled solutions that improv

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We define ESD and latch-up architecture for next-generation HBM products across advanced nodes and 3D integration. Our team works across device, circuit, and packaging domains to solve reliability challenges that directly impact product quality. We take on complex problems and turn them into scalable solutions that enable high-performance memory! As an SMTS/DMTS HBM ESD/Latch-Up Architect, you will define protection strategies across base die, DRAM stacks, and interconnects. This role shapes product reliability from early architecture through silicon validation. You will work across teams and influence technical direction while solving system-level ESD challenges. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities: Define end-to-end ESD and latch-up architecture across base die, DRAM die, and interconnects Develop protection strategies for high-speed I/O, TSV interfaces, and advanced packaging Establish ESD/LUP standards, rule decks, and signoff criteria Drive correlation between d

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Frontend Central Product Integration Engineering (PIE) team delivers best‑in‑class yield, quality, and cycle time through innovation and strong cross‑functional teamwork. Supporting diverse DRAM and NAND technologies across global development and manufacturing sites (Boise, Japan, and fabs in the U.S., Taiwan, Japan, and Singapore), the team identifies, aligns, and deploys best‑known methods across the network. As a Frontend Central Process Integration Senior Engineer, you will develop and optimize processes to drive rapid product maturity. Join us today and make a difference! Responsibilities and Tasks Drive rapid product maturity, improving yield (bits per wafer), repair density, and DPM through fast learning cycles. Apply deep process integration knowledge across FEOL, MOL, CELL, and BEOL to identify optimal solutions; design and circuit knowledge is a plus. Partner with Yield Engineering, Device, RDA, and Metrology teams to resolve key yield issues and build strong inline visibility for fast ramp and excursion prevention. Identify and standardize best‑known methods and business processes across DRAM and NAND sites. Travel to Micron sites as needed for onsite collaboration. Minimum Qualifications Bachelor’s degree in Engineering or a related field 5+ years of experience in process integration, product design, or equivalent technical roles Demonstrated ability to collaborate optimally with global, cross‑functional teams Proven t

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Frontend Central Product Integration Engineering (PIE) team drives leading-edge process capability, best-in-class yield (bits per wafer), high product quality, and rapid time to maturity through innovation and strong cross-functional collaboration. Supporting a global DRAM and NAND technology portfolio across development and manufacturing sites in the U.S., Japan, Taiwan, and Singapore, the team ensures consistent execution of manufacturing excellence worldwide! As a Frontend Central Process Integration Senior Engineer, you will identify, align, and deploy best-known methods across the global network and develop optimized processes to achieve product maturity and sustainable performance improvement. Responsibilities and Tasks: Drive best-in-class product maturity which includes bits per wafers (yield), product grades (Repair Density and DPM) at the fastest speed and cycle of learning. In depth knowledge of processes across different loops or functions (FEOL, MOL, CELL, BEOL) to identify best optimum process integration solution to achieve the goal, knowledge on product and circuit design will be plus. Collaborate with YE, Device, RDA, Metrology team to resolve top yield issues, develop inline transparency to enable fast yield ramp and minimize excursion. Identify best known method and business process from DRAM/NAND sites and drive for alignment and standardize across network. Travel to Micron sites as necessary for face to face collaboration. </li

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities and Tasks: Drive best-in-class product maturity which includes bits per wafers (yield), product grades (Repair Density and DPM) at the fastest speed and cycle of learning. In depth knowledge of processes across different loops or functions (FEOL, MOL, CELL, BEOL) to identify best optimum process integration solution to achieve the goal, knowledge on product and circuit design will be plus. Collaborate with YE, Device, RDA, Metrology team to resolve top yield issues, develop inline visibility to enable fast yield ramp and minimize excursion. Identify best known method and business process from DRAM/NAND sites and drive for alignment and standardize across network. Travel to Micron sites as necessary for face to face collaboration. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations tha

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Working place : Hiroshima Manufacturing site (Fab15) 勤務地&#xff1a;広島製造拠点(Fab15) As a Process Integration Engineer at Micron Fab15, you will help ensure process stability and drive yield/quality improvements by leveraging standard procedures, data analysis, and cross-functional collaboration. You will support early detection, root-cause isolation, and corrective/preventive actions for process deviations in a high-volume manufacturing environment. 職務概要 Micron Fab15 プロセスインテグレーションエンジニアとして、標準手順データ分析、ならびに部門横断的な協業を活用し、プロセス安定性を確保するとともに、歩留まりおよび品質改善を推進します。 Job role more in detail, Optimizing Device performance to improve not only yield but also repair density consumption. Need to think about appropriately HVM DRAM process condition especially focusing on Device process condition. Need to collaborate with other PI module teams and Each Area teams and also discuss with PE/GQ/ Design and TD device teams to take balance for deciding HVM device process condition Need to collaborate with other site OMT, ID1 and TD. By utilizing AI, summarize evaluation data and suggest new idea for device performance improvement and yield. 職務内容詳細 歩留まり改善を行うだけでなく、Repair Density消費の最適化を含めたデバイス性能の最適化を行う。 特にデバイスプロセス条件に注目し、HVM DRAM プロセス条件を適切に検討する。 他のPI moduleチームおよび、各エリアチームと連携し、さらにPE/GQ/Design /TDデバイスチームと議論しながら、HVMデバイスプロセス条件のバランスを取った意思決定を行う。 他サイトのOMT,ID1,TDチームとも連携する。 AIを活用し、評価データのまとめ、さらには、deviceのper

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Working place : Hiroshima Manufacturing site (Fab15) 勤務地&#xff1a;広島製造拠点(Fab15) As a Process Integration Engineer at Micron Fab15, you will help ensure process stability and drive yield/quality improvements by leveraging standard procedures, data analysis, and cross-functional collaboration. You will support early detection, root-cause isolation, and corrective/preventive actions for process deviations in a high-volume manufacturing environment. 職務概要 Micron Fab15 プロセスインテグレーションエンジニアとして、標準手順データ分析、ならびに部門横断的な協業を活用し、プロセス安定性を確保するとともに、歩留まりおよび品質改善を推進します。 Job role more in detail, Optimizing Device performance to improve not only yield but also repair density consumption. Need to think about appropriately HVM DRAM process condition especially focusing on Device process condition. Need to collaborate with other PI module teams and Each Area teams and also discuss with PE/GQ/ Design and TD device teams to take balance for deciding HVM device process condition Need to collaborate with other site OMT, ID1 and TD. 職務内容詳細 歩留まり改善を行うだけでなく、Repair Density消費の最適化を含めたデバイス性能の最適化を行う。 特にデバイスプロセス条件に注目し、HVM DRAM プロセス条件を適切に検討する。 他のPI moduleチームおよび、各エリアチームと連携し、さらにPE/GQ/Design /TDデバイスチームと議論しながら、HVMデバイスプロセス条件のバランスを取った意思決定を行う。 他サイトのOMT,ID1,TDチームとも連携する。 Job responsibilities Take responsibility for creating SWR for device performance improvement proactively. Take responsib

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Frontend Central Product Integration Engineering team strives to deliver leading edge process capability, best-in-class bits per wafer (Yield) with highest quality and fastest speed through innovation and collaboration with cross functional team. With the diversity of technology in DRAM/NAND and geography (TD development sites – Boise/Japan, 5 manufacturing sites – US (F6, ID1), Taiwan (OMT), Japan (F15) and Singapore (F10)), Frontend Central PIE team will be responsible to identify best-known-method holistically, align best-known-method timely and implement improvement systematically across the network. As FE Central Process Integration Senior Engineer, you will be responsible to develop best optimum process to achieve product maturity. Responsibilities and Tasks: Drive best-in-class product maturity which includes bits per wafers (yield), product grades (Repair Density and DPM) at the fastest speed and cycle of learning. In depth knowledge of processes across different loops or functions (FEOL, MOL, CELL, BEOL) to identify best optimum process integration solution to achieve the goal, knowledge on product and circuit design will be plus. Collaborate with YE, Device, RDA, Metrology team to resolve top yield issues, develop inline visibility to e

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a key technical contributor within the High Bandwidth Memory (HBM) Product Engineering – Media Health team, you will play a critical role in driving Media Health manufacturing execution for Micron’s latest next‑generation HBM products, including DRAM die, interface die, and stacked HBM solutions. You will be responsible for Best‑in‑Class HBM product enablement, with direct technical ownership across the core manufacturing KPIs of Quality, Cost, Cycle Time, and Scale. Your contributions will include manufacturing test flow development and validation, device‑ and stack‑level yield improvement, and delivery of optimized extrinsic and intrinsic reliability through deep circuit debug, test coverage optimization, and innovative test strategies. In this role, you will drive manufacturing test time reduction, enhance overall manufacturing efficiency, and contribute to Design‑For‑Test (DFT) strategy development, introducing new ideas that improve cost competitiveness, cycle time, and product quality. You will work closely with cross‑functional partners—including Fab, Product Leads, Design Engineering, Technology Development, and Test Solutions Engineering—to execute both strategic initiatives and tactical deliverables, ensuring continued technology and product leadership. The future of HBM is fast‑moving and

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a key leader within High Bandwidth Memory (HBM) Product Engineering Media Health team, you will spearhead and develop a high performing team driving Media Health Manufacturing and activities for Micron’s latest HBM products, both on DRAM and Interface die and a stacked product. You will lead a portfolio of Best-In-Class Next Generation HBM Product focused on the critical KPI’s Quality, Cost, Cycle Time and Scale. This include lead the manufacturing test flow development and validation, improve the device/stacked yield with most optimized extrinsic and intrinsic reliability through in depth circuit debug, test coverage optimization and strategy innovation, test time improvement for manufacturing flow and drive the DFT (design for test) strategy to stage new ideas to improve cost, cycle time and quality. You will also collaborate with cross functional team (Fab, Product Leads, Design, Technology Development, Design, Test Solution Engineering etc) with diverse expertise to achieve both strategic and tactical objectives and stay ahead on technology and product leadership. The future of HBM are exciting and dynamics. Micron is seeking experienced individuals that find technical challenges engaging and invigorating. Responsibilities: Optimized Test Coverage: The resp

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a key leader within High Bandwidth Memory (HBM) Product Engineering Media Health team, you will spearhead and develop a high performing team driving Media Health Manufacturing and activities for Micron’s latest HBM products, both on DRAM and Interface die and a stacked product. You will lead a portfolio of Best-In-Class Next Generation HBM Product focused on the critical KPI’s Quality, Cost, Cycle Time and Scale. This include lead the manufacturing test flow development and validation, improve the device/stacked yield with most optimized extrinsic and intrinsic reliability through in depth circuit debug, test coverage optimization and strategy innovation, test time improvement for manufacturing flow and drive the DFT (design for test) strategy to stage new ideas to improve cost, cycle time and quality. You will also collaborate with cross functional team (Fab, Product Leads, Design, Technology Development, Design, Test Solution Engineering etc) with diverse expertise to achieve both strategic and tactical objectives and stay ahead on technology and product leadership. The future of HBM are exciting and dynamics. Micron is seeking experienced individuals that find technical challenges engaging and invigorating. Responsibilities: Optimized Test