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Engineer Hbm Layout Jobs

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Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Key Responsibilities Validation Execution Lead end‑to‑end Validation Run execution in a high‑pressure, fast‑paced environment , ensuring on‑schedule starts/completions , risk‑aware re‑plans , and efficient IQP/ETV material usage . Own time‑bound data crunching pipelines (automated log parsing, metrics aggregation, anomaly ranking) and deliver decision‑ready summary reports and sightings by agreed Cycle Time . Guarantee coverage completeness across MBIST and Native flows; drive Hot/Cold corners , TSV screen/AQLK , async timing boundary coverage, and evidence‑backed closure . Platform Leadership Develop and debug test programs on SM3/Cobra and Advantest V93K ; enforce code quality, reviews, and release discipline. Align hardware configs ( handler, socket, loadboard, probe card ) to test intent and throughput targets. Advanced Analysis, Verilog Simulation & Automation Perform power/thermal characterization ; correlate IDD/thermal data with performance/reliability; author recommendations for content changes and silicon fixes. Architect and execute

pythongitlinux
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Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a key technical contributor within the High Bandwidth Memory (HBM) Product Engineering – Media Health team, you will play a critical role in driving Media Health manufacturing execution for Micron’s latest next‑generation HBM products, including DRAM die, interface die, and stacked HBM solutions. You will be responsible for Best‑in‑Class HBM product enablement, with direct technical ownership across the core manufacturing KPIs of Quality, Cost, Cycle Time, and Scale. Your contributions will include manufacturing test flow development and validation, device‑ and stack‑level yield improvement, and delivery of optimized extrinsic and intrinsic reliability through deep circuit debug, test coverage optimization, and innovative test strategies. In this role, you will drive manufacturing test time reduction, enhance overall manufacturing efficiency, and contribute to Design‑For‑Test (DFT) strategy development, introducing new ideas that improve cost competitiveness, cycle time, and product quality. You will work closely with cross‑functional partners—including Fab, Product Leads, Design Engineering, Technology Development, and Test Solutions Engineering—to execute both strategic initiatives and tactical deliverables, ensuring continued technology and product leadership. The future of HBM is fast‑moving and

pythonartificial intelligenceai
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. This role is part of the Customer Engineering Technical Leadership function within HIG PSE. The Customer Integration Engineer will focus on technical engagement across product development, system architecture, develop, front-end and back-end process, Package Failure Analysis, Qualification, and Test. The successful candidate will have expertise in one of these subject areas and a strong appetite to learn others on the job. This position emphasizes hands-on technical problem-solving, working with multi-functional groups, and enabling successful integration of advanced HBM products into customer systems. Responsibilities: Apply deep technical knowledge across one or several domains such as product engineering, system engineering, building, front-end/back-end process, PFA, qualification, or test. Support integration of customer requirements into internal design and manufacturing processes. Participate in technical reviews, debug sessions, and failure analysis activities. Work closely with internal teams across build, product engineering, and manufacturing to resolve technical challenges. Assist in yield improvement and qualification efforts tied to customer programs. Minimum Qualifications: Bachelor’s or Master’s degree or equivalent experience in Electrical Engineering, Mechanical Engineering, Materials Science, or related technical field. Hands-on experience in one or more areas: product development, sys

airecruitment
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) within Micron's Technology and Products Group (TPG) leads the development of High Bandwidth Memory (HBM) solutions for AI and ML applications. Our modern designs use Through Silicon Via (TSV) technology. We stack multiple DRAM chips on a high-speed memory controller with a coordinated logic chip in one package. This new way improves memory density and bandwidth through parallelization. It aims to deliver the lowest power per bit solutions in the industry. As a Static Timing Analysis (STA) Engineer — you will be part of the Heterogeneous Integration Group (HIG), owning chip-level timing sign-off for next-generation die. You will work closely with RTL design, physical design, architecture, DFT, verification, and product teams to ensure timing integrity and drive timing closure across all modes and corners from initial design through tape-out. This is a hands-on senior technical role focused on chip-level STA ownership, constraint authoring, timing closure, methodology development, and pre-/post-silicon timing correlation. Key Responsibilities Responsibilities will include, but are not limited to: Own end-to-end chip-level static timing analysis and sign-off across all checks, modes, corners, and voltage and temperature conditions. Develop, maintain, and validate sign-off quality Synopsys Design Constraints (SDC) for clocks, resets, high-bandwidth memory (HBM) interfaces, design for test (DFT), and configuration logic. Drive timing closure at block, sub

pythonairecruitment
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron Technology, Inc., you will join a team responsible for bringing next-generation High Bandwidth Memory (HBM) products from design through high-volume manufacturing. This role plays a critical part in improving product reliability, accelerating production ramp, and enabling early time-to-market through advanced failure analysis. You will focus on analyzing failures from production test, internal qualification, and customer returns (RMA), using a combination of electrical, physical, and data-driven techniques to identify root causes related to fabrication or assembly processes. Key Responsibilities Perform electrical failure analysis and fault isolation using techniques such as emission microscopy, laser-based methods, and EOTPR. Analyze and model failure signatures from backend testing, qualification, and RMA data. Apply physical failure analysis (PFA) and de-processing techniques to isolate defects. Develop and maintain deep technical knowledge of CMOS/FinFET fabrication processes, device structures, and process integration. Generate clear, organized, and timely failure analysis reports, including root cause and corrective action insights. Collaborate multi-functionally with Product, Process, Assembly, Quality, and Management teams to communicate findings and drive resolution. Apply AI-assisted tools and workflows to analyze large datasets, identify failure patterns, and accelerate root-cause determination. Support flexible work sch

linuxairecruitment
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