Engineer Hbm Layout Jobs

Senior/Staff Engineer, Product Engineering, Media Health Manufacturing, HIG-HBM — Fab 10A, Singapore. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Principal/Snr/Product Engineer (Advance Data Analytics), Heterogeneous Integration Group (HIG), High Bandwidth Memory (HBM) Product Engineering Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a key team member within the HIG HBM Product Engineering Advanced Data Analytics team, you will be spearhead and develop a high-performing team to drive initiatives that significantly enhance yield and quality through advanced data analysis, machine learning, and AI. Your responsibilities will include developing cutting-edge algorithms, creating robust product disposition solutions, and establishing a proactive deviation alert system for yield and quality, enhancing data infrastructure, mentor team members, and fostering innovation to maintain a competitive edge. You will also collaborate with cross-functional teams within and outside of HBM to achieve both strategic and tactical objectives, continually maximizing the effectiveness of the HIG HBM PE organization, focusing on critical KPIs such as quality, cos

Senior Product Engineer (Pkg PE MFG), Heterogeneous Integration Group(HIG), High Bandwidth Memory (HBM) Product Engineering — Fab 10A, Singapore. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a PDE MRDA KEG Engineer / Senior Engineer , you will be responsible for developing, qualifying, deploying, and sustaining advanced defect inspection and metrology solutions that support New Product Introduction (NPI), HBM technology ramps, and High Volume Manufacturing (HVM). You will drive inspection capability readiness, equipment performance improvement, and defectivity reduction through close collaboration with cross functional team. The role requires strong expertise in semiconductor manufacturing, defect inspection technologies, data analytics, equipment qualification, and cross-functional problem solving to enable industry-leading process control and yield performance. Inspection Technology & Equipment Ownership Manage advanced inspection and metrology platforms throughout package development and manufacturing. Develop technology roadmaps and capability strategies to meet future packaging requirements. Drive equipment lifecycle management, capacity planning, and technology insertion activities. Equipment Qualification & Deployment Lead tool installation, qualification (TIQ), release, and production readiness activities. Establish equipment acceptance criteria, qualification methodologies, and deployment pla

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a key talent within High Bandwidth Memory (HBM) Product & System Engineering Media Health team, you will work together with a high performing team driving both intrinsic and extrinsic reliability test development and execution for Micron’s latest HBM products, both on DRAM and Interface die and a stacked product. Your responsibility is to drive extrinsic DPM reduction (Time 0 and Field DPM) and lead the intrinsic reliability charter, along with optimized Manufacturing Test Flow to meet critical KPI’s Quality, Cost and Cycle Time. You will work within the team to characterize the products from reliability aspect, identify the reliability gaps, working on root cause and resolution of qual and RMA failures pertaining to defectivity and intrinsic reliability margin and drive fab process improvement driven by the qual failures. Additionally, your team will also be the key person in frontend process conversion, where you will work with Fab, TD, GQ teams to establish robust business process for process conversions to facilitate yield improvements, DPM and Cost Reduction. You will collaborate across functions within and outside of HBM to meet both strategic and tactical objectives while continually maximizing the effectiveness of the HIG HBM PE organization. The future of HBM are exciting and dynamics.

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As an PDE Yield Enhancement (YE) Engineer within Package Development Engineering (PDE), you will be responsible for yield monitoring, excursion management, and yield stabilization during High Bandwidth Memory (HBM) New Product Introduction (NPI) . This role is critical to ensuring robust yield performance from first silicon through NPI ramp and early HVM , working closely with Process Integration (PI), MRDA, Process Engineering (PE), Assembly/Test Manufacturing, and Quality teams. You will act as a hands‑on yield owner during NPI builds, driving fast learning cycles, early risk detection, and disciplined yield recovery. Job Responsibilities: Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness,exercising sound judgment and complying with organizational standards and legal requirements. Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work. Yield Loss Accounted For Account for HBM NPI builds across Post Wafer Finishing (PWF), Assembly, and

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. The PDE Process Integration (PI) Engineer is responsible for driving process integration excellence for High Bandwidth (HBM) products during New Product Introduction (NPI) . This role ensures robust process readiness, yield ramp, and cross‑module integration across Post Wafer Finishing PWF, assembly, and test , enabling successful execution of HBM technology roadmaps. The PI Engineer works cross‑functionally with Fab, Assembly, Test, Yield, Quality, and central engineering teams to identify risks early, resolve complex integration issues, and deliver NPI milestones on time. Job Responsibilities Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements. Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work. NPI Execution & Support Execute assigned HBM NPI PI tasks following defined procedures and phase‑gate requirements Support NPI builds through lot tracking, data collection, and

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The High-Performance Integrated Group (HIG) is a division within the Technology and Products Group (TPG). We are dedicated to developing and optimizing High Bandwidth Memory (HBM) solutions for AI and ML applications! Our ultimate goal is to deliver the lowest power per bit solutions in the industry! Position Overview: We are searching for an HBM IO Design Architecture Engineer. This role will focus on HBM IO / TSV IO design and analysis including electrical modeling, Signal Integrity (SI) and Power Integrity (PI) analysis, and design optimization across the HBM development cycle. The ideal candidate brings hands-on experience in design execution, simulation to silicon correlation, and cross-functional methodology development, and embraces AI-driven analysis and data-driven decision making to accelerate quality improvement cycles. Responsibilities will include, but are not limited to: High-speed IO design architecture for HBM products Define and standardize IO design quality process from architecture to silicon Define IO architecture, TSV IO performance targets, and design quality requirements for future HBM products. Develop IO and TSV modeling methodologies to support architecture tradeoff analysis, SI/PI evaluation, and design optimization. Drive simulation-to-silicon correlation and post-silicon learning feedback to improve design quality across HBM product generations. Leverage AI Assisted analytics to accelerate root cause identification from comp

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Overview At Micron, we are committed to world-class performance and innovation. As a SR ENGINEER, MTB QE OPS, you will be essential in creating the initial quality defense for incoming materials. You will also drive quality management and support our ambitious projects. This is an outstanding chance to lead technological progress in the semiconductor industry! Key Responsibilities Set up the initial quality safeguard for incoming materials, including PSMC/TSMC wafers and UMC interposers. Lead excursion identification, containment, resolution, and supplier quality oversight to reduce yield, reliability, production, and customer risks. Assist HBM ramp, HBM4e, and IQP builds through active incoming quality assessment and supplier quality development. Work Schedule Regular day shift, Monday to Friday, 08:00 AM–05:00 PM. Candidate Qualifications At least 1 year of Semiconductor / Quality experience. Expertise in Incoming Material Quality, Supplier Quality, Excursion Management, and HBM/Wafer/Interposer quality governance. AI-Related Information Develop Generative AI and Agentic AI solutions for Quality operations. Build AI Assistants, knowledge management, intelligent search, and chatbot platforms. Leverage LLMs to improve engineering efficiency and decision-making. Integrate manufacturing, quality, and engineering data to enable intelligent analytics, Quality Digitalization, and

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to ESD Architecture Leadership & Strategy Define and own ESD architecture and protection strategy for high-speed I/O portfolios including: HBM (High Bandwidth Memory) / DDR / LPDDR PHY I/Os PCIe, USB, Ethernet, MIPI, and proprietary interfaces Lead ESD–I/O co‑design trade‑off decisions, balancing: Aggressive ESD targets (HBM / CDM / MM).Ultra‑low capacitance and leakage requirements Eye margin , jitter , bandwidth , return loss, and impedance matching Drive architectural choices for: Snapback clamps, rail clamps, diode steering networks. Triggered and advanced ESD devices (technology‑dependent). Domain isolation and sequencing protection for sophisticated SoCs Advanced Circuit Design, Modeling & Signoff : Perform and guide ESD circuit design and analysis at block and full‑chip level. Establish simulation methodologies for: Transient ESD stress (TLP‑equivalent behavior). Dynamic clamp triggering and current handling. I/O performance impact (cap loading, ringing, overshoot/undershoot. Own ESD modeling correlation: Work with device/modeling teams on compact models (dynamic R, triggering, CV behavior). Drive correlation between SPICE simulations, TLP/VF‑TLP, and silicon results. Act as the final technical authority for ESD Design reviews and signoff. Silicon Debug, Reliability & Qualification Ownership : Lead silicon-l

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities: Reliability Test Flow Development: Define and develop reliability stress, test flows and test plans to cover all Product Reliability aspects. Reliability Test Plan and Execution: Work closely with Global Quality team to define qualification plan, review and manage the qualification execution progress, and drive for qualification gating issue resolution. DPM reduction : Drive down and achieving Extrinsic Reliability (Time 0 and Field DPM) and Intrinsic Reliability through Optimized Manufacturing Test Flows and Test Strategy to meet critical KPI’s Quality, Cost and Cycle Time Root Cause and Resolution of Qual and RMA Device Issues pertaining to defectivity and intrinsic reliability: Debug and identify root cause and failures in reliability tests by electric failure analysis(EFA) and Physical Failure Analysis (PFA) and drive for resolution and improvements through cross functional team collaboration. Process Conversions and HVM: The role involves providing recommendation to fab teams for new process conversions to reduce cost, increase yields. This is critical as it directly impacts the yield, quality, reliability, and performance of HBM products, which are key components in

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Engineer at Micron’s HBM New Product Validation team in Boise, ID you will be a senior technical guide responsible for validation strategy and readiness for future-generation High Bandwidth Memory (HBM) products. You will apply deep expertise in complex RAM and high-bandwidth memory architecture and building to establish architecture validation strategies. You will impact decisions that improve validation observability and debug efficiency . You will lead investigations of complex architecture, building , and silicon issues from pre-silicon simulation through post-silicon characterization. You will partner across Design Engineering, Design Validation, Product Engineering, Systems teams, and will develop and promote AI-enabled validation methodologies that improve efficiency, quality, and scalability. Responsibilities: Define architecture-aware validation strategies and coverage direction for future-generation HBM products. Drive validation readiness for next-generation products by preparing strategies, test environments, and execution plans before first silicon, reducing risk, accelerating issue resolution, and preventing late-stage surprises. Evaluate new DRAM/HBM architectural features and define validation requirements and testability needs before DBR. <span style="color:#

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Staff Engineer in Micron’s HBM Product Engineering Component Validation team, you will be an individual contributor responsible for the validation of advanced High Bandwidth Memory (HBM) products. You will use proven knowledge in dynamic random-access memory and high-bandwidth memory architecture to compose validation coverage, implement and analyze validation runs, lead product debug and failure analysis toward a zero-escape validation goal across test modes and product achievements. You will also adopt AI-enabled ways of working, using enterprise AI tools to accelerate your engineering tasks and improve efficiency, work within Micron’s global validation organization and collaborate with groups at different locations. Responsibilities: Translate DRAM/HBM develop intent and architecture into effective verification scope and test cases. Contribute to validation of new and high-risk product features, working with Design Validation, and Systems Engineering. Review design specifications, schematics, and datasheets, provide design feedback and represent the Product Engineering perspective in Design and Verification reviews. Read, analyze, and debug circuit blueprints to detect design-related failure mechanisms, and recommend approaches for verification and fault diagnosis. Perform root-cause analysis and examination of electrical failures (debug) of validation findings, distinguishing developed marginality from process and test-related issues. Apply automation and modern tooling (including

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The High-Performance Integrated Group (HIG) is a division within the Technology and Products Group (TPG). We are dedicated to developing and optimizing High Bandwidth Memory (HBM) solutions for AI and ML applications! Our ultimate goal is to deliver the lowest power per bit solutions in the industry! Position Overview: We are searching for an HBM IO Design Architecture Engineer to build and own the end-to-end design quality system — including design checklist delivery, silicon data analysis, and cross-team data collection framework — ensuring that silicon learnings are systematically captured and fed back into the project before the next generation design is finalized. The ideal candidate brings hands-on experience in design execution, simulation to silicon correlation, and cross-functional methodology development, and embraces AI-driven analysis and data-driven decision making to accelerate quality improvement cycles. Responsibilities will include, but are not limited to: High-speed IO design architecture for HBM products Define and standardize IO design quality process from architecture to silicon Work with Product Engineering to correlate silicon measurements and simulation performance for circuit level design analysis Contribute to cross group communication to work towards standardization and group success Proactively solicit input from Standards, CAD, m

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Enable rapid learning and effective technology transfer across the organization through deep involvement in defect detection equipment applications and advanced data analysis. Analyze process challenges using defect data and equipment signals to identify root causes and improvement opportunities. Collaborate with cross-functional teams across process integration, process development, data science, and yield analysis to deliver solutions with global impact. Drive defect reduction and yield improvement efforts across multiple projects on Micron’s DRAM roadmap, including High Bandwidth Memory (HBM) and advanced DRAM technologies. Develop a comprehensive understanding of process flows, potential failure and defect modes through FMEA, and associated detection strategies for inline yield characterization. Define die loss paretos upon issue detection and partner with process and integration teams to design, execute, and analyze experiments and DOEs to resolve yield limitations. Monitor baseline inline yield health for owned process modules using SPC techniques to quickly identify excursions, process drift, and emerging risks. Protect line yield by proactively escalating issues and coordinating corrective actions. Apply advanced data science and data interpretation skills to analyze complex datasets, draw actionable conclusions, and communicate results effectively. Present findings and recommendations to internal teams and customers using analytical tools such as JMP and Python. Employer will accept a Master’s degree in Material Engineering, Chemical Engi