Package Assembler Jobs

Package Silicon Technology Node Development Director/DMTS — MSB, Singapore. Apply via Workday.

Package Health Analyst — Hyderabad - Phoenix Aquila, India. Apply via Workday.

Package Engineering (PEPkg) Engineer — Taichung - Fab 16, Taiwan. Apply via Workday.

Package Architect – Advanced Packaging & System Exploration — 2 Locations. Apply via Workday.

NVIDIA's GPUs and SOCs are the world leaders in power, performance and efficiency. We are continually innovating to deliver new and creative, unusual solutions to extraordinary problems in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Package Layout Engineer who is committed to making a difference in the world through their contributions! This position will collaborate with Technical Package Lead and different design teams in the design and development of sophisticated, detailed layout of IC substrates for NVIDIA products. In addition, work with design teams to plan schedules, resolve costs, manufacturing, and electrical design issues. What you'll be doing: As part of a Layout team, you will collaborate to implement high speed/density ASIC packages. Perform substrate breakout patterns for ASIC packages. Optimize package pinout incorporating system level trade-offs of pins assignment. Help perform package routing, placement, stack-up, reference plane and power distribution using Cadence APD or SiP tool suite. Propose layout design trade-offs to the Technical Package Lead for resolution and implementation. Conduct design feasibility studies to evaluate the Package design goals for size, cost, and system performance. Develop symbols and CAD library databases using Cadence APD design tools Develop methodologies to improve layout productivity What we need to see: Hold a B.S. Electrical Engineering or equivalent experience 5+ years experience in PCB Layout of graphics cards, motherboards, line cards or other related technology. Experience with HDI designs is a plus Proven experience in substrate layout of wire bond and flip chip packages, preferred Significant background with Cadence AP

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Staff Engineer in APTD Micron you will be responsible for leading and managing the activities and operation of Advanced Package Development by collaborating with internal and external stakeholders to build and execute technology development strategies aligned to organizational and business objectives by providing high performing and cost effective packaging solution on time with best predictable reliability performance. You will need to comprehend package technology development business process (MOR development) and TECHNODE business process for packaging technology and ensure all package development and product transfer work are carried out in accordance with these business processes. Other responsibilities include ensuring organizational compliance to company policies and regulations, as well as to departmental procedures, and providing organizational leadership for building and implementing department strategies, processes, and policy through active participation in functional teams and projects, as well as mentoring other functional leaders through collaboration and the development of sustainably successful solutions. Responsibilities and Duties include, but not limited to: Develop and Communicate Technology Development Strategy Develop and communicate Technology Development strategic objectives Understand the impact and implica

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. 1. Advanced Package/Product Integration Drive package product integration for next-generation advanced packaging technologies. Identify integration risks and implement corrective actions during development. Support design rule development and package architecture optimization. Hiring Need: Current workload exceeds available engineering bandwidth, increasing program delay and technical risk exposure. 2. Cross-Functional Technical Leadership Act as primary interface among product engineering, process engineering, manufacturing, suppliers, and customers. Drive alignment on technical decisions and risk mitigation plans. Lead failure analysis and corrective action activities. Hiring Need: Growing project complexity requires additional senior technical leadership to avoid bottlenecks and improve execution efficiency. 3. Customer Support and Technical Engagement Support customer technical reviews and package feasibility assessments. Provide technical recommendations for package implementation and risk reduction. Address customer escalations related to package performance and reliability. Hiring Need: Increased customer interaction volume requires dedicated engineering support to maintain responsiveness and customer satisfaction. 4. Reliability Improvement Drive root-cause investigations for package failures. Improve package yield, reliability, and manufacturing robustness. Develop long-term corrective and preventive actions. Hiring Nee

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Work on electrical and physical design of high-speed interfaces in packages. Work on electrical model extraction and validation of package interconnects with circuit design team and IP vendor to optimize silicon layout and package design. Electrical modeling, simulation and characterization of high-speed interfaces. Develop and execute test plans to validate package electrical models with measurements. Work with product engineering and system engineering for package correlation and validation in system environment. Driving innovation into the future Memory generations within a dynamic work environment. Translate engineering problems into scalable Artificial Intelligence and automation solutions Educational & Other Requirements: MTech in Electrical Engineering with strong emphasis in Electromagnetics, Microwave, Antenna Theory and RF Circuits. Required Familiarity with Ansys, Siemens or Cadence tools for frequency domain modeling, Frequency domain analysis and transient time domain analysis. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Work on electrical and physical design of high-speed interfaces in packages. Work on electrical model extraction and validation of package interconnects with circuit design team and IP vendor to optimize silicon layout and package design. Electrical modeling, simulation and characterization of high-speed interfaces. Develop and execute test plans to validate package electrical models with measurements. Work with product engineering and system engineering for package correlation and validation in system environment. Driving innovation into the future Memory generations within a dynamic work environment. Translate engineering problems into scalable Artificial Intelligence and automation solutions Educational & Other Requirements: MTech in Electrical Engineering with strong emphasis in Electromagnetics, Microwave, Antenna Theory and RF Circuits. Required Familiarity with Ansys, Siemens or Cadence tools for frequency domain modeling, Frequency domain analysis and transient time domain analysis. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are the team defining the future of packaging of complex memory systems! Our Package pathfinding and Architecture organization sits at the intersection of silicon, packaging, systems, and customer needs—turning complex scaling challenges into technologies that power next generation platforms, through cutting edge packaging technologies. If you enjoy working on problems with real industry impact, look no further! This is a technical pathfinding role driving forward-looking packaging technology for next generation memory systems from datacenter to edge-AI. You will leverage understanding of end to end memory system architectures, to guide long term package technology direction, and partner with customers, to build innovative ideas into scalable products. You will interface between package process technology, materials, electrical, thermo-mechanical and system performance areas to guide the package strategic roadmaps for Micron. Responsibilities: Define next‑generation package pathfinding and system architectures optimizing for speed performance, system bandwidth, power, capacity, thermal, mechanical and electrical performance. Lead cross‑stack co‑optimization across silicon, package, board, and system with package centric solutions approach Drive long‑term memory technology packaging strategy and influence industry standards Work closely with silicon, and system design teams and customers for next generation and long term disruptive solutions to boost speed performance for edge-AI and d

Senior Package Modeling Engineer — US, CA, Santa Clara. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Package Development & Engineering Support package feasibility studies, architecture evaluations, design optimization, and technical risk assessments. Apply mechanical, electrical, materials, thermal, and manufacturing fundamentals to package-engineering problems. Support development activities for memory and semiconductor package technologies from concept through qualification and manufacturing readiness. Analyze engineering data, identify risks, document findings, and recommend technically sound actions. Contribute to design-for-manufacturing, design-for-reliability, design quality, and first-pass qualification objectives . Design, CAD & EDA Create, review, or analyze package layouts, substrate structures, stack-ups, drawings, design inputs, and engineering deliverables. Use CAD/EDA tools

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Position Summary As an APTD MTS (Member of Technical Staff) based in Taiwan, you will lead and develop the IoT engineering team delivering Industrial IoT (IIoT) and machine vision solutions to support advanced packaging technology development and factory enablement. You will set technical direction and priorities, drive execution from proof-of-concept through deployment, and build scalable, secure solutions that improve quality, productivity, and early risk detection. You will partner cross-functionally to translate manufacturing needs into measurable signals, robust data pipelines, and actionable insights, while building a culture of safety, accountability, and continuous learning. Key Responsibilities Lead, coach, and develop the IoT engineering team; set clear expectations, provide regular feedback, and build growth plans aligned to APTD needs. Own team execution: define goals/KPIs, prioritize the IoT roadmap, assign ownership, and ensure high-quality, on-time delivery from concept to factory deployment. Drive end-to-end IIoT solution development: sensing strategy, edge compute, connectivity, data ingestion/storage, monitoring, and sustainment (including data quality and traceability). Drive machine vision solutions: guide hardware selection (cameras/optics/lighting), image acquisition strategy, algorithm approach, performance validation, and deployment readiness. Partner with process, equipment, automation, quality, and IT/data platform stakeholders to tra

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. Role Overview We are seeking an experienced ASIC Package Signal Integrity / Power Integrity Engineer to drive electrical architecture, modeling, optimization, and validation for the most advanced AI/HPC silicon and package design. This role focuses on high-speed SerDes and memory channel architecture, advanced 2.5D/3D package SI/PI, substrate to package co-design, power-delivery-network optimization, electromagnetic modeling, and simulation-to-measurement correlation. The ideal candidate has strong hands-on experience with high-speed channel and PDN analysis across ASIC packages, interposers, substrates, and power-delivery structures, and can translate simulation results into practical design requirements for interposers and package substrate design optimization. The engineer will work closely with ASIC, package, system, mechanical, thermal, power, and silicon validation teams from early architecture and feasibility studies through production bring-up. In this role you will Own SI/PI architecture and analysis for advanced AI ASIC packages from early feasibility studies through production. Develop and optimize high-speed electrical channels for 200G/400G SerDes, PCIe, HBM, DDR, and chiplet/die-to-die interfaces. Perform package, interposer and substrate modeling using 2D/3D electromagnetic solvers. Define and optimize package stack-ups, transmission-line structures, via transitions, breakout structures, return paths, ground shielding, bump maps, and ball maps based on SI/PI re

Director – Package Materials Integration, APTD — Boise, ID - Main Site. Apply via Workday.