Package Engineering Engineer Jobs

About the job Design the high-speed signal paths that let advanced AI compute systems perform at datacentre scale. As a Signal Integrity Engineer, you will shape the electrical performance of Graphcore hardware platforms. Your work will help 112Gbps and 224Gbps SERDES, DDR and processor interfaces operate within demanding system budgets. You will develop, extract and simulate PCB structures across production systems and test boards. You will define launches, via structures, transmission lines, stack-ups and low-loss materials for future designs. This role spans simulation, lab validation and practical design influence. You will work from concept through prototype bring-up, debug, validation and support for manufacture. The team and culture You will join the Hardware Engineering team, working closely with PCB, package substrate, system architecture and supplier teams. Work moves through simulation, design review, lab evidence and practical trade-offs. You will be expected to own signal integrity decisions across complex board and package interfaces. The team values careful analysis, pace and clear communication when problems need action. Decisions are made close to the engineering detail. You will challenge designs, guide constraints and help teams reach the best performance possible. What we’re looking for · Strong experience in high-speed digital circuit development, with deep signal and power integrity knowledge · Experience with high-frequency SERDES design and validation, including tens of GHz operation · Expertise using tools such as ANSYS SIWave, HFSS, Mentor HyperLynx or similar · Ability to design BGA and connector launches, via structures and transmission lines for GHz signals · Hands-on lab experience using VNAs, high-speed oscilloscopes and signal generators · Rigorous approach to design, debug and validation, with strong ownership and communication skills While we have outlined a set of requirements, we value transferable skills and diverse experiences.

About the job Shape the power delivery foundations behind advanced AI compute systems built for real-world reliability. As a Power Integrity Engineer, you will deliver robust power integrity solutions across Graphcore silicon and system designs. Your work will help advanced compute platforms operate reliably across complex packages, PCBs and hardware systems. You will develop and analyse power delivery networks across silicon, package and PCB designs. You will use simulation, measurement and lab correlation to turn power behaviour into clear design improvements. This role gives you ownership across the full system path. You will influence decoupling strategy, stack-up decisions, bring-up debug and best practice for future platforms. The team and culture You will join the Signal and Power Integrity team within Systems Engineering Hardware Motherboard. The team works across chip, package, board and system engineering to solve problems end to end. Work moves through modelling, simulation, validation and lab evidence. You will collaborate closely with hardware teams and third parties to improve power and signal performance. You will be trusted to guide technical decisions, review peer work and speak up when designs need challenge. Ownership sits close to the engineering detail. What we’re looking for · Strong understanding of power integrity principles, including PDN design and analysis · Proficiency with PI simulation tools such as PowerDC, PowerSI, HFSS/SiWave, Simplis, Spice, ADS or similar · Experience working across chip, package or board-level design · Ability to interpret simulation results and translate them into design improvements · Knowledge of electromagnetic simulation techniques and lab measurement using equipment such as VNAs and oscilloscopes · Strong analytical skills, clear communication and the ability to work cross-functionally While we have outlined a set of requirements, we value transferable skills and diverse experiences. If you meet most of our

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Intro: The Advanced Packaging Technology Development (APTD) organization develops next-generation packaging and integration technologies for future memory products. We bring together engineers and scientists to overcome complicated integration, performance, and manufacturability challenges. Working across technology development, device engineering, package design, product engineering, reliability, and manufacturing, we turn new concepts into manufacturable solutions for High Bandwidth Memory (HBM) and other advanced memory products. Position Overview: As a Process Integration Engineer within APTD, you will develop and integrate semiconductor process flows for next-generation memory and packaging technologies, with a focus on Wafer-Level Technology (WLT) and reconstructed substrates returning to wafer-form fab processing. You will lead technical projects, solve exciting integration problems, and work across engineering fields to balance performance, manufacturability, quality, reliability, cost, and schedule. This role is well suited for an engineer who enjoys hands-on problem solving, collaborative R&D, and using emerging tools such as AI to improve engineering workflows and decision-making. Responsibilities: Lead technical integration projects for new memory and advanced packaging technologies Design and complete experiments to assess process performance, variability, reliability, and yield Solve complex integration issues using data from

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The HBM Design Technology Package Co-Optimization (DTPCO) organization is seeking a Staff Engineer! Lead the design and development of test vehicles that enable technology learning and risk reduction for future HBM products! This role serves as a key technical contributor within DTPCO, partnering closely with Architecture, Design, Layout, Product Engineering, Reliability, and Advanced Packaging teams to translate emerging product requirements and technology challenges into actionable test vehicle solutions. You will apply expertise in semiconductor design, physical implementation, silicon characterization, and advanced packaging technologies to define test structures, develop validation strategies, and generate data that drives product decisions across future HBM generations. Unlike a traditional product role centered on ownership of product blocks, this position emphasizes enabling learning in development and engineering. It does so by developing representative test vehicles and characterization structures. Key Responsibilities Serve as a technical lead for HBM test vehicle design and structure development within DTPCO. Partner with HBM product, technology and reliability team. Define and implement test structures targeting key learning areas such as package interaction and reliability Drive test vehicle content definition, structure specifications, measurement requirements, and validation objectives. Analyze silicon characterization and qualification results to identify optimization opportunit

Linux Engineer A Career with point72’s Technology team As Point72 reimagines the future of investing, our Technology team is constantly evolving our firm’s IT infrastructure and engineering capabilities, positioning us at the forefront of a rapidly evolving technology landscape. We’re a team of experts who experiment and work to discover new ways to harness open-source solutions, modern cloud architectures, and sophisticated Artificial Intelligence (AI) solutions, while embracing enterprise agile methodologies. Our commitment to building and innovating in the AI space provides the framework intended to drive smarter decision making and enhance how we build and operate our platforms and applications. As a member of Point72’s Technology team, we encourage and support your professional development from day one—helping you advance your technical skills, contribute innovative ideas, and satisfy your own intellectual curiosity—all while delivering real business impact for our multi-billion-dollar global business. What you’ll do Support, maintain, and troubleshoot Linux systems in production and development environments Assist with system provisioning, configuration, and lifecycle management Monitor system performance, availability, and capacity; respond to incidents and outages Work closely with developers and quants to support research and trading workloads Automate operational tasks using scripting and configuration management tools Assist with patching, upgrades, and vulnerability remediation Maintain documentation and operational runbooks Participate in on-call rotation (as appropriate for level) What’s REQUIRED Bachelor’s degree in computer science, information technology, engineering, or a related field. 5+ years of professional experience administering Ubuntu Linux systems and ZFS Strong understanding of Linux fundamentals including processes, memory, CPU, filesystems, and networking as well as systemd, cron, logging, and package management (apt) Experie

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Staff DFT Design Engineer, you will work on design, simulation, and validation of next generation High Bandwidth Memory (HBM) architectures and circuit blocks. The HBM DFT Design Engineer is responsible for defining, designing, and integrating Design for Test (DFT) architectures for next generation High Bandwidth Memory (HBM) products. This role ensures robust test coverage across wafer, die, stack, and system in package (SiP) test stages while balancing performance, power, area, and manufacturing cost. The engineer works in a multi-functional manner with HBM build, verification, product engineering, test enablement, packaging, and external partners to deliver manufacturable, high quality HBM solutions. Responsibilities will include, but are not limited to: Define and implement HBM DFT architectures, including scan, MBIST, JTAG, boundary scan, TSV test, redundancy test, and at‑speed test structures. Develop DFT solutions for both base die and DRAM die, considering stacked‑die and cube‑level test requirements. Design and integrate test access mechanisms to support wafer probe, cube test, and SiP/system test flows. Collaborate with Product Engineering and Test Enablement teams to align DFT features with manufacturing test flows and cost targets. Support yield learning, failure analysis, and debug by enabling observability and controllability in silicon. Work closely with logic, analog, layout, verification, and physical design teams to ensure DFT is

What We’re Looking For: We’re looking for mechanical design engineers to contribute to, and own aspects of the wafer-scale assembly, including the interactions between the power delivery system, mechanical chassis, heatsink and more. Ideal Background: Track record of solving one or more challenging mechanical engineering problems where the solution was something different than “the usual solution to this type of problem, slightly tweaked” Experience with high power density compute trays, chassis and/or racks. Experience working with multi-material assemblies with mismatched CTEs Nice to Have: Experience with solder joint reliability Experience with large physical size IC packages and assemblies Experience with CoWoS package assemblies Experience with optical system assemblies Experience with mechanical aspects of liquid cooled assemblies

About the job Design the high-speed signal paths that let advanced AI compute systems perform at datacentre scale. As a Signal Integrity Engineer, you will shape the electrical performance of Graphcore hardware platforms. Your work will help 112Gbps and 224Gbps SERDES, DDR and processor interfaces operate within demanding system budgets. You will develop, extract and simulate PCB structures across production systems and test boards. You will define launches, via structures, transmission lines, stack-ups and low-loss materials for future designs. This role spans simulation, lab validation and practical design influence. You will work from concept through prototype bring-up, debug, validation and support for manufacture. The team and culture You will join the Hardware Engineering team, working closely with PCB, package substrate, system architecture and supplier teams. Work moves through simulation, design review, lab evidence and practical trade-offs. You will be expected to own signal integrity decisions across complex board and package interfaces. The team values careful analysis, pace and clear communication when problems need action. Decisions are made close to the engineering detail. You will challenge designs, guide constraints and help teams reach the best performance possible. What we’re looking for · Strong experience in high-speed digital circuit development, with deep signal and power integrity knowledge · Experience with high-frequency SERDES design and validation, including tens of GHz operation · Expertise using tools such as ANSYS SIWave, HFSS, Mentor HyperLynx or similar · Ability to design BGA and connector launches, via structures and transmission lines for GHz signals · Hands-on lab experience using VNAs, high-speed oscilloscopes and signal generators · Rigorous approach to design, debug and validation, with strong ownership and communication skills While we have outlined a set of requirements, we value transferable skills and diverse experiences.

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is looking for a person ready to take up the challenge of working in a high-profile project where we design and integrate multiple chiplets into a System-in-package, in collaboration with external stakeholders. You will work with Tenstorrent worldwide experts and leaders in the USA, Japan and other countries, and help us make our IP even better. In this role, you will be responsible for DFT implementation using industry standard tools for high-speed CPU core design. This role is remote based out of the United States. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are You have a Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, or Computer Science, along with 10+ years of relevant DFT experience. You have hands-on experience with industry-standard DFT tools such as Synopsys and Siemens, as well as scripting in TCL and Python. You bring expertise in DFT planning, SoC-level silicon debug, formal verification, and signoff of inserted DFT logic. You are a strong cross-functional collaborator who can assess risk, communicate resource needs, and deliver in a complex technical environment. What we need Build

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Specific Responsibilities: 1. Drive HBM process development and yield improvement in PHOTO process. 2. Assist advanced package technology (chip stacking, 2.5D or 3D) research and development 4. Support project on-site execution and make decisions as technical consultant 5. Troubleshoot a variety of complex problems. Perform root cause analysis and resolve process engineering issues 6. Generate internal and external documentation for presentations and technical reports Technology Development 1. Understand department and organizational goals and objectives to ensure daily tasks align with Technology Development needs. 2. Engage in process development projects with cross-team interaction, providing expert contribution in materials characterization. 3. Coordinate mechanical characterization and testing for advanced packaging development efforts globally including US, Japan, and Singapore site. 4. Provide recommendations for test structure and test vehicle design for material property evaluation. 5. Review, summarize, and present data with recommendations of materials and lead discussions with packaging material suppliers to meet technical specifications and roadmaps. Qualifications: 1. 3-7 years PHOTO experience in semiconductor related industry 2. Degree/Major: Master above (PhD. is plus) major in Chemistry, Physic, Material, engineering science related fields 3. Solid understanding of photolithography fundamentals - PR coati

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Specific Responsibilities: 1. Drive HBM process development and yield improvement in DRY ETCH process. 2. Assist advanced package technology (chip stacking, 2.5D or 3D) research and development 4. Support project on-site execution and make decisions as technical consultant 5. Troubleshoot a variety of complex problems. Perform root cause analysis and resolve process engineering issues 6. Generate internal and external documentation for presentations and technical reports Technology Development 1. Understand department and organizational goals and objectives to ensure daily tasks align with Technology Development needs. 2. Engage in process development projects with cross-team interaction, providing expert contribution in materials characterization. 3. Coordinate mechanical characterization and testing for advanced packaging development efforts globally including US, Japan, and Singapore site. 4. Provide recommendations for test structure and test vehicle design for material property evaluation. 5. Review, summarize, and present data with recommendations of materials and lead discussions with packaging material suppliers to meet technical specifications and roadmaps. Qualifications: 1. Must be at least 4 years experience in semiconductor related industry 2. Degree/Major: Master above (PhD. is plus) major in Chemistry, Physic, Material, engineering science related fields 3. Mu

What we’re doing isn’t easy, but nothing worth doing ever is. Diligent builds helpful robots that work safely and autonomously in real world environments. We move quickly, solve messy problems, and care deeply about reliability at scale. We’re hiring a Manufacturing Reliability Engineer to own production test for our robots at our contract manufacturer: you’ll design and run robust end-to-end test protocols, provision fleets of robots for production, and own the KPIs that define production quality. This role is based in the Milwaukee, WI area and requires close collaboration across software, hardware, operations, and product engineering teams. We welcome applicants from outside Milwaukee who are willing to relocate. Relocation assistance/bonus will be a part of compensation package. Key Responsibilities End-to-end test process ownership. Create, validate, and maintain production test protocols and gating criteria from incoming inspection through final test and shipment. Provisioning of bots. Design and operate provisioning flows (imaging, firmware deployment, configuration, validation) and the tooling/fixtures needed to provision and handoff robots for production. KPIs and continuous improvement. Own key production metrics — First Pass Yield (FPY), cycle time, and test coverage — and drive continuous improvements to meet throughput and quality targets. Test automation & infrastructure. Architect, implement, and maintain automated test frameworks, harnesses, and test rigs used at the CM site. Ensure tests are stable, fast, and provide actionable failure data. Cross-functional escalation & RCA. Lead root-cause analysis for field and production failures; coordinate corrective actions with design, firmware, and CM engineering to close quality loops. On-site production leadership. Be the onsite technical authority at the contract manufacturer: train operators, debug failures on the line, and continuously refine processes with CM partners. What Success Looks

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Within the larger SI R&D group, as a Principal Signal Integrity Engineer at Micron, you will be responsible for: Leading the development and analysis of high speed (HS or similar expertise) memory interfaces and power distribution networks (PDN) . Applying AI/ML and data-driven techniques to accelerate Signal Integrity / Power Integrity analysis, build optimization , and engineering decision-making. Applying automation, scripting, and AI-assisted engineering workflows to improve simulation efficiency and coverage. Representing the Signal Integrity R&D team in technical cross-functional collaborative groups , integrating with package build, silicon develop, system invent, product engineering, and marketing departments to ensure overall product performance. Driving and developing SI/PI aspects of future standards (including but not limited to JEDEC, ONFI, and IBIS) through system and product electrical capability exploration. Supporting external customers as needed. Formulating techniques and protocols for SI/PI analysis. Supporting and driving path-finding activities for IO and channel innovation to enable the next generation of memory technologies at higher speeds and densities. Minimum Qualifications PhD or MSEE, or equivalent experience, with at least 5 years of industry experience. Deep experience in Signal and Power Integrity, particularly in areas affecting I/O circui

JOB TITLE Software Engineer – Cloud Infrastructure A CAREER WITH POINT72’S TECHNOLOGY TEAM As Point72 reimagines the future of investing, our Technology team is constantly evolving our firm’s IT infrastructure and engineering capabilities, positioning us at the forefront of a rapidly evolving technology landscape. We’re a team of experts who experiment and work to discover new ways to harness open-source solutions, modern cloud architectures, and sophisticated Artificial Intelligence (AI) solutions, while embracing enterprise agile methodologies. Our commitment to building and innovating in the AI space provides the framework intended to drive smarter decision making and enhance how we build and operate our platforms and applications. As a member of Point72’s Technology team, we encourage and support your professional development from day one—helping you advance your technical skills, contribute innovative ideas, and satisfy your own intellectual curiosity—all while delivering real business impact for our multi-billion-dollar global business. WHAT YOU'LL DO • Design, operate, and continuously improve our Kubernetes infrastructure on Amazon EKS, including Karpenter-based autoscaling, workload scheduling, and cluster lifecycle management • Administer and tune PostgreSQL databases (on RDS) that back platform applications such as Airflow — handling configuration, parameter tuning, maintenance, and reliability, not query optimization • Own our Infrastructure as Code using Terraform — provisioning, modifying, and auditing AWS resources including S3, EC2, RDS, EKS, and IAM • Manage IAM roles, policies, and access patterns across our AWS environment with a security-first mindset • Maintain our artifact registries (ECR, Artifactory) — enforcing retention policies, image versioning standards, and responding to infosec requests around package vulnerabilities and container image remediation • Own and

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. 1. Advanced Package/Product Integration Drive package product integration for next-generation advanced packaging technologies. Identify integration risks and implement corrective actions during development. Support design rule development and package architecture optimization. Hiring Need: Current workload exceeds available engineering bandwidth, increasing program delay and technical risk exposure. 2. Cross-Functional Technical Leadership Act as primary interface among product engineering, process engineering, manufacturing, suppliers, and customers. Drive alignment on technical decisions and risk mitigation plans. Lead failure analysis and corrective action activities. Hiring Need: Growing project complexity requires additional senior technical leadership to avoid bottlenecks and improve execution efficiency. 3. Customer Support and Technical Engagement Support customer technical reviews and package feasibility assessments. Provide technical recommendations for package implementation and risk reduction. Address customer escalations related to package performance and reliability. Hiring Need: Increased customer interaction volume requires dedicated engineering support to maintain responsiveness and customer satisfaction. 4. Reliability Improvement Drive root-cause investigations for package failures. Improve package yield, reliability, and manufacturing robustness. Develop long-term corrective and preventive actions. Hiring Nee