Physical Therapist Assistant Jobs

About Us At Cloudflare, we are on a mission to help build a better Internet. Today the company runs one of the world’s largest networks that powers millions of websites and other Internet properties for customers ranging from individual bloggers to SMBs to Fortune 500 companies. Cloudflare protects and accelerates any Internet application online without adding hardware, installing software, or changing a line of code. Internet properties powered by Cloudflare all have web traffic routed through its intelligent global network, which gets smarter with every request. As a result, they see significant improvement in performance and a decrease in spam and other attacks. Cloudflare was named to Entrepreneur Magazine’s Top Company Cultures list and ranked among the World’s Most Innovative Companies by Fast Company. At Cloudflare, we’re not looking for people who wait for a polished roadmap; we’re looking for the builders who see the cracks in the Internet that everyone else has simply learned to live with. We value candidates who have the instinct to spot a "normalized" problem and the AI-native curiosity to create a solution using the latest tools. Our culture is built on iteration, leveraging AI to ship faster today to make it better tomorrow, while ensuring that every improvement, no matter how small, is shared across the team to lift everyone up. If you’re the type of person who values curiosity over bureaucracy, and that AI is a partner in solving tough problems to keep the Internet moving forward, you’ll fit right in. Available Locations - Bengaluru, India About the Role As our Global Physical Security Specialist and leader, reporting to our Sr. Director of Physical Security you will take ownership of our physical security technologies across our office and data center footprint and review and document intelligence supporting the physical security mission. We are looking for someone with law enforcement or former military experience who is excited about so

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and manufacturing teams to deliver best‑in‑class PPA (performance, power, area) and robust signoff collateral for tape-out. This is a hands‑on role with opportunities to own blocks or top‑level integration across multiple product generations. Key Responsibilities Own physical implementation for SoC blocks and/or top-level, including floor-planning, placement, CTS, routing, and physical optimization to meet PPA targets. Drive timing closure (setup/hold) across multi-mode/multi-corner (MMMC) scenarios; partner with RTL, architecture, and STA/signoff to converge designs. Integrate and implement complex IP (e.g., controllers, microcontrollers, NOC, interfaces, MBIST/DFT logic, buffers, PHY‑adjacent logic) with focus on robust physical integration and timing/power integrity. Perform and/or coordinate physical signoff, including DRC/LVS, IR drop/EM, and timing signoff, addressing violations efficiently. Partner with DFT teams to ensure scan/MBIST requirements are physically realizable and do not compromise PPA or schedule. Work with packaging, assembly, test, probe, and manufacturing collaborators to ensure builds meet manufacturability and quality requirements. Support tape-out execution (checklists, ECO flows, signoff r

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. We are currently looking for motivated individuals to join Micron Technology Inc. Central Engineering (CE) - Product Yield Enhancement (PYE) Engineering Team. As CE PYE Failure Analysis (FA) Engineer for Micron Technology, Inc., you will be responsible for providing full fault isolation and failure analysis support for qualifications, customer returns, new device introduction, and test failures. You will become the subject matter expert on fault isolation and physical failure analysis methods. As the CE PYE FA Engineer, you will be responsible for understanding all relevant methodologies to isolate electrical failures by working closely with Product Engineering Teams. You will also have a thorough understanding of the product architecture, process flow, and test sequence to work with Process Integration, Product, Test, and Quality Reliability Assurance Engineering groups ensuring physical defects are root-caused and classified. Job Description: Responsibilities: • Perform sophisticated electrical device characterization to determine electrical fail mechanisms. • Operate fault isolation equipment to accurately narrow down failure defect locations. • Conduct physical failure analysis to identify and classify physical d

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. We are currently looking for motivated individuals to join Micron Technology Inc. Central Engineering (CE) - Product Yield Enhancement (PYE) Engineering Team. As CE PYE Failure Analysis (FA) Engineer for Micron Technology, Inc., you will be responsible for providing full fault isolation and failure analysis support for qualifications, customer returns, new device introduction, and test failures. You will become the subject matter expert on fault isolation and physical failure analysis methods. As the CE PYE FA Engineer, you will be responsible for understanding all relevant methodologies to isolate electrical failures by working closely with Product Engineering Teams. You will also have a thorough understanding of the product architecture, process flow, and test sequence to work with Process Integration, Product, Test, and Quality Reliability Assurance Engineering groups ensuring physical defects are root-caused and classified. Job Description: Responsibilities: • Perform sophisticated electrical device characterization to determine electrical fail mechanisms. • Operate fault isolation equipment to accurately narrow down failure defect locations. • Conduct physical failure analysis to identify and classify physical d

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. We are currently looking for motivated individuals to join Micron Technology Inc. Central Engineering (CE) - Product Yield Enhancement (PYE) Engineering Team. As CE PYE Failure Analysis (FA) Engineer for Micron Technology, Inc., you will be responsible for providing full fault isolation and failure analysis support for qualifications, customer returns, new device introduction, and test failures. You will become the subject matter expert on fault isolation and physical failure analysis methods. As the CE PYE FA Engineer, you will be responsible for understanding all relevant methodologies to isolate electrical failures by working closely with Product Engineering Teams. You will also have a thorough understanding of the product architecture, process flow, and test sequence to work with Process Integration, Product, Test, and Quality Reliability Assurance Engineering groups ensuring physical defects are root-caused and classified. Job Description: Responsibilities: • Perform sophisticated electrical device characterization to determine electrical fail mechanisms. • Operate fault isolation equipment to accurately narrow down failure defect locations. • Conduct physical failure analysis to identify and classify physical d

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. We are currently looking for motivated individuals to join Micron Technology Inc. Central Engineering (CE) - Product Yield Enhancement (PYE) Engineering Team. As CE PYE Failure Analysis (FA) Engineer for Micron Technology, Inc., you will be responsible for providing full fault isolation and failure analysis support for qualifications, customer returns, new device introduction, and test failures. You will become the subject matter expert on fault isolation and physical failure analysis methods. As the CE PYE FA Engineer, you will be responsible for understanding all relevant methodologies to isolate electrical failures by working closely with Product Engineering Teams. You will also have a thorough understanding of the product architecture, process flow, and test sequence to work with Process Integration, Product, Test, and Quality Reliability Assurance Engineering groups ensuring physical defects are root-caused and classified. Job Description: Responsibilities: • Perform sophisticated electrical device characterization to determine electrical fail mechanisms. • Operate fault isolation equipment to accurately narrow down failure defect locations. • Conduct physical failure analysis to identify and classify physical d

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and manufacturing teams to deliver best‑in‑class PPA (performance, power, area) and robust signoff collateral for tape-out. This is a hands‑on role with opportunities to own blocks or top‑level integration across multiple product generations. Key Responsibilities Own physical implementation for SoC blocks and/or top-level, including floor-planning, placement, CTS, routing, and physical optimization to meet PPA targets. Drive timing closure (setup/hold) across multi-mode/multi-corner (MMMC) scenarios; partner with RTL, architecture, and STA/signoff to converge designs. Integrate and implement complex IP (e.g., controllers, microcontrollers, NOC, interfaces, MBIST/DFT logic, buffers, PHY‑adjacent logic) with focus on robust physical integration and timing/power integrity. Perform and/or coordinate physical signoff, including DRC/LVS, IR drop/EM, and timing signoff, addressing violations efficiently. Partner with DFT teams to ensure scan/MBIST requirements are physically realizable and do not compromise PPA or schedule. Work with packaging, assembly, test, probe, and manufacturing collaborators to ensure builds meet manufacturability and quality requirements. Support tape-out execution (checklists, ECO flows, signoff r

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. We are currently looking for motivated individuals to join Micron Technology Inc. Central Engineering (CE) - Product Yield Enhancement (PYE) Engineering Team. As CE PYE Failure Analysis (FA) Engineer for Micron Technology, Inc., you will be responsible for providing full fault isolation and failure analysis support for qualifications, customer returns, new device introduction, and test failures. You will become a domain expert in fault isolation and physical failure analysis methods. As the CE PYE FA Engineer, you will be responsible for understanding all relevant methodologies to isolate electrical failures by working closely with Product Engineering Teams. You will also have a thorough understanding of the product architecture, process flow, and test sequence to work with Process Integration, Product, Test, and Quality Reliability Assurance Engineering groups ensuring physical defects are root-caused and classified. Job Description: Responsibilities: • Perform sophisticated electrical device characterization to determine electrical fail mechanisms. • Operate fault isolation equipment to accurately narrow down failure defect locations. • Conduct physical failure analysis to identify and classify physical defects.</p

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Staff/Senior Staff Physical Design Floorplan & PDN Lead Experience: 10–14 Years Location: Bangalore/2 days to work Department: RTL-to-GDSII / Physical Implementation Role Overview We are seeking a high-caliber Staff or Senior Staff Physical Design Engineer with a specialized mastery of Floorplanning and Power Delivery Network (PDN) design. You won’t just be pushing buttons; you will be the architectural bridge between RTL/Systems and the final GDSII. This role requires a visionary who understands how a single floorplan decision ripples through the entire PPA (Power, Performance, Area) spectrum. As a technical lead, you will own the chip-top floorplan for complex, large-scale SoCs or Sub-chips, driving strategies that balance aggressive performance targets with robust power integrity. Key Responsibilities Architectural Floorplanning: Lead chip-level floorplanning, including macro placement, pin assignment, and partition definition for multi-million gate designs. Strategic PDN Design: Architect and implement complex Power Delivery Networks. You will define the metal stack usage and grid density to support high-performance cores while minimizing routing congestion. EMIR Mastery: Perform exhaustive IR-drop (Static/Dynamic) and Electromigration (EM) analysis. You must be able to diagnose root causes and propose ar

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Job Title: Staff/ Senior Staff Physical Design Engineer (Technical Lead) Experience: Staff 8-10 years Senior Staff 11-13 years Location: Bangalore Hybrid/Remote or Remote in India The Role We are seeking a high-impact Staff/ Senior Staff Physical Design Engineer to serve as a Technical Lead for our next-generation silicon products. This is a "player-coach" role designed for a versatile expert who is equally comfortable architecting a convergence strategy as they are mentoring a small team of engineers. You will own the physical delivery of a major sub-chip or complex block, pushing the absolute limits of PPA (Power, Performance, Area) . As a Staff/Senior Staff lead, you are expected to be the "anchor" of the project—assertive in your decision-making, highly analytical in your debugging, and adept at managing stakeholders to ensure we hit our tape-out milestones without compromise. Key Responsibilities Technical Leadership: Lead a small team of PD engineers, providing technical direction, workload management, and architectural oversight for a sub-chip or partition. SOC clocking , FEV/VCLP specialized skills are preferred. Complex Block/Sub-chip Ownership: Take personal hands-on ownership of the most critical, high-congestion, or timing-critical blocks in the desi

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