Signal Integrity Hardware Engineer Jobs

Zoox is looking for a Senior Signal Integrity and EMC Engineer to ensure the electrical reliability, signal fidelity, and compliance of our complex autonomous vehicle systems. In this role, you will own the end-to-end strategy for vehicle-level signal integrity, RF/wireless performance, and EMC. You will work within a multi-disciplinary engineering team to set rigorous requirements and ensure best practices are implemented from concept to production. You will serve as the domain expert on a variety of high-speed digital and RF design topics that bring our hardware to life safely and reliably. In this role, you will: Lead the development, implementation, and validation of vehicle-level signal integrity, grounding, and shielding strategies. Maintain rigorous technical requirements and EMC specifications applied across all electrical and electronic systems on all vehicle platforms. Define and maintain vehicle-level RF performance requirements, establishing specifications for all transmitters, receivers, and antenna systems to mitigate the electromagnetic impacts of physical vehicle installation on wireless communication. Perform and/or oversee signal integrity and power integrity (SI/PI) simulations and analysis for critical high-speed interfaces and power distribution networks. Simulate RF performance of all antennas, transmitters, and receivers as installed in a vehicle during the vehicle design phase to drive integration alignment. Collaborate with cross-functional design teams to ensure best practices for signal integrity, RF design, and EMC are implemented. Lead design reviews to identify and remediate vulnerabilities early to meet project milestones. Develop and execute validation plans for vehicle-level signal integrity, RF/wireless performance, and EMC, including radiated and conducted emissions/immunity. Troubleshoot and resolve complex signal integrity, RF, and EMC issues discovered during design, validation, and

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a senior High Speed Interconnect / Signal Integrity Engineer to design and validate high-bandwidth links for large-scale AI systems. You will define, model, and qualify interconnect solutions across copper and optical technologies for next-generation AI inference and training clusters. This role is on-site in Santa Clara, CA, Austin, TX, or Toronto, Canada. We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting Who You Are An experienced electrical engineer with a Bachelor’s or Master’s in Electrical Engineering. 5+ years working on high-speed communications (100G–1.6T), including signal integrity, channels, and links. Comfortable building and owning link and channel budgets and making clear tradeoffs between reach, loss, BER, and margin. Hands-on with SI tools and lab equipment such as Keysight ADS, VNAs, TDRs, BERTs, and protocol analyzers. Familiar with cable specification and testing, as well as accelerated life testing, mating life, and failure analysis. Able to collaborate across hardware, systems, and manufacturing teams; manufacturing/DFM/DTM experience is a plus. What We Need Define and specify high-speed interconnect architectures

About the job Shape the power delivery foundations behind advanced AI compute systems built for real-world reliability. As a Power Integrity Engineer, you will deliver robust power integrity solutions across Graphcore silicon and system designs. Your work will help advanced compute platforms operate reliably across complex packages, PCBs and hardware systems. You will develop and analyse power delivery networks across silicon, package and PCB designs. You will use simulation, measurement and lab correlation to turn power behaviour into clear design improvements. This role gives you ownership across the full system path. You will influence decoupling strategy, stack-up decisions, bring-up debug and best practice for future platforms. The team and culture You will join the Signal and Power Integrity team within Systems Engineering Hardware Motherboard. The team works across chip, package, board and system engineering to solve problems end to end. Work moves through modelling, simulation, validation and lab evidence. You will collaborate closely with hardware teams and third parties to improve power and signal performance. You will be trusted to guide technical decisions, review peer work and speak up when designs need challenge. Ownership sits close to the engineering detail. What we’re looking for · Strong understanding of power integrity principles, including PDN design and analysis · Proficiency with PI simulation tools such as PowerDC, PowerSI, HFSS/SiWave, Simplis, Spice, ADS or similar · Experience working across chip, package or board-level design · Ability to interpret simulation results and translate them into design improvements · Knowledge of electromagnetic simulation techniques and lab measurement using equipment such as VNAs and oscilloscopes · Strong analytical skills, clear communication and the ability to work cross-functionally While we have outlined a set of requirements, we value transferable skills and diverse experiences. If you meet most of our

Why RoboForce RoboForce is an AI robotics company developing Physical AI–powered Robo-Labor for dull, dirty, and dangerous work. The company’s robots are engineered for demanding industrial environments, with a focus on real-world deployment and scalability. We are looking for a motivated Robotics Electrical Engineering Intern for Fall/Winter 2026 to join our team. This role is a hands-on opportunity to bridge the gap between hardware design and embedded software. You will be instrumental in bringing our in-house electronics boards to life by debugging hardware circuits and developing the firmware that drives them. You will work alongside a team of world-class researchers and engineers on ambitious, real-world problems at the intersection of foundation models, decision-making, and robotics. This is an opportunity to help shape core research directions, build cutting-edge systems, and contribute to work with strong potential for publication at top-tier conferences. Responsibilities Perform circuit validation including power-on tests, signal integrity checks, and continuity testing Troubleshoot hardware issues using oscilloscopes, multimeters, and logic analyzers Develop, test, and maintain embedded firmware for Arduino (C++) and STM32 (C) platforms using open-source libraries Implement and debug communication protocols including CAN bus , I2C, SPI, and UART Validate communication protocols with Linux-based environments Ensure reliability and robustness of firmware in real-world conditions Manage end-to-end documentation, turning complex debugging and firmware details into clear, actionable guides for engineers. Requirements Currently pursuing a BS, MS or PHD in Electrical Engineering, Computer Engineering, or a related field Proficiency with the Arduino ecosystem and experience or strong interest in STM32 (HAL/LL or STM32CubeIDE) Understanding of CAN bus architecture and messaging Hands-on experience with lab tools (oscilloscopes, digital multimeters, function genera

About Anthropic Anthropic’s mission is to create reliable, interpretable, and steerable AI systems. We want AI to be safe and beneficial for our users and for society as a whole. Our team is a quickly growing group of committed researchers, engineers, policy experts, and business leaders working together to build beneficial AI systems. About the role Anthropic runs some of the largest AI training and inference workloads in the world, across multiple hardware platforms. We work from the chip level up with our silicon partners, and we are now deepening that investment by building a custom silicon team. You will be one of a small number of people covering a large surface. We are opening searches across the key domains below, and we are interested in candidates whose center of gravity sits in any of them: Front-end design Pre-silicon verification Physical design Design for test Analog and mixed-signal Technology and foundry CAD and design infrastructure Packaging, signal integrity, and power integrity This is a role for someone who has shipped silicon, has a realistic relationship with schedules, and is comfortable making consequential calls without a large organization behind them. Key responsibilities Take part in end to end activities for the program: strategy, specification, execution and the technical bar. Write the specifications and interface definitions that others design against and keep them coherent as the architecture converges Make and own directional calls: technology and IP selection, where we build versus buy versus license, and where we take design authority versus rely on partners Build and share AI-assisted approaches to the code-like parts of your domain, and help the team learn what Claude can genuinely accelerate Contribute to the architecture and micro-architecture discussion from your domain's perspective, including the tradeoffs your area imposes on the rest of the chip Partner with Anthropic's inference, performance, kernels, and infrastr

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Physical Design Engineer (2-4 Years Experience) We are looking for a high-caliber Physical Design Engineer to join our fast-paced startup team. This role is designed for "top 1%" talent—engineers from tier-1 universities (IIT/NIT/BITS or equivalent) who possess a relentless "go-getter" attitude and the critical thinking skills required to solve complex, next-generation silicon challenges. If you are eager to move beyond standard digital flows into the future of AI-driven automation , this is your playground. Key Responsibilities End-to-End Ownership: Drive RTL-to-GDSII implementation, including floorplanning, placement, CTS, routing, and physical verification (LVS/DRC/ERC). Performance Optimization: Execute high-performance design closure focusing on PPA (Power, Performance, Area) targets in advanced process nodes ( 3nm or below) Static Timing Analysis (STA): Perform comprehensive timing closure, including signal integrity, crosstalk analysis, and CPPR (Common Path Pessimism Removal) optimization. Power Integrity: Conduct IR-drop analysis (Static/Dynamic) and EM (Electromigration) checks to ensure robust power delivery. Innovation: Develop and integrate AI/ML-based automation scripts to optimize the physical design flow and reduce turnaround time. Qualifications &am

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. Role Overview We are seeking an experienced ASIC Package Signal Integrity / Power Integrity Engineer to drive electrical architecture, modeling, optimization, and validation for the most advanced AI/HPC silicon and package design. This role focuses on high-speed SerDes and memory channel architecture, advanced 2.5D/3D package SI/PI, substrate to package co-design, power-delivery-network optimization, electromagnetic modeling, and simulation-to-measurement correlation. The ideal candidate has strong hands-on experience with high-speed channel and PDN analysis across ASIC packages, interposers, substrates, and power-delivery structures, and can translate simulation results into practical design requirements for interposers and package substrate design optimization. The engineer will work closely with ASIC, package, system, mechanical, thermal, power, and silicon validation teams from early architecture and feasibility studies through production bring-up. In this role you will Own SI/PI architecture and analysis for advanced AI ASIC packages from early feasibility studies through production. Develop and optimize high-speed electrical channels for 200G/400G SerDes, PCIe, HBM, DDR, and chiplet/die-to-die interfaces. Perform package, interposer and substrate modeling using 2D/3D electromagnetic solvers. Define and optimize package stack-ups, transmission-line structures, via transitions, breakout structures, return paths, ground shielding, bump maps, and ball maps based on SI/PI re

About the Team OpenAI’s Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team builds next-generation AI-native silicon and systems while working closely with software, research, and manufacturing partners to co-design hardware tightly integrated with AI models. In addition to delivering systems for OpenAI’s supercomputing infrastructure, the team develops the tools, methodologies, and strategic partnerships needed to accelerate hardware innovation. About the Role We’re seeking an experienced Hardware Strategic Sourcing Manager to own sourcing strategy and supplier partnerships for fiber and optical interconnect components across OpenAI’s next-generation AI infrastructure. Reporting to the Head of Partnerships & Strategic Sourcing, you will lead sourcing across fiber cable assemblies, internal optical harnesses, fiber shuffles, optical backplane assemblies, connectorized and standalone passive optical assemblies, fiber-array units (FAUs), fiber-to-chip and coupling interfaces, detachable connectors, optical routing, and assigned optical packaging, assembly, and test services. You will work closely with electrical engineering, optical engineering, systems engineering, mechanical and packaging engineering, quality, rack integration, data-center deployment,manufacturing, supply chain, finance, legal, and program management teams to translate demanding bandwidth, signal integrity, reliability, and scale requirements into resilient supplier partnerships and scalable commercial strategies. Your work will directly support the performance, reliability, manufacturability, and scale of the high-speed optical connectivity required for OpenAI’s next-generation AI systems. In this role, you will: Develop and execute a comprehensive sourcing strategy for fiber and optical interconnect components supporting high-bandwidth AI systems and infrastructure. Own sourcing across optical fiber cable assembli

About the Team DoorDash Labs is a team within DoorDash building autonomous delivery robots and other autonomy solutions from the ground up for DoorDash's core delivery platform. If you have a passion for applying autonomy and robotics in a service used by millions of people daily, then we want to talk to you! About the Role We are seeking a hands-on Electrical Engineer to review the design, drawings, and schematics of the electrical systems for our 4-wheeled autonomous delivery robot. This role is responsible for delivering robust, production-ready hardware across high-speed digital design, PCBAs, RF integration, harnessing, and board-level packaging. This is a deeply technical position for someone who can move seamlessly between system-level thinking and detailed circuit execution. You're excited about this opportunity because... Develop electrical systems for a complex mobile robotic platform from concept through production. Lead high-speed digital design efforts (PCIe, MIPI, Ethernet, DDR, multi-gigabit SERDES, etc.). Own PCBA development including schematic capture, stack-up definition, layout guidance, impedance control, and design-for-manufacture. Drive RF integration (Wi-Fi, LTE/5G, GNSS, Bluetooth, RADAR, and LiDAR), antenna placement, layout constraints, and signal integrity. Develop and review cable harness designs, connector selection, grounding strategy, and environmental robustness. Collaborate closely with mechanical engineering on board packaging, thermal management, vibration resistance, and environmental sealing. Define and implement power distribution architecture, battery interfaces, protection circuits, and system monitoring. Ensure compliance with EMI/EMC and regulatory requirements (FCC/CE) (CISPR-25 and FCC Part 15 Class A). Support prototype builds and bring-up, debug hardware/firmware interface issues, root-cause failures, and drive corrective actions quickly. Establish design standards and perform detailed design reviews across the EE team.

Job Title Principal Electrical Engineer- Medical Device Job Description As a Principal Electrical Engineer, you will be part of the multidisciplinary IntraSight Hardware Team, contributing to innovative imaging clinical solutions. You will serve as the key technical interface between Philips and external suppliers, design partners, and contract manufacturers for PCBA development, ensuring high-quality, reliable, and cost-effective electronic designs that meet performance, safety, quality, and regulatory requirements. Your role Serve as the primary electrical engineering interface to suppliers, design partners, and contract manufacturers, providing technical leadership for PCBA design, development, prototyping, and industrialization. Drive alignment on electrical requirements, schematics, PCB layout, architecture, acceptance criteria, timelines, cost, and quality. Lead supplier selection, technical evaluations, design reviews, and issue resolution in partnership with sourcing, procurement, and cross-functional engineering teams. Review and approve schematics, PCB layouts, and design documentation to ensure alignment with Philips standards and system architecture. Drive design for manufacturability (DFM), design for testability (DFT), design for cost (DFC), and component selection strategies while considering availability, lifecycle, obsolescence, and overall product cost. Manage supplier change requests and mitigate component and PCBA lifecycle risks. Oversee PCBA verification and validation, including functional, signal integrity, power integrity, electrical safety, and EMC testing, ensuring compliance with applicable medical device standards such as IEC 60601-1 and IEC 60601-1-2. Partner with quality and regulatory teams to ensure suppliers meet required quality systems, documentation, and regulatory expectati

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities Validation Execution Assist in executing Validation Runs on IQP/ETV materials under defined timelines, ensuring coverage completeness across MBIST and Native Mode flows. Support time-bound data crunching (log parsing, statistical summaries) and contribute to summary report preparation. Platform & Test Program Support Operate and debug programs on SM3/Cobra (MBIST) and Advantest V93K (Native) . Assist in hardware readiness: handler, socket, loadboard, and probe card setup. Technical Analysis & Simulation Validate high-speed I/O (>11 Gbps) and assist with eye diagram and signal integrity checks. Support Verilog simulation tasks (testbench execution, waveform review) to reproduce sightings and validate fixes. Data & Automation Develop basic scripts in Python for log parsing and data visualization. Maintain documentation in Confluence/Jira and version control in Git/Perforce. Debug & Collaboration Participate

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE As a Product Engineer specializing in PCBA Manufacturing and DFM, you will drive the end-to-end design manufacturability, quality, and production readiness of next-generation printed circuit board assemblies powering high-performance server and storage systems. Partnering cross-functionally with Hardware Design, Mechanical Engineering, Test Engineering, and global Contract Manufacturers, you will establish high-yield manufacturing processes, optimize complex stack-ups, and safeguard signal integrity across critical data center hardware. In this high-impact role, your expertise directly ensures our hardware scales seamlessly from early design through full-volume production with industry-leading reliability. WHAT YOU'LL DO PCB Architecture & Fabrication Optimization : Direct PCB material selection, multilayer stack-up design, dielectric properties, and fabrication requirements in partnership with hardware designers and fabrication suppliers to maximize signal integrity, ensure impedance control, and eliminate manufacturability risks before release. SMT & Assembly Process Qualification : Define, optimize, and qualify SMT and mixed-technology assembly processes—including solder paste printing, component placement, reflow, and selective soldering—collaborating with Contract Manufacturers to achieve first-pass yield targets and robust solder joint integrity. Advanced Defect Screening & Testability Engineerin

About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons - all while shaping the future of connectivity. Responsibilities Lead hardware circuit design, schematic capture, and layout review for next-generation, high-density, and high-throughput networking platforms. Evaluate and integrate advanced switching architectures, management subsystems, and cutting-edge high-speed interconnect technologies. Drive hardware architecture design, system bring-up, high-speed signal integrity (SI) validation, and root-cause failure analysis. Partner with mechanical, thermal, and power engineering teams to address challenges related to high power density, thermal dissipation, and system-level reliability. Own BOM structure and support factory deployment to ensure seamless transition of high-layer-count PCBAs from NPI to mass production. Collaborate with cross-functional software, firmware, QA, and compliance teams throughout the entire product lifecycle. Q ualifications Bachelor’s degree or above in Electrical Engineering or a related discipline. 5+ years of hands-on experience in high-complexity system-level hardware design, ideally focused on enterprise-grade networking or high-performance infrastructure equipment. Deep technical understanding of high-speed Ethernet design, high-speed differential signals (advanced SerDes, PCIe, multi-gigabit/ultra-high-speed interfaces), and high-density PCB design rules. Practical experience with complex power d

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities Validation Execution Assist in executing Validation Runs on IQP/ETV materials under defined timelines, ensuring coverage completeness across MBIST and Native Mode flows. Support time-bound data crunching (log parsing, statistical summaries) and contribute to summary report preparation. Platform & Test Program Support Operate and debug programs on SM3/Cobra (MBIST) and Advantest V93K (Native) . Assist in hardware readiness: handler, socket, loadboard, and probe card setup. Technical Analysis & Simulation Validate high-speed I/O (>11 Gbps) and assist with eye diagram and signal integrity checks. Support Verilog simulation tasks (testbench execution, waveform review) to reproduce sightings and validate fixes. Data & Automation Develop basic scripts in Python for log parsing and data visualization. Maintain documentation in Confluence/Jira and version control in Git/Perforce. Debug & Collaboration Participate

What you’ll do Act as the in-house electrical lead for Midjourney Medical: own the electrical architecture of the scanner and the technical direction for all board-level design. Own complex board design end-to-end: architecture, schematic capture, layout (high-speed digital, analog/mixed-signal, power), DFM/DFT, fabrication and assembly vendor management, bring-up, and revision control. Write firmware for embedded targets (MCU/SoC): drivers, real-time control loops, safety-relevant logic, bootloaders, and field update paths. Audit and update HDL (FPGA) code for high-throughput data acquisition, timing/synchronization, triggering, and pre-processing of ultrasound and sensor data streams. Define electrical interfaces and data contracts with software, recon/ML and mechanical teams: timing budgets, clocking/sync, signal integrity, connectors/harnessing, and failure modes. Establish electrical engineering rigor: design reviews, schematic/layout review checklists, bring-up procedures, test fixtures, and documentation suitable for a regulated medical device program (DHF, traceability, change control). Mentor and grow the electrical function; select and manage external design partners where leverage is high. What we’re looking for Deep experience designing complex boards from blank page to stable revision, including high-speed digital and analog/mixed-signal domains. Strong schematic and layout skills (Altium/KiCad or equivalent) with real signal integrity, power integrity, grounding, and EMI/EMC instincts. Solid embedded firmware background in C/C++ (and Python for tooling): peripherals, DMA, interrupts, real-time constraints, and debugging on hardware. Practical HDL experience (VHDL/Verilog/SystemVerilog) for data acquisition, timing, and streaming interfaces. Track record of owning bring-up and debug on real hardware: scopes, logic analyzers, and disciplined root-cause analysis. Technical leadership: clear trade-offs, strong written documentation, and the ability to set