Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Role and Responsibilities Responsible for layout design and development of critical analog, mixed-signal, custom digital block, standard cells and full chip level. Perform layout verification like LVS, DRC, Antenna, Shield, Matching, Latch up, EM IR Totem checks, quality check and documentation. Responsible for development of digital block layouts using auto placement and route tools Responsible for basic understanding of skill coding and automation Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/breakthroughs in multiple project environment. Guide team members in their execution of Sub block-level layouts & review their work Effectively communicating with Global engineering teams to assure the success of layout project. Responsible for the reducing the layout effort by using AI About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performa
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Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Summary: We are looking for an Engineer/Senior Engineer in Product Engineering, NAND Validation/Characterization , specializing in functional and design validation/Characterization of advanced NAND products . Experienced in silicon and simulation‑based validation, electrical failure analysis, and cross‑functional issue closure. Strong focus on automation, data‑driven validation, and applied AI/ML techniques to improve test efficiency, coverage, and debug productivity. Main Responsibilities: Designed and executed functional and design validation flows for advanced RG NAND devices using silicon and simulation platforms Developed deterministic usage‑case tests and random sequence generators to validate NAND commands and customer‑mode features Performed electrical failure analysis of issues seen, root‑cause investigations (including digital and analog circuitry), and drove issue resolution with cross-functional teams Characterization of NAND performance including timing and power parameters, with the latest NAND ONFI interface standards Conducted simulation studies using Verilog and Synopsys VCS to suppor
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. SUMMARY: At Micron , we are transforming how the world uses information to enrich life for all. As a Layout Design Engineering Intern, you will contribute to the development and verification of selected IP layout cells used in memory products. Working alongside experienced layout engineers, you will gain hands-on experience with industry-standard layout methodologies and participate in key activities such as floorplanning, placement, routing, and physical verification. You will also have the opportunity to develop automation solutions that improve engineering productivity, design quality, and efficiency through scripting and AI-supported development. Responsibilities: Develop the layout of selected analog and digital IP layout cells under the guidance of experienced layout engineers. Perform Design Rule Check (DRC) and Layout Versus Schematic (LVS) verification and document findings. Create and deliver technical reports summarizing design work, verification results, and key lessons learned. Design and implement a SKILL-based automation solution to improve layout design or verification processes, increasing engineering efficiency and quality. Support engineering activities through AI-assisted development methodologies and productivity tools. Minimum Qualifications: Student pursuing a Bachelor's degree in Electrical Engineering, Electronics Engineering, Mechatronics, Robotics, Nanotechnology, Computer Engineering, or a rela
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. We are hiring a Layout Engineer for Micron Technology’s HBM Team in Hyderabad, India. In this role, you will contribute to advanced applications including artificial intelligence and high-performance computing solutions with High Bandwidth Memory. You will coordinate with peer groups across Micron's worldwide locations on multiple projects, providing an exceptional chance for career development! Role and Responsibilities • Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support. • Perform layout verification like LVS/DRC/Antenna, quality check and support documentation. • Responsible for on-time delivery of block-level layouts with acceptable quality. • Demonstrate leadership qualities in area/time estimation, scheduling, and execution to meet project schedule/milestones in multiple project environments. • Ability to guide Peer team-members in their execution of Sub block-level layouts & review critical items. • Effectively communicating with Local engineering teams to assure the success of layout project
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s High Bandwidth Memory Design Architecture team develops memory solutions for AI accelerators, high-performance computing, and data centers. We bring architecture and physical implementation together to shape products that are efficient, manufacturable, and ready for demanding applications! As a Custom Layout Architecture Engineer , you will use physical layout expertise to inform HBM architecture and implementation decisions from concept through tapeout. You will work with design, architecture, process, verification, and product engineering teams to balance performance, power, area, routability, and manufacturability. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities: Assess HBM architecture choices through layout feasibility, floorplanning, and performance, power, and area analysis Lead custom layout and full-chip integration for analog, mixed-signal, digital, and memory blocks Resolve antenna, latch-up, ESD, electromigration, IR drop, routability, and power-delivery constraints Complete DRC/LVS, parasitic extraction, post-layout validation, and tapeout support using industry-standard EDA tools Build scripts and automation that improve layout quality, verification, and design-cycle time Minimum Qualifications: Bachelor’s degree in Electrical Engineering, Electronics Engineering, or a related technical field 4+ years of semiconductor physical layout experience with a
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The ASIC Logic Design Team plays a critical role in developing the custom silicon that powers Micron's industry-leading memory and storage solutions. Our team designs high-speed, high-performance ASICs and memory controller IP, collaborating closely with engineers across design, verification, validation, and product development to bring innovative technologies from concept to production. As a Digital Design Engineer Intern, you will work alongside experienced engineers to help design and develop next-generation ASIC solutions. This internship provides hands-on exposure to advanced semiconductor technologies and the complete ASIC development lifecycle, including digital, analog, and mixed-signal design. You will have the opportunity to contribute to meaningful projects while building technical expertise in a collaborative and innovative environment. What You Will Do Support the design and implementation of high-speed digital logic for tester ASICs and memory controller IP. Collaborate with cross-functional teams including Design Verification, Analog Design, Synthesis, Physical Design, and Lab Validation. Assist with integrating digital designs alongside custom analog circuitry and third-party IP solutions. Participate in design reviews and contribute to technical documentation. Present technical concepts and project updates to engineering teams. Explore and leverage AI-enabled design methodologies, including Generative AI and AI-assisted engineering workflows, t
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. We are looking for an Senior Engineer in Product Engineering, NAND Validation, specializing in functional and design validation of advanced NAND products . Experienced in silicon and simulation‑based validation, electrical failure analysis, and cross‑functional issue closure. Strong focus on automation, data‑driven validation, and applied AI/ML techniques to improve test efficiency, coverage, and debug productivity. Key Responsibilities & Achievements Designed and executed functional and design validation flows for advanced RG NAND devices using silicon and simulation platforms Developed deterministic usage‑case tests and random sequence generators to validate NAND commands and customer‑mode features Performed electrical failure analysis of issues seen, root‑cause investigations (including digital and analog circuitry), and drove issue resolution with cross-functional teams Implemented automation frameworks using C‑based programming, Python, and Perl to improve test development and execution efficiency Applied AI/ML‑assisted techniques (data analytics, patter
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron is the fastest growing semiconductor company in India offering a wide & attractive range of career opportunities. One of the rapidly growing functions within Micron India is the Micron SDV (Silicon Design Validation) team in Hyderabad and the team is looking to hire for the position of NAND Silicon Design Validation Product where you will be responsible in the development, validation, characterization, and qualification of new pioneering NAND Flash memory products. There is a tremendous scope for individual learning and career growth in this role. In addition to the SDV responsibilities, you will also work multi-functionally with NAND R&D, Design, and other various engineering teams towards new product startup , define, validate & deliver product specifications and requirements. Also, Product Engineers are the key product-specific point of contact with high visibility for critical issues and act as the main interface between Research and Development, Manufacturing, Business Units, and Quality Assurance departments. Job Responsibilities Responsibilities include, but not limited to: Characterization, debug, and validation of NAND including digital and analog circuitry from ONFI performance perspective . Partnering with fabric
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever! As part of the ASIC Technical Products Engineering organization, you will help drive the development of next-generation GenAI, machine learning, and advanced data analytics solutions for semiconductor engineering. In this role, you will work on intelligent systems that improve engineering productivity, strengthen technical decision-making, and unlock insights from complex ASIC pre and post silicon engineering workflows. You will collaborate with cross-functional teams across System Architecture, Logic Design, Analog/Mixed-Signal Design, Data Science and IT to prototype, build, and scale practical AI-driven solutions that improve quality, cost, cycle time, and engineering efficiency. Key Responsibilities GenAI System Development: Design, build, and improve GenAI-powered an
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s High‑Bandwidth Memory (HBM) Digital Design organization is seeking a Digital Physical Design Engineer to drive backend implementation of high‑performance, low‑power digital logic used in advanced memory products. This role spans backend implementation from Netlist to GDSII, with a strong focus on timing closure, power integrity, and manufacturability in advanced process technologies. The successful candidate will work closely with RTL, DFT, CAD, and verification teams to deliver high‑quality physical designs, contribute to methodology improvements, and help push performance, power, and area (PPA) targets in complex, multi‑hierarchy designs. Key Responsibilities: Own and execute physical design implementation from synthesized netlist through GDSII, including floorplanning, placement, clock tree synthesis, routing, and physical signoff Utilize AI-Enabled tools in the Netlist to GDS flow Perform and drive timing closure across multiple modes, corners, and scenarios using industry‑standard STA tools Analyze and resolve congestion, timing, IR drop, EM, and power integrity issues Develop and refine floorplans, power grids, and clocking strategies for high‑performance designs Work with placement and timing closure of custom analog hard IP macros in a digital-on-top design flow Collaborate closely with RTL designers to influence partitioning, constraints, and micro‑architecture decisions early in the design cycle Implement and va
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Develop test programs of SSD and UFS controller products, and enhance test coverage to ensure excellent outgoing quality and customer satisfaction. Optimize test programs to reduce product test times and manufacturing cost by improving the efficiency of the testing methods . Automate test engineering processes by writing software scripts to improve efficiency. Work closely with product and equipment engineering teams to improve overall product yields and equipment efficiency to maximize ROI. Work closely with design teams to develop design for test features to drive lower costs and increased efficiency Develop and monitor process and engineering metrics to ensure stability, efficiency and effectiveness of test processes. Bachelor’s or master’s degree in Electrical Engineering/Computer engineering. Strong interest in software development with good programming skills. Knowledge of any of the following is desirable: Python, C/C++, Visual Basic, Perl. Prefer candidates with digital, analog, and mixed signal test programming and debug experience. Familiar testing IP blocks such as PLL, efuse, LDO’s, PCIe, DDR, ONFI, and DFT patterns implementation ATPG SCAN, TDF, MemBIST & repair, JTAG, and functional patterns Test program development experience on logic ATE tester platform such as UltraFlex/J7
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Physical Design Engineer-DPG-LPDDR at Micron, you will work on innovative memory and storage solutions. These solutions help transform data into intelligence quickly. You will join a dedicated team collaborating to develop world-class products that set industry standards. Key Responsibilities Lead end-to-end RTL-to-GDSII implementation for complex SoCs across advanced technology nodes. Drive floor planning, power planning, CTS, place & route, timing closure, and physical signoff. Own PPA optimization, low-power implementation, congestion management, and design convergence. Lead STA, SI, EM/IR, DRC, LVS, and reliability closure to achieve tape out readiness. Define physical design methodologies, automation strategies, and flow improvements. Partner with Architecture, RTL, DFT, Verification, CAD, and Product Engineering teams to resolve complex implementation challenges. Provide technical leadership, mentor engineers, and drive execution across global teams. Hands-on custom layout design experience is a strong value-added skill, enabling analog/mixed-signal integration, layout optimization, and advanced-node design challenges Leverage Artificial Intelligence (AI) tools to improve RTL-to-GDSII design productivity, quality, and turnaround time. Drive adoption of Generative AI and Agentic AI solutions for physical design automation, design closure, and engineering workflow optimization. <p
About Anthropic Anthropic’s mission is to create reliable, interpretable, and steerable AI systems. We want AI to be safe and beneficial for our users and for society as a whole. Our team is a quickly growing group of committed researchers, engineers, policy experts, and business leaders working together to build beneficial AI systems. About the role Anthropic is building custom silicon for Claude. The hardware our models run on is one of the most direct levers we have on capability, cost, and reliability — and we've decided to take design authority over it ourselves. We're looking for a Technical Program Manager to own end-to-end execution of our silicon, from architecture definition through tapeout, first-silicon bring-up, and production ramp. You'll be working alongside a small group of domain experts across front-end design, verification, physical design, DFT, analog/mixed-signal, foundry, and packaging. There is no process to inherit — you'll build the execution machinery this program runs on. This is a partner-heavy program by design. You'll drive a portfolio of external engagements — ASIC design services, IP vendors, foundry, and OSAT. You should have shipped chips before, know what a realistic silicon schedule looks like and its failure modes, and be comfortable making consequential program calls without a large organization behind you. And because this is Anthropic, you'll have Claude as a collaborator — we expect the TPMs on this team to push hard on what AI-assisted program management can look like. Key responsibilities Own the integrated silicon program plan — architecture closure, RTL freeze, DV milestones, IP delivery, PD closure, DFT, tapeout, and post-silicon bring-up. Drive external partner execution across ASIC design partners, IP vendors, foundry, and packaging/test. Run technology and IP selection as a program: track candidate vendors and options, drive evaluations to a decision, and land the build / buy / license calls with engineering leadershi
Your wellbeing, our mission. Join a company shaping a healthier world. GET TO KNOW US At Wellhub we're revolutionizing workplace wellness. Our platform connects employees worldwide to the best partners for fitness, mindfulness, therapy, nutrition, and sleep—all in one simple subscription. Headquartered in NYC with team members in Europe, North America and South America, we’re on a mission to make every company a wellness company. We believe work should be fulfilling, inspiring, and balanced. Here, you’ll find a team that values wellbeing, collaboration, and different perspectives, where passion and creativity push boundaries to create real impact. Your contributions will help shape a healthier, more balanced world for you and millions of people globally. Join us in redefining the future of wellbeing! THE OPPORTUNITY We are hiring a Staff Product Manager to help build our Occupational Health bet inside New Ventures based in Brazil . This is a Remote – Brazil position, meaning you can work from anywhere within the country. Please note that this role is only open to candidates in Brazil. Occupational health is one of the largest, most regulated, and most stubbornly analog corners of corporate wellbeing. In Brazil alone, it is a multi-billion real market: every company is legally required to run occupational exams, manage regulatory compliance (NR-01 and the new psychosocial-risk mandate, eSocial reporting), and look after the health of its workforce. Yet the industry still runs on paper, manual scheduling, fragmented clinics, and reports nobody reads. We intend to rebuild it, at AI speed. You will partner directly with the Founder/GM of the Occupational Health bet as the product lead of a small, single-threaded squad. This is a 0-to-1 build: the thesis is set, the market is chosen, but the product, the workflow, and the operating model are still being invented. You report to the VP Product, New Ventures, and you'll work daily with the Founder/G
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. We are hiring a Layout Engineer for Micron Technology’s HBM Team in Hyderabad, India. In this role, you will contribute to advanced applications including artificial intelligence and high-performance computing solutions with High Bandwidth Memory. You will coordinate with peer groups across Micron's worldwide locations on multiple projects, providing an exceptional chance for career development! Role and Responsibilities • Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support. • Perform layout verification like LVS/DRC/Antenna, quality check and support documentation. • Responsible for on-time delivery of block-level layouts with acceptable quality. • Demonstrate leadership qualities in area/time estimation, scheduling, and execution to meet project schedule/milestones in multiple project environments. • Ability to guide Peer team-members in their execution of Sub block-level layouts & review critical items. • Effectively communicating with Local engineering teams to assure the success of layout project
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