About the Role We are looking for a highly experienced, hands-on RTL engineer with deep packet-netwo
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Chip Level Defect Localization And Failure Analysis Engineer Jobs
390 active opportunities · Updated for October 2026
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Explore current chip level defect localization and failure analysis engineer jobs. Use filters to narrow by work mode, employment type, experience and date posted.
The Role and Impact As a SoC Logic Design Engineer, you will be responsible for creating and optimizing the Register Transfer Level (RTL) design for System-on-Chip (SoC) projects. You will integrate logic of IP blocks and subsystems into complete SoC designs, ensuring power,…
The Heterogeneous Integration Group (HIG) within Micron's Technology and Products Group (TPG) leads the development of High Bandwidth Memory (HBM) solutions for AI and ML applications. Our modern designs use Through Silicon Via (TSV) technology. We stack multiple DRAM chips on a…
Staff SoC DFT Engineer, HBM at Micron in United States. Full-time · On-site.
About the Role We’re looking for a software engineer to help build the design methodology, software
What We’re Looking For: We’re looking for an architect to own the logical architecture for the A-0 and A-1 wafer products. You will work with the XPU/Compute chip architect and the memory architect to synthesize the final wafer-level architecture. Ideal Background: An ideal…
We’re looking for a hands-on process and materials engineer to own wafer level molding and underfill processes, material qualification, and assembly integration across development and manufacturing. Summary: Seeking an experienced engineer to lead wafer level mold and underfill…
About the Role As a Hardware Chips Programs Manager at OpenAI, you will help bring our chips hardwar
About the Role We’re looking for signal integrity (SI) system design engineers who have a deep exper
What We’re Looking For: We’re looking for a lead architect to own a large portion of the system architecture of the A-0 and A-1 products. Ideal Background: An ideal candidate will have: Experience leading the architecture of an entire system or subsystem (eg chip, board, die,…
Lead the design, analysis, and optimization of digital and analog circuits for new memory products, ensuring outstanding performance, power, and area (PPA) optimization for NAND memory products. Define architecture and chip plans, including placement and routing optimization, to…
NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of…
The Role and Impact As a GPU Logic Design Engineer, you will contribute to the design and validation of cutting-edge graphics IPs, including compute, display, and media units. You will be immersed in the creation of register transfer level (RTL) coding, simulation, and…
Responsibilities will include, but are not limited to: Understand design specifications and define verification scope, strategy, and plans for block/chip RTL verification Develop, execute, and maintain verification testbenches and test vectors using digital simulation tools and…
As a Staff Design Engineer in the Non-Volatile Memory Core Functional Group , you will design and optimize critical Flash memory circuits such as row/column drivers, sense amplifiers, and associated core circuitry , with focus on performance, power, area, timing, and reliability…
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