Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and…
Jobiba hiring network
Chip Level Defect Localization And Failure Analysis Engineer Jobs
373 active opportunities · Updated for October 2026
Fresh results
15 shown
Explore current chip level defect localization and failure analysis engineer jobs. Use filters to narrow by work mode, employment type, experience and date posted.
Engineer, DDEG Design Methodology at Micron in Hyderabad, Phoenix Aquila, India. Full-time · On-site.
Senior Engineer - Design Verification at Micron in Hyderabad, Phoenix Aquila, India. Full-time · On-site.
Staff Engineer - Design Verification at Micron in Hyderabad, Phoenix Aquila, India. Full-time · On-site.
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of…
Principal Engineer, IO Design at Micron in Boise, ID - Main Site, United States.
Senior/Staff Design Verification Engineer, HBM at Micron in Richardson, Texas, United States. Full-time · On-site.
Principal Engineer, IO Design at Micron in Boise, ID - Main Site, United States. Full-time · On-site.
The Silicon Co-Design Group (SCG) sits at the crossroads of architecture, design, marketing, operations, and productization. Our work spans early architecture through final product delivery across Datacenter, Gaming, Robotics, Automotive, and Embedded markets. We work closely…
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms,…
Engineer, APTD CEM - Advanced Packaging Die Level Technology Engineering at Micron in Singapore. Full-time · On-site.
The team is responsible for building the next generation of AI-native silicon while working closely with software and research partners to co-design hardware tightly integrated with AI models. In addition to delivering production-grade silicon for OpenAI’s supercomputing…
NVIDIA is committed not only to delivering outstanding chip performance but also to continuously improving power efficiency across every product. Performance per watt is critical to our success. The Power Analysis and Optimization team works closely with architecture, design,…
The team builds next-generation AI-native silicon and systems while working closely with software, research, and manufacturing partners to co-design hardware tightly integrated with AI models. In addition to delivering systems for OpenAI’s supercomputing infrastructure, the team…
About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems…
Get new chip level defect localization and failure analysis engineer jobs by email
Daily job updates · Unsubscribe anytime